diff options
| author | Igal Liberman <igall@marvell.com> | 2017-02-26 16:44:27 +0200 |
|---|---|---|
| committer | Kostya Porotchkin <kostap@marvell.com> | 2017-05-11 11:06:31 +0300 |
| commit | 5d638b0373d294f0c34abd3a27def2e2d4b1877d (patch) | |
| tree | 337186b0a6196e16a08836ea2e1acf55d5e4769e | |
| parent | 13decb8cfc55f06bb96c69cfd94a9bc753f770f4 (diff) | |
fix: pcie: move pcie initialization to cp110_ble_init
In addition, add a call to cp110_pcie_clk_cfg().
This function is responsible for configuring PCIe
ref clock and must me called before configuring
PCIe interface.
Change-Id: I807a4466d9c4459f9403b2542d771c961f07a46e
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/39257
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
| -rw-r--r-- | drivers/marvell/mochi/cp110_setup.c | 9 | ||||
| -rw-r--r-- | plat/marvell/a8k/common/include/a8k_plat_def.h | 1 | ||||
| -rw-r--r-- | plat/marvell/a8k/common/plat_ble_setup.c | 7 |
3 files changed, 11 insertions, 6 deletions
diff --git a/drivers/marvell/mochi/cp110_setup.c b/drivers/marvell/mochi/cp110_setup.c index dc6f0ed7..beb3e4a2 100644 --- a/drivers/marvell/mochi/cp110_setup.c +++ b/drivers/marvell/mochi/cp110_setup.c @@ -32,6 +32,7 @@ *************************************************************************** */ +#include <plat_marvell.h> #include <plat_def.h> #include <amb_adec.h> #include <iob.h> @@ -504,5 +505,13 @@ void cp110_init(int cp_index) /* Do the minimal setup required to configure the CP in BLE */ void cp110_ble_init(int cp_index) { +#if PCI_EP_SUPPORT amb_bridge_init(cp_index); + + /* Configure PCIe clock */ + cp110_pcie_clk_cfg(cp_index); + + /* Configure PCIe endpoint */ + ble_plat_pcie_ep_setup(); +#endif } diff --git a/plat/marvell/a8k/common/include/a8k_plat_def.h b/plat/marvell/a8k/common/include/a8k_plat_def.h index 3ff5bd28..bcb3724f 100644 --- a/plat/marvell/a8k/common/include/a8k_plat_def.h +++ b/plat/marvell/a8k/common/include/a8k_plat_def.h @@ -78,6 +78,7 @@ #define MVEBU_COMPHY_BASE(x) (MVEBU_CP_REGS_BASE(x) + 0x441000) #define MVEBU_HPIPE_BASE(x) (MVEBU_CP_REGS_BASE(x) + 0x120000) #define MVEBU_CP_DFX_BASE(x) (MVEBU_CP_REGS_BASE(x) + 0x400200) +#define MVEBU_CP_MSS_DPSHSR_REG(x) (MVEBU_CP_REGS_BASE(x) + 0x280040) /******************************************************************************* * MVEBU memory map related constants diff --git a/plat/marvell/a8k/common/plat_ble_setup.c b/plat/marvell/a8k/common/plat_ble_setup.c index 7f55ab4a..7213934b 100644 --- a/plat/marvell/a8k/common/plat_ble_setup.c +++ b/plat/marvell/a8k/common/plat_ble_setup.c @@ -379,14 +379,9 @@ int ble_plat_setup(int *skip) return 0; } -#if PCI_EP_SUPPORT - /* Do basic CP-110 setups */ + /* Do required CP-110 setups for BLE stage */ cp110_ble_init(0); - /* Enable PCIe in end point mode */ - ble_plat_pcie_ep_setup(); -#endif - /* Setup AVS */ ble_plat_avs_config(); |