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| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2014-06-02 13:52:38 +0100 |
|---|---|---|
| committer | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2014-06-05 14:29:07 +0100 |
| commit | d831af90a3788c705bfdd49c9f9548b34a647f80 (patch) | |
| tree | 5c863a2e139dda0569ca67e47ed04763d06f90e7 /bl31/cpu_data_array.c | |
| parent | 977fbcd4e0842e590a961d6f40c14653caa9301a (diff) | |
PL011: Fix a bug in the UART FIFO polling
Before attempting to write a character, the PL011 driver polls
the PL011_UARTFR_TXFF bit to know whether the UART FIFO is full.
However, the comparison with 1 was incorrect because
PL011_UARTFR_TXFF is not at bit 0. This patch fixes it.
Change-Id: If78892345bbdc8a5e4ae4a1b7159753c609681b0
Diffstat (limited to 'bl31/cpu_data_array.c')
0 files changed, 0 insertions, 0 deletions