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author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2014-05-12 15:28:47 +0100 |
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committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2014-05-16 17:11:31 +0100 |
commit | 2da8d8bfc0877b9c723514133554dfee4c0638f1 (patch) | |
tree | 5178aafe28b80e33b6581663bee66b9d2194688a /services/std_svc/psci/psci_common.c | |
parent | c3c1e9b0abe1a879dad4400421ad00849231eb3c (diff) |
Add build configuration for timer save/restore
At present, non-secure timer register contents are saved and restored as
part of world switch by BL3-1. This effectively means that the
non-secure timer stops, and non-secure timer interrupts are prevented
from asserting until BL3-1 switches back, introducing latency for
non-secure services. Often, secure world might depend on alternate
sources for secure interrupts (secure timer or platform timer) instead
of non-secure timers, in which case this save and restore is
unnecessary.
This patch introduces a boolean build-time configuration NS_TIMER_SWITCH
to choose whether or not to save and restore non-secure timer registers
upon world switch. The default choice is made not to save and restore
them.
Fixes ARM-software/tf-issues#148
Change-Id: I1b9d623606acb9797c3e0b02fb5ec7c0a414f37e
Diffstat (limited to 'services/std_svc/psci/psci_common.c')
0 files changed, 0 insertions, 0 deletions