diff options
| -rw-r--r-- | bl1/bl1.ld.S | 9 | ||||
| -rw-r--r-- | bl2/bl2.ld.S | 9 | ||||
| -rw-r--r-- | bl31/bl31.ld.S | 9 | ||||
| -rw-r--r-- | plat/fvp/aarch64/plat_common.c | 4 | ||||
| -rw-r--r-- | plat/fvp/platform.h | 4 |
5 files changed, 31 insertions, 4 deletions
diff --git a/bl1/bl1.ld.S b/bl1/bl1.ld.S index 48828e8f..969b8c27 100644 --- a/bl1/bl1.ld.S +++ b/bl1/bl1.ld.S @@ -77,6 +77,15 @@ SECTIONS } >RAM /* + * The .xlat_table section is for full, aligned page tables (4K). + * Removing them from .bss avoids forcing 4K alignment on + * the .bss section and eliminates the unecessary zero init + */ + xlat_table (NOLOAD) : { + *(xlat_table) + } >RAM + + /* * The base address of the coherent memory section must be page-aligned (4K) * to guarantee that the coherent data are stored on their own pages and * are not mixed with normal data. This is required to set up the correct diff --git a/bl2/bl2.ld.S b/bl2/bl2.ld.S index c1d5d5c2..849297a7 100644 --- a/bl2/bl2.ld.S +++ b/bl2/bl2.ld.S @@ -59,6 +59,15 @@ SECTIONS __RO_END__ = .; } >RAM + /* + * The .xlat_table section is for full, aligned page tables (4K). + * Removing them from .bss avoids forcing 4K alignment on + * the .bss section and eliminates the unecessary zero init + */ + xlat_table (NOLOAD) : { + *(xlat_table) + } >RAM + .data . : { __DATA_START__ = .; *(.data) diff --git a/bl31/bl31.ld.S b/bl31/bl31.ld.S index 42325609..7cc85273 100644 --- a/bl31/bl31.ld.S +++ b/bl31/bl31.ld.S @@ -60,6 +60,15 @@ SECTIONS __RO_END__ = .; } >RAM + /* + * The .xlat_table section is for full, aligned page tables (4K). + * Removing them from .bss avoids forcing 4K alignment on + * the .bss section and eliminates the unecessary zero init + */ + xlat_table (NOLOAD) : { + *(xlat_table) + } >RAM + .data . : { __DATA_START__ = .; *(.data) diff --git a/plat/fvp/aarch64/plat_common.c b/plat/fvp/aarch64/plat_common.c index 5b53aafb..c8c36d79 100644 --- a/plat/fvp/aarch64/plat_common.c +++ b/plat/fvp/aarch64/plat_common.c @@ -67,14 +67,14 @@ __attribute__ ((aligned((ADDR_SPACE_SIZE >> 30) << 3))); * space needed to address secure peripherals e.g. trusted ROM and RAM. ******************************************************************************/ static unsigned long l2_xlation_table[NUM_L2_PAGETABLES][NUM_2MB_IN_GB] -__attribute__ ((aligned(NUM_2MB_IN_GB << 3))); +__attribute__ ((aligned(NUM_2MB_IN_GB << 3), section("xlat_table"))); /******************************************************************************* * Level 3 translation tables (2 sets) describe the trusted & non-trusted RAM * regions at a granularity of 4K. ******************************************************************************/ static unsigned long l3_xlation_table[NUM_L3_PAGETABLES][NUM_4K_IN_2MB] -__attribute__ ((aligned(NUM_4K_IN_2MB << 3))); +__attribute__ ((aligned(NUM_4K_IN_2MB << 3), section("xlat_table"))); /******************************************************************************* * Helper to create a level 1/2 table descriptor which points to a level 2/3 diff --git a/plat/fvp/platform.h b/plat/fvp/platform.h index a12a0948..5826d357 100644 --- a/plat/fvp/platform.h +++ b/plat/fvp/platform.h @@ -225,12 +225,12 @@ /******************************************************************************* * BL2 specific defines. ******************************************************************************/ -#define BL2_BASE 0x0402B000 +#define BL2_BASE 0x0402D000 /******************************************************************************* * BL31 specific defines. ******************************************************************************/ -#define BL31_BASE 0x0400E000 +#define BL31_BASE 0x0400C000 /******************************************************************************* * Platform specific page table and MMU setup constants |