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Diffstat (limited to 'docs/porting-guide.md')
| -rw-r--r-- | docs/porting-guide.md | 28 |
1 files changed, 19 insertions, 9 deletions
diff --git a/docs/porting-guide.md b/docs/porting-guide.md index cdb722af..56ddbb1c 100644 --- a/docs/porting-guide.md +++ b/docs/porting-guide.md @@ -72,10 +72,20 @@ either mandatory or optional. 2.1 Common mandatory modifications ---------------------------------- -A platform port must enable the Memory Management Unit (MMU) with identity -mapped page tables, and enable both the instruction and data caches for each BL -stage. In ARM standard platforms, each BL stage configures the MMU in -the platform-specific architecture setup function, `blX_plat_arch_setup()`. + +A platform port must enable the Memory Management Unit (MMU) as well as the +instruction and data caches for each BL stage. Setting up the translation +tables is the responsibility of the platform port because memory maps differ +across platforms. A memory translation library (see `lib/aarch64/xlat_helpers.c` +and `lib/aarch64/xlat_tables.c`) is provided to help in this setup. Note that +although this library supports non-identity mappings, this is intended only for +re-mapping peripheral physical addresses and allows platforms with high I/O +addresses to reduce their virtual address space. All other addresses +corresponding to code and data must currently use an identity mapping. + +In ARM standard platforms, each BL stage configures the MMU in the +platform-specific architecture setup function, `blX_plat_arch_setup()`, and uses +an identity mapping for all addresses. If the build option `USE_COHERENT_MEM` is enabled, each platform can allocate a block of identity mapped secure memory with Device-nGnRE attributes aligned to @@ -85,7 +95,7 @@ section identified by name `bakery_lock` inside `coherent_ram` so that its possible for the firmware to place variables in it using the following C code directive: - __attribute__ ((section("bakery_lock"))) + __section("bakery_lock") Or alternatively the following assembler code directive: @@ -1860,7 +1870,7 @@ they can be invoked without a C Runtime stack. Return : int This API is used by the crash reporting mechanism to initialize the crash -console. It should only use the general purpose registers x0 to x2 to do the +console. It must only use the general purpose registers x0 to x4 to do the initialization and returns 1 on success. ### Function : plat_crash_console_putc @@ -1869,7 +1879,7 @@ initialization and returns 1 on success. Return : int This API is used by the crash reporting mechanism to print a character on the -designated crash console. It should only use general purpose registers x1 and +designated crash console. It must only use general purpose registers x1 and x2 to do its work. The parameter and the return value are in general purpose register x0. @@ -1986,8 +1996,8 @@ amount of open resources per driver. _Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved._ -[ARM GIC Architecture Specification 2.0]: http://arminfo.emea.arm.com/help/topic/com.arm.doc.ihi0048b/IHI0048B_gic_architecture_specification.pdf -[ARM GIC Architecture Specification 3.0]: http://arminfo.emea.arm.com/help/topic/com.arm.doc.ihi0069a/IHI0069A_gic_architecture_specification.pdf +[ARM GIC Architecture Specification 2.0]: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0048b/index.html +[ARM GIC Architecture Specification 3.0]: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0069b/index.html [IMF Design Guide]: interrupt-framework-design.md [User Guide]: user-guide.md [FreeBSD]: http://www.freebsd.org |