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diff --git a/docs/user-guide.md b/docs/user-guide.md index f5a79e4f..4209be7e 100644 --- a/docs/user-guide.md +++ b/docs/user-guide.md @@ -245,6 +245,17 @@ performed. synchronous method) or 1 (BL3-2 is initialized using asynchronous method). Default is 0. +* `USE_COHERENT_MEM`: This flag determines whether to include the coherent + memory region in the BL memory map or not (see "Use of Coherent memory in + Trusted Firmware" section in [Firmware Design]). It can take the value 1 + (Coherent memory region is included) or 0 (Coherent memory region is + excluded). Default is 1. + +* `TSPD_ROUTE_IRQ_TO_EL3`: A non zero value enables the routing model + for non-secure interrupts in which they are routed to EL3 (TSPD). The + default model (when the value is 0) is to route non-secure interrupts + to S-EL1 (TSP). + #### FVP specific build options * `FVP_TSP_RAM_LOCATION`: location of the TSP binary. Options: |