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-rw-r--r--include/common/aarch64/asm_macros.S (renamed from include/common/asm_macros.S)78
-rw-r--r--include/common/aarch64/assert_macros.S (renamed from include/common/assert_macros.S)2
-rw-r--r--include/common/aarch64/el3_common_macros.S (renamed from include/common/el3_common_macros.S)0
-rw-r--r--include/common/asm_macros_common.S111
-rw-r--r--include/common/bl_common.h55
-rw-r--r--include/common/context.h351
-rw-r--r--include/common/context_mgmt.h102
-rw-r--r--include/common/runtime_svc.h135
-rw-r--r--include/common/smcc_helpers.h165
9 files changed, 277 insertions, 722 deletions
diff --git a/include/common/asm_macros.S b/include/common/aarch64/asm_macros.S
index bd8bb709..cc8f4243 100644
--- a/include/common/asm_macros.S
+++ b/include/common/aarch64/asm_macros.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -31,6 +31,7 @@
#define __ASM_MACROS_S__
#include <arch.h>
+#include <asm_macros_common.S>
.macro func_prologue
@@ -104,81 +105,6 @@
.endif
.endm
- /*
- * This macro is used to create a function label and place the
- * code into a separate text section based on the function name
- * to enable elimination of unused code during linking
- */
- .macro func _name
- .section .text.\_name, "ax"
- .type \_name, %function
- .func \_name
- \_name:
- .endm
-
- /*
- * This macro is used to mark the end of a function.
- */
- .macro endfunc _name
- .endfunc
- .size \_name, . - \_name
- .endm
-
- /*
- * Theses macros are used to create function labels for deprecated
- * APIs. If ERROR_DEPRECATED is non zero, the callers of these APIs
- * will fail to link and cause build failure.
- */
-#if ERROR_DEPRECATED
- .macro func_deprecated _name
- func deprecated\_name
- .endm
-
- .macro endfunc_deprecated _name
- endfunc deprecated\_name
- .endm
-#else
- .macro func_deprecated _name
- func \_name
- .endm
-
- .macro endfunc_deprecated _name
- endfunc \_name
- .endm
-#endif
-
- /*
- * Helper assembler macro to count trailing zeros. The output is
- * populated in the `TZ_COUNT` symbol.
- */
- .macro count_tz _value, _tz_count
- .if \_value
- count_tz "(\_value >> 1)", "(\_tz_count + 1)"
- .else
- .equ TZ_COUNT, (\_tz_count - 1)
- .endif
- .endm
-
- /*
- * This macro declares an array of 1 or more stacks, properly
- * aligned and in the requested section
- */
-#define DEFAULT_STACK_ALIGN (1 << 6) /* In case the caller doesnt provide alignment */
-
- .macro declare_stack _name, _section, _size, _count, _align=DEFAULT_STACK_ALIGN
- count_tz \_align, 0
- .if (\_align - (1 << TZ_COUNT))
- .error "Incorrect stack alignment specified (Must be a power of 2)."
- .endif
- .if ((\_size & ((1 << TZ_COUNT) - 1)) <> 0)
- .error "Stack size not correctly aligned"
- .endif
- .section \_section, "aw", %nobits
- .align TZ_COUNT
- \_name:
- .space ((\_count) * (\_size)), 0
- .endm
-
#if ENABLE_PLAT_COMPAT
/*
* This macro calculates the base address of an MP stack using the
diff --git a/include/common/assert_macros.S b/include/common/aarch64/assert_macros.S
index cb6c78b8..b7e536c6 100644
--- a/include/common/assert_macros.S
+++ b/include/common/aarch64/assert_macros.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
diff --git a/include/common/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S
index 9b22a734..9b22a734 100644
--- a/include/common/el3_common_macros.S
+++ b/include/common/aarch64/el3_common_macros.S
diff --git a/include/common/asm_macros_common.S b/include/common/asm_macros_common.S
new file mode 100644
index 00000000..ee59a939
--- /dev/null
+++ b/include/common/asm_macros_common.S
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __ASM_MACROS_COMMON_S__
+#define __ASM_MACROS_COMMON_S__
+
+#include <arch.h>
+
+ /*
+ * This macro is used to create a function label and place the
+ * code into a separate text section based on the function name
+ * to enable elimination of unused code during linking
+ */
+ .macro func _name
+ .section .text.\_name, "ax"
+ .type \_name, %function
+ .func \_name
+ \_name:
+ .endm
+
+ /*
+ * This macro is used to mark the end of a function.
+ */
+ .macro endfunc _name
+ .endfunc
+ .size \_name, . - \_name
+ .endm
+
+ /*
+ * Theses macros are used to create function labels for deprecated
+ * APIs. If ERROR_DEPRECATED is non zero, the callers of these APIs
+ * will fail to link and cause build failure.
+ */
+#if ERROR_DEPRECATED
+ .macro func_deprecated _name
+ func deprecated\_name
+ .endm
+
+ .macro endfunc_deprecated _name
+ endfunc deprecated\_name
+ .endm
+#else
+ .macro func_deprecated _name
+ func \_name
+ .endm
+
+ .macro endfunc_deprecated _name
+ endfunc \_name
+ .endm
+#endif
+
+ /*
+ * Helper assembler macro to count trailing zeros. The output is
+ * populated in the `TZ_COUNT` symbol.
+ */
+ .macro count_tz _value, _tz_count
+ .if \_value
+ count_tz "(\_value >> 1)", "(\_tz_count + 1)"
+ .else
+ .equ TZ_COUNT, (\_tz_count - 1)
+ .endif
+ .endm
+
+ /*
+ * This macro declares an array of 1 or more stacks, properly
+ * aligned and in the requested section
+ */
+#define DEFAULT_STACK_ALIGN (1 << 6) /* In case the caller doesnt provide alignment */
+
+ .macro declare_stack _name, _section, _size, _count, _align=DEFAULT_STACK_ALIGN
+ count_tz \_align, 0
+ .if (\_align - (1 << TZ_COUNT))
+ .error "Incorrect stack alignment specified (Must be a power of 2)."
+ .endif
+ .if ((\_size & ((1 << TZ_COUNT) - 1)) <> 0)
+ .error "Stack size not correctly aligned"
+ .endif
+ .section \_section, "aw", %nobits
+ .align TZ_COUNT
+ \_name:
+ .space ((\_count) * (\_size)), 0
+ .endm
+
+
+#endif /* __ASM_MACROS_COMMON_S__ */
diff --git a/include/common/bl_common.h b/include/common/bl_common.h
index 646a8172..3aa08360 100644
--- a/include/common/bl_common.h
+++ b/include/common/bl_common.h
@@ -137,6 +137,7 @@
#include <cassert.h>
#include <stdint.h>
#include <stddef.h>
+#include <types.h>
#include <utils.h> /* To retain compatibility */
/*
@@ -144,28 +145,28 @@
* BL images
*/
#if SEPARATE_CODE_AND_RODATA
-extern unsigned long __TEXT_START__;
-extern unsigned long __TEXT_END__;
-extern unsigned long __RODATA_START__;
-extern unsigned long __RODATA_END__;
+extern uintptr_t __TEXT_START__;
+extern uintptr_t __TEXT_END__;
+extern uintptr_t __RODATA_START__;
+extern uintptr_t __RODATA_END__;
#else
-extern unsigned long __RO_START__;
-extern unsigned long __RO_END__;
+extern uintptr_t __RO_START__;
+extern uintptr_t __RO_END__;
#endif
#if IMAGE_BL2
-extern unsigned long __BL2_END__;
+extern uintptr_t __BL2_END__;
#elif IMAGE_BL2U
-extern unsigned long __BL2U_END__;
+extern uintptr_t __BL2U_END__;
#elif IMAGE_BL31
-extern unsigned long __BL31_END__;
+extern uintptr_t __BL31_END__;
#elif IMAGE_BL32
-extern unsigned long __BL32_END__;
+extern uintptr_t __BL32_END__;
#endif /* IMAGE_BLX */
#if USE_COHERENT_MEM
-extern unsigned long __COHERENT_RAM_START__;
-extern unsigned long __COHERENT_RAM_END__;
+extern uintptr_t __COHERENT_RAM_START__;
+extern uintptr_t __COHERENT_RAM_END__;
#endif
@@ -174,21 +175,21 @@ extern unsigned long __COHERENT_RAM_END__;
* memory is available for its use and how much is already used.
******************************************************************************/
typedef struct meminfo {
- uint64_t total_base;
+ uintptr_t total_base;
size_t total_size;
- uint64_t free_base;
+ uintptr_t free_base;
size_t free_size;
} meminfo_t;
typedef struct aapcs64_params {
- unsigned long arg0;
- unsigned long arg1;
- unsigned long arg2;
- unsigned long arg3;
- unsigned long arg4;
- unsigned long arg5;
- unsigned long arg6;
- unsigned long arg7;
+ u_register_t arg0;
+ u_register_t arg1;
+ u_register_t arg2;
+ u_register_t arg3;
+ u_register_t arg4;
+ u_register_t arg5;
+ u_register_t arg6;
+ u_register_t arg7;
} aapcs64_params_t;
/***************************************************************************
@@ -284,7 +285,7 @@ CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
__builtin_offsetof(entry_point_info_t, args), \
assert_BL31_args_offset_mismatch);
-CASSERT(sizeof(unsigned long) ==
+CASSERT(sizeof(uintptr_t) ==
__builtin_offsetof(entry_point_info_t, spsr) - \
__builtin_offsetof(entry_point_info_t, pc), \
assert_entrypoint_and_spsr_should_be_adjacent);
@@ -292,8 +293,8 @@ CASSERT(sizeof(unsigned long) ==
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
-unsigned long page_align(unsigned long, unsigned);
-unsigned long image_size(unsigned int image_id);
+uintptr_t page_align(uintptr_t, unsigned);
+size_t image_size(unsigned int image_id);
int load_image(meminfo_t *mem_layout,
unsigned int image_id,
uintptr_t image_base,
@@ -307,8 +308,8 @@ int load_auth_image(meminfo_t *mem_layout,
extern const char build_message[];
extern const char version_string[];
-void reserve_mem(uint64_t *free_base, size_t *free_size,
- uint64_t addr, size_t size);
+void reserve_mem(uintptr_t *free_base, size_t *free_size,
+ uintptr_t addr, size_t size);
void print_entry_point_info(const entry_point_info_t *ep_info);
diff --git a/include/common/context.h b/include/common/context.h
deleted file mode 100644
index ec47f2ad..00000000
--- a/include/common/context.h
+++ /dev/null
@@ -1,351 +0,0 @@
-/*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __CONTEXT_H__
-#define __CONTEXT_H__
-
-/*******************************************************************************
- * Constants that allow assembler code to access members of and the 'gp_regs'
- * structure at their correct offsets.
- ******************************************************************************/
-#define CTX_GPREGS_OFFSET 0x0
-#define CTX_GPREG_X0 0x0
-#define CTX_GPREG_X1 0x8
-#define CTX_GPREG_X2 0x10
-#define CTX_GPREG_X3 0x18
-#define CTX_GPREG_X4 0x20
-#define CTX_GPREG_X5 0x28
-#define CTX_GPREG_X6 0x30
-#define CTX_GPREG_X7 0x38
-#define CTX_GPREG_X8 0x40
-#define CTX_GPREG_X9 0x48
-#define CTX_GPREG_X10 0x50
-#define CTX_GPREG_X11 0x58
-#define CTX_GPREG_X12 0x60
-#define CTX_GPREG_X13 0x68
-#define CTX_GPREG_X14 0x70
-#define CTX_GPREG_X15 0x78
-#define CTX_GPREG_X16 0x80
-#define CTX_GPREG_X17 0x88
-#define CTX_GPREG_X18 0x90
-#define CTX_GPREG_X19 0x98
-#define CTX_GPREG_X20 0xa0
-#define CTX_GPREG_X21 0xa8
-#define CTX_GPREG_X22 0xb0
-#define CTX_GPREG_X23 0xb8
-#define CTX_GPREG_X24 0xc0
-#define CTX_GPREG_X25 0xc8
-#define CTX_GPREG_X26 0xd0
-#define CTX_GPREG_X27 0xd8
-#define CTX_GPREG_X28 0xe0
-#define CTX_GPREG_X29 0xe8
-#define CTX_GPREG_LR 0xf0
-#define CTX_GPREG_SP_EL0 0xf8
-#define CTX_GPREGS_END 0x100
-
-/*******************************************************************************
- * Constants that allow assembler code to access members of and the 'el3_state'
- * structure at their correct offsets. Note that some of the registers are only
- * 32-bits wide but are stored as 64-bit values for convenience
- ******************************************************************************/
-#define CTX_EL3STATE_OFFSET (CTX_GPREGS_OFFSET + CTX_GPREGS_END)
-#define CTX_SCR_EL3 0x0
-#define CTX_RUNTIME_SP 0x8
-#define CTX_SPSR_EL3 0x10
-#define CTX_ELR_EL3 0x18
-#define CTX_EL3STATE_END 0x20
-
-/*******************************************************************************
- * Constants that allow assembler code to access members of and the
- * 'el1_sys_regs' structure at their correct offsets. Note that some of the
- * registers are only 32-bits wide but are stored as 64-bit values for
- * convenience
- ******************************************************************************/
-#define CTX_SYSREGS_OFFSET (CTX_EL3STATE_OFFSET + CTX_EL3STATE_END)
-#define CTX_SPSR_EL1 0x0
-#define CTX_ELR_EL1 0x8
-#define CTX_SCTLR_EL1 0x10
-#define CTX_ACTLR_EL1 0x18
-#define CTX_CPACR_EL1 0x20
-#define CTX_CSSELR_EL1 0x28
-#define CTX_SP_EL1 0x30
-#define CTX_ESR_EL1 0x38
-#define CTX_TTBR0_EL1 0x40
-#define CTX_TTBR1_EL1 0x48
-#define CTX_MAIR_EL1 0x50
-#define CTX_AMAIR_EL1 0x58
-#define CTX_TCR_EL1 0x60
-#define CTX_TPIDR_EL1 0x68
-#define CTX_TPIDR_EL0 0x70
-#define CTX_TPIDRRO_EL0 0x78
-#define CTX_PAR_EL1 0x80
-#define CTX_FAR_EL1 0x88
-#define CTX_AFSR0_EL1 0x90
-#define CTX_AFSR1_EL1 0x98
-#define CTX_CONTEXTIDR_EL1 0xa0
-#define CTX_VBAR_EL1 0xa8
-
-/*
- * If the platform is AArch64-only, there is no need to save and restore these
- * AArch32 registers.
- */
-#if CTX_INCLUDE_AARCH32_REGS
-#define CTX_SPSR_ABT 0xb0
-#define CTX_SPSR_UND 0xb8
-#define CTX_SPSR_IRQ 0xc0
-#define CTX_SPSR_FIQ 0xc8
-#define CTX_DACR32_EL2 0xd0
-#define CTX_IFSR32_EL2 0xd8
-#define CTX_FP_FPEXC32_EL2 0xe0
-#define CTX_TIMER_SYSREGS_OFF 0xf0 /* Align to the next 16 byte boundary */
-#else
-#define CTX_TIMER_SYSREGS_OFF 0xb0
-#endif /* __CTX_INCLUDE_AARCH32_REGS__ */
-
-/*
- * If the timer registers aren't saved and restored, we don't have to reserve
- * space for them in the context
- */
-#if NS_TIMER_SWITCH
-#define CTX_CNTP_CTL_EL0 (CTX_TIMER_SYSREGS_OFF + 0x0)
-#define CTX_CNTP_CVAL_EL0 (CTX_TIMER_SYSREGS_OFF + 0x8)
-#define CTX_CNTV_CTL_EL0 (CTX_TIMER_SYSREGS_OFF + 0x10)
-#define CTX_CNTV_CVAL_EL0 (CTX_TIMER_SYSREGS_OFF + 0x18)
-#define CTX_CNTKCTL_EL1 (CTX_TIMER_SYSREGS_OFF + 0x20)
-#define CTX_SYSREGS_END (CTX_TIMER_SYSREGS_OFF + 0x30) /* Align to the next 16 byte boundary */
-#else
-#define CTX_SYSREGS_END CTX_TIMER_SYSREGS_OFF
-#endif /* __NS_TIMER_SWITCH__ */
-
-/*******************************************************************************
- * Constants that allow assembler code to access members of and the 'fp_regs'
- * structure at their correct offsets.
- ******************************************************************************/
-#if CTX_INCLUDE_FPREGS
-#define CTX_FPREGS_OFFSET (CTX_SYSREGS_OFFSET + CTX_SYSREGS_END)
-#define CTX_FP_Q0 0x0
-#define CTX_FP_Q1 0x10
-#define CTX_FP_Q2 0x20
-#define CTX_FP_Q3 0x30
-#define CTX_FP_Q4 0x40
-#define CTX_FP_Q5 0x50
-#define CTX_FP_Q6 0x60
-#define CTX_FP_Q7 0x70
-#define CTX_FP_Q8 0x80
-#define CTX_FP_Q9 0x90
-#define CTX_FP_Q10 0xa0
-#define CTX_FP_Q11 0xb0
-#define CTX_FP_Q12 0xc0
-#define CTX_FP_Q13 0xd0
-#define CTX_FP_Q14 0xe0
-#define CTX_FP_Q15 0xf0
-#define CTX_FP_Q16 0x100
-#define CTX_FP_Q17 0x110
-#define CTX_FP_Q18 0x120
-#define CTX_FP_Q19 0x130
-#define CTX_FP_Q20 0x140
-#define CTX_FP_Q21 0x150
-#define CTX_FP_Q22 0x160
-#define CTX_FP_Q23 0x170
-#define CTX_FP_Q24 0x180
-#define CTX_FP_Q25 0x190
-#define CTX_FP_Q26 0x1a0
-#define CTX_FP_Q27 0x1b0
-#define CTX_FP_Q28 0x1c0
-#define CTX_FP_Q29 0x1d0
-#define CTX_FP_Q30 0x1e0
-#define CTX_FP_Q31 0x1f0
-#define CTX_FP_FPSR 0x200
-#define CTX_FP_FPCR 0x208
-#define CTX_FPREGS_END 0x210
-#endif
-
-#ifndef __ASSEMBLY__
-
-#include <cassert.h>
-#include <platform_def.h> /* for CACHE_WRITEBACK_GRANULE */
-#include <stdint.h>
-
-/*
- * Common constants to help define the 'cpu_context' structure and its
- * members below.
- */
-#define DWORD_SHIFT 3
-#define DEFINE_REG_STRUCT(name, num_regs) \
- typedef struct name { \
- uint64_t _regs[num_regs]; \
- } __aligned(16) name##_t
-
-/* Constants to determine the size of individual context structures */
-#define CTX_GPREG_ALL (CTX_GPREGS_END >> DWORD_SHIFT)
-#define CTX_SYSREG_ALL (CTX_SYSREGS_END >> DWORD_SHIFT)
-#if CTX_INCLUDE_FPREGS
-#define CTX_FPREG_ALL (CTX_FPREGS_END >> DWORD_SHIFT)
-#endif
-#define CTX_EL3STATE_ALL (CTX_EL3STATE_END >> DWORD_SHIFT)
-
-/*
- * AArch64 general purpose register context structure. Usually x0-x18,
- * lr are saved as the compiler is expected to preserve the remaining
- * callee saved registers if used by the C runtime and the assembler
- * does not touch the remaining. But in case of world switch during
- * exception handling, we need to save the callee registers too.
- */
-DEFINE_REG_STRUCT(gp_regs, CTX_GPREG_ALL);
-
-/*
- * AArch64 EL1 system register context structure for preserving the
- * architectural state during switches from one security state to
- * another in EL1.
- */
-DEFINE_REG_STRUCT(el1_sys_regs, CTX_SYSREG_ALL);
-
-/*
- * AArch64 floating point register context structure for preserving
- * the floating point state during switches from one security state to
- * another.
- */
-#if CTX_INCLUDE_FPREGS
-DEFINE_REG_STRUCT(fp_regs, CTX_FPREG_ALL);
-#endif
-
-/*
- * Miscellaneous registers used by EL3 firmware to maintain its state
- * across exception entries and exits
- */
-DEFINE_REG_STRUCT(el3_state, CTX_EL3STATE_ALL);
-
-/*
- * Macros to access members of any of the above structures using their
- * offsets
- */
-#define read_ctx_reg(ctx, offset) ((ctx)->_regs[offset >> DWORD_SHIFT])
-#define write_ctx_reg(ctx, offset, val) (((ctx)->_regs[offset >> DWORD_SHIFT]) \
- = val)
-
-/*
- * Top-level context structure which is used by EL3 firmware to
- * preserve the state of a core at EL1 in one of the two security
- * states and save enough EL3 meta data to be able to return to that
- * EL and security state. The context management library will be used
- * to ensure that SP_EL3 always points to an instance of this
- * structure at exception entry and exit. Each instance will
- * correspond to either the secure or the non-secure state.
- */
-typedef struct cpu_context {
- gp_regs_t gpregs_ctx;
- el3_state_t el3state_ctx;
- el1_sys_regs_t sysregs_ctx;
-#if CTX_INCLUDE_FPREGS
- fp_regs_t fpregs_ctx;
-#endif
-} cpu_context_t;
-
-/* Macros to access members of the 'cpu_context_t' structure */
-#define get_el3state_ctx(h) (&((cpu_context_t *) h)->el3state_ctx)
-#if CTX_INCLUDE_FPREGS
-#define get_fpregs_ctx(h) (&((cpu_context_t *) h)->fpregs_ctx)
-#endif
-#define get_sysregs_ctx(h) (&((cpu_context_t *) h)->sysregs_ctx)
-#define get_gpregs_ctx(h) (&((cpu_context_t *) h)->gpregs_ctx)
-
-/*
- * Compile time assertions related to the 'cpu_context' structure to
- * ensure that the assembler and the compiler view of the offsets of
- * the structure members is the same.
- */
-CASSERT(CTX_GPREGS_OFFSET == __builtin_offsetof(cpu_context_t, gpregs_ctx), \
- assert_core_context_gp_offset_mismatch);
-CASSERT(CTX_SYSREGS_OFFSET == __builtin_offsetof(cpu_context_t, sysregs_ctx), \
- assert_core_context_sys_offset_mismatch);
-#if CTX_INCLUDE_FPREGS
-CASSERT(CTX_FPREGS_OFFSET == __builtin_offsetof(cpu_context_t, fpregs_ctx), \
- assert_core_context_fp_offset_mismatch);
-#endif
-CASSERT(CTX_EL3STATE_OFFSET == __builtin_offsetof(cpu_context_t, el3state_ctx), \
- assert_core_context_el3state_offset_mismatch);
-
-/*
- * Helper macro to set the general purpose registers that correspond to
- * parameters in an aapcs_64 call i.e. x0-x7
- */
-#define set_aapcs_args0(ctx, x0) do { \
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, x0); \
- } while (0);
-#define set_aapcs_args1(ctx, x0, x1) do { \
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X1, x1); \
- set_aapcs_args0(ctx, x0); \
- } while (0);
-#define set_aapcs_args2(ctx, x0, x1, x2) do { \
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X2, x2); \
- set_aapcs_args1(ctx, x0, x1); \
- } while (0);
-#define set_aapcs_args3(ctx, x0, x1, x2, x3) do { \
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X3, x3); \
- set_aapcs_args2(ctx, x0, x1, x2); \
- } while (0);
-#define set_aapcs_args4(ctx, x0, x1, x2, x3, x4) do { \
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X4, x4); \
- set_aapcs_args3(ctx, x0, x1, x2, x3); \
- } while (0);
-#define set_aapcs_args5(ctx, x0, x1, x2, x3, x4, x5) do { \
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X5, x5); \
- set_aapcs_args4(ctx, x0, x1, x2, x3, x4); \
- } while (0);
-#define set_aapcs_args6(ctx, x0, x1, x2, x3, x4, x5, x6) do { \
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X6, x6); \
- set_aapcs_args5(ctx, x0, x1, x2, x3, x4, x5); \
- } while (0);
-#define set_aapcs_args7(ctx, x0, x1, x2, x3, x4, x5, x6, x7) do { \
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X7, x7); \
- set_aapcs_args6(ctx, x0, x1, x2, x3, x4, x5, x6); \
- } while (0);
-
-/*******************************************************************************
- * Function prototypes
- ******************************************************************************/
-void el1_sysregs_context_save(el1_sys_regs_t *regs);
-void el1_sysregs_context_restore(el1_sys_regs_t *regs);
-#if CTX_INCLUDE_FPREGS
-void fpregs_context_save(fp_regs_t *regs);
-void fpregs_context_restore(fp_regs_t *regs);
-#endif
-
-
-#undef CTX_SYSREG_ALL
-#if CTX_INCLUDE_FPREGS
-#undef CTX_FPREG_ALL
-#endif
-#undef CTX_GPREG_ALL
-#undef CTX_EL3STATE_ALL
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __CONTEXT_H__ */
diff --git a/include/common/context_mgmt.h b/include/common/context_mgmt.h
deleted file mode 100644
index a76ecbe3..00000000
--- a/include/common/context_mgmt.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __CM_H__
-#define __CM_H__
-
-#include <arch.h>
-#include <bl_common.h>
-
-/*******************************************************************************
- * Forward declarations
- ******************************************************************************/
-struct entry_point_info;
-
-/*******************************************************************************
- * Function & variable prototypes
- ******************************************************************************/
-void cm_init(void);
-void *cm_get_context_by_mpidr(uint64_t mpidr,
- uint32_t security_state) __deprecated;
-void cm_set_context_by_mpidr(uint64_t mpidr,
- void *context,
- uint32_t security_state) __deprecated;
-void *cm_get_context_by_index(unsigned int cpu_idx,
- unsigned int security_state);
-void cm_set_context_by_index(unsigned int cpu_idx,
- void *context,
- unsigned int security_state);
-void *cm_get_context(uint32_t security_state);
-void cm_set_context(void *context, uint32_t security_state);
-void cm_init_context(uint64_t mpidr,
- const struct entry_point_info *ep) __deprecated;
-void cm_init_my_context(const struct entry_point_info *ep);
-void cm_init_context_by_index(unsigned int cpu_idx,
- const struct entry_point_info *ep);
-void cm_prepare_el3_exit(uint32_t security_state);
-void cm_el1_sysregs_context_save(uint32_t security_state);
-void cm_el1_sysregs_context_restore(uint32_t security_state);
-void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint);
-void cm_set_elr_spsr_el3(uint32_t security_state,
- uint64_t entrypoint, uint32_t spsr);
-void cm_write_scr_el3_bit(uint32_t security_state,
- uint32_t bit_pos,
- uint32_t value);
-void cm_set_next_eret_context(uint32_t security_state);
-uint32_t cm_get_scr_el3(uint32_t security_state);
-
-/* Inline definitions */
-
-/*******************************************************************************
- * This function is used to program the context that's used for exception
- * return. This initializes the SP_EL3 to a pointer to a 'cpu_context' set for
- * the required security state
- ******************************************************************************/
-static inline void cm_set_next_context(void *context)
-{
-#if DEBUG
- uint64_t sp_mode;
-
- /*
- * Check that this function is called with SP_EL0 as the stack
- * pointer
- */
- __asm__ volatile("mrs %0, SPSel\n"
- : "=r" (sp_mode));
-
- assert(sp_mode == MODE_SP_EL0);
-#endif
-
- __asm__ volatile("msr spsel, #1\n"
- "mov sp, %0\n"
- "msr spsel, #0\n"
- : : "r" (context));
-}
-#endif /* __CM_H__ */
diff --git a/include/common/runtime_svc.h b/include/common/runtime_svc.h
new file mode 100644
index 00000000..adafcee4
--- /dev/null
+++ b/include/common/runtime_svc.h
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __RUNTIME_SVC_H__
+#define __RUNTIME_SVC_H__
+
+#include <bl_common.h> /* to include exception types */
+#include <smcc_helpers.h> /* to include SMCC definitions */
+
+
+/*******************************************************************************
+ * Structure definition, typedefs & constants for the runtime service framework
+ ******************************************************************************/
+
+/*
+ * Constants to allow the assembler access a runtime service
+ * descriptor
+ */
+#define RT_SVC_SIZE_LOG2 5
+#define SIZEOF_RT_SVC_DESC (1 << RT_SVC_SIZE_LOG2)
+#define RT_SVC_DESC_INIT 16
+#define RT_SVC_DESC_HANDLE 24
+
+/*
+ * The function identifier has 6 bits for the owning entity number and
+ * single bit for the type of smc call. When taken together these
+ * values limit the maximum number of runtime services to 128.
+ */
+#define MAX_RT_SVCS 128
+
+#ifndef __ASSEMBLY__
+
+/* Prototype for runtime service initializing function */
+typedef int32_t (*rt_svc_init_t)(void);
+
+/*
+ * Prototype for runtime service SMC handler function. x0 (SMC Function ID) to
+ * x4 are as passed by the caller. Rest of the arguments to SMC and the context
+ * can be accessed using the handle pointer. The cookie parameter is reserved
+ * for future use
+ */
+typedef uintptr_t (*rt_svc_handle_t)(uint32_t smc_fid,
+ u_register_t x1,
+ u_register_t x2,
+ u_register_t x3,
+ u_register_t x4,
+ void *cookie,
+ void *handle,
+ u_register_t flags);
+typedef struct rt_svc_desc {
+ uint8_t start_oen;
+ uint8_t end_oen;
+ uint8_t call_type;
+ const char *name;
+ rt_svc_init_t init;
+ rt_svc_handle_t handle;
+} rt_svc_desc_t;
+
+/*
+ * Convenience macro to declare a service descriptor
+ */
+#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \
+ static const rt_svc_desc_t __svc_desc_ ## _name \
+ __section("rt_svc_descs") __used = { \
+ .start_oen = _start, \
+ .end_oen = _end, \
+ .call_type = _type, \
+ .name = #_name, \
+ .init = _setup, \
+ .handle = _smch }
+
+/*
+ * Compile time assertions related to the 'rt_svc_desc' structure to:
+ * 1. ensure that the assembler and the compiler view of the size
+ * of the structure are the same.
+ * 2. ensure that the assembler and the compiler see the initialisation
+ * routine at the same offset.
+ * 3. ensure that the assembler and the compiler see the handler
+ * routine at the same offset.
+ */
+CASSERT((sizeof(rt_svc_desc_t) == SIZEOF_RT_SVC_DESC), \
+ assert_sizeof_rt_svc_desc_mismatch);
+CASSERT(RT_SVC_DESC_INIT == __builtin_offsetof(rt_svc_desc_t, init), \
+ assert_rt_svc_desc_init_offset_mismatch);
+CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), \
+ assert_rt_svc_desc_handle_offset_mismatch);
+
+
+/*
+ * This macro combines the call type and the owning entity number corresponding
+ * to a runtime service to generate a unique owning entity number. This unique
+ * oen is used to access an entry in the 'rt_svc_descs_indices' array. The entry
+ * contains the index of the service descriptor in the 'rt_svc_descs' array.
+ */
+#define get_unique_oen(oen, call_type) ((oen & FUNCID_OEN_MASK) | \
+ ((call_type & FUNCID_TYPE_MASK) \
+ << FUNCID_OEN_WIDTH))
+
+/*******************************************************************************
+ * Function & variable prototypes
+ ******************************************************************************/
+void runtime_svc_init(void);
+extern uintptr_t __RT_SVC_DESCS_START__;
+extern uintptr_t __RT_SVC_DESCS_END__;
+void init_crash_reporting(void);
+
+#endif /*__ASSEMBLY__*/
+#endif /* __RUNTIME_SVC_H__ */
diff --git a/include/common/smcc_helpers.h b/include/common/smcc_helpers.h
deleted file mode 100644
index 6a07b013..00000000
--- a/include/common/smcc_helpers.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __SMCC_HELPERS_H__
-#define __SMCC_HELPERS_H__
-
-/*******************************************************************************
- * Bit definitions inside the function id as per the SMC calling convention
- ******************************************************************************/
-#define FUNCID_TYPE_SHIFT 31
-#define FUNCID_CC_SHIFT 30
-#define FUNCID_OEN_SHIFT 24
-#define FUNCID_NUM_SHIFT 0
-
-#define FUNCID_TYPE_MASK 0x1
-#define FUNCID_CC_MASK 0x1
-#define FUNCID_OEN_MASK 0x3f
-#define FUNCID_NUM_MASK 0xffff
-
-#define FUNCID_TYPE_WIDTH 1
-#define FUNCID_CC_WIDTH 1
-#define FUNCID_OEN_WIDTH 6
-#define FUNCID_NUM_WIDTH 16
-
-#define GET_SMC_CC(id) ((id >> FUNCID_CC_SHIFT) & \
- FUNCID_CC_MASK)
-#define GET_SMC_TYPE(id) ((id >> FUNCID_TYPE_SHIFT) & \
- FUNCID_TYPE_MASK)
-
-#define SMC_64 1
-#define SMC_32 0
-#define SMC_UNK 0xffffffff
-#define SMC_TYPE_FAST 1
-#define SMC_TYPE_STD 0
-#define SMC_PREEMPTED 0xfffffffe
-/*******************************************************************************
- * Owning entity number definitions inside the function id as per the SMC
- * calling convention
- ******************************************************************************/
-#define OEN_ARM_START 0
-#define OEN_ARM_END 0
-#define OEN_CPU_START 1
-#define OEN_CPU_END 1
-#define OEN_SIP_START 2
-#define OEN_SIP_END 2
-#define OEN_OEM_START 3
-#define OEN_OEM_END 3
-#define OEN_STD_START 4 /* Standard Calls */
-#define OEN_STD_END 4
-#define OEN_TAP_START 48 /* Trusted Applications */
-#define OEN_TAP_END 49
-#define OEN_TOS_START 50 /* Trusted OS */
-#define OEN_TOS_END 63
-#define OEN_LIMIT 64
-
-#ifndef __ASSEMBLY__
-
-#include <cassert.h>
-#include <context.h>
-#include <stdint.h>
-
-/* Various flags passed to SMC handlers */
-#define SMC_FROM_SECURE (0 << 0)
-#define SMC_FROM_NON_SECURE (1 << 0)
-
-#define is_caller_non_secure(_f) (!!(_f & SMC_FROM_NON_SECURE))
-#define is_caller_secure(_f) (!(is_caller_non_secure(_f)))
-
-/* Convenience macros to return from SMC handler */
-#define SMC_RET0(_h) { \
- return (uint64_t) (_h); \
-}
-#define SMC_RET1(_h, _x0) { \
- write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X0, (_x0)); \
- SMC_RET0(_h); \
-}
-#define SMC_RET2(_h, _x0, _x1) { \
- write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X1, (_x1)); \
- SMC_RET1(_h, (_x0)); \
-}
-#define SMC_RET3(_h, _x0, _x1, _x2) { \
- write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X2, (_x2)); \
- SMC_RET2(_h, (_x0), (_x1)); \
-}
-#define SMC_RET4(_h, _x0, _x1, _x2, _x3) { \
- write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X3, (_x3)); \
- SMC_RET3(_h, (_x0), (_x1), (_x2)); \
-}
-
-/*
- * Convenience macros to access general purpose registers using handle provided
- * to SMC handler. These takes the offset values defined in context.h
- */
-#define SMC_GET_GP(_h, _g) \
- read_ctx_reg(get_gpregs_ctx(_h), (_g));
-#define SMC_SET_GP(_h, _g, _v) \
- write_ctx_reg(get_gpregs_ctx(_h), (_g), (_v));
-
-/*
- * Convenience macros to access EL3 context registers using handle provided to
- * SMC handler. These takes the offset values defined in context.h
- */
-#define SMC_GET_EL3(_h, _e) \
- read_ctx_reg(get_el3state_ctx(_h), (_e));
-#define SMC_SET_EL3(_h, _e, _v) \
- write_ctx_reg(get_el3state_ctx(_h), (_e), (_v));
-
-/* The macro below is used to identify a Standard Service SMC call */
-#define is_std_svc_call(_fid) ((((_fid) >> FUNCID_OEN_SHIFT) & \
- FUNCID_OEN_MASK) == OEN_STD_START)
-
-/* The macro below is used to identify a valid Fast SMC call */
-#define is_valid_fast_smc(_fid) ((!(((_fid) >> 16) & 0xff)) && \
- (GET_SMC_TYPE(_fid) == SMC_TYPE_FAST))
-
-/*
- * Macro to define UUID for services. Apart from defining and initializing a
- * uuid_t structure, this macro verifies that the first word of the defined UUID
- * does not equal SMC_UNK. This is to ensure that the caller won't mistake the
- * returned UUID in x0 for an invalid SMC error return
- */
-#define DEFINE_SVC_UUID(_name, _tl, _tm, _th, _cl, _ch, \
- _n0, _n1, _n2, _n3, _n4, _n5) \
- CASSERT(_tl != SMC_UNK, invalid_svc_uuid);\
- static const uuid_t _name = { \
- _tl, _tm, _th, _cl, _ch, \
- { _n0, _n1, _n2, _n3, _n4, _n5 } \
- }
-
-/* Return a UUID in the SMC return registers */
-#define SMC_UUID_RET(_h, _uuid) \
- SMC_RET4(handle, ((const uint32_t *) &(_uuid))[0], \
- ((const uint32_t *) &(_uuid))[1], \
- ((const uint32_t *) &(_uuid))[2], \
- ((const uint32_t *) &(_uuid))[3])
-
-#endif /*__ASSEMBLY__*/
-#endif /* __SMCC_HELPERS_H__ */