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-rw-r--r--include/common/debug.h7
-rw-r--r--include/common/el3_common_macros.S11
2 files changed, 13 insertions, 5 deletions
diff --git a/include/common/debug.h b/include/common/debug.h
index d198c321..41c8df0c 100644
--- a/include/common/debug.h
+++ b/include/common/debug.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -31,8 +31,6 @@
#ifndef __DEBUG_H__
#define __DEBUG_H__
-#include <stdio.h>
-
/* The log output macros print output to the console. These macros produce
* compiled log output only if the LOG_LEVEL defined in the makefile (or the
* make command line) is greater or equal than the level required for that
@@ -49,6 +47,8 @@
#define LOG_LEVEL_INFO 40
#define LOG_LEVEL_VERBOSE 50
+#ifndef __ASSEMBLY__
+#include <stdio.h>
#if LOG_LEVEL >= LOG_LEVEL_NOTICE
# define NOTICE(...) tf_printf("NOTICE: " __VA_ARGS__)
@@ -86,4 +86,5 @@ void __dead2 do_panic(void);
void tf_printf(const char *fmt, ...) __printflike(1, 2);
+#endif /* __ASSEMBLY__ */
#endif /* __DEBUG_H__ */
diff --git a/include/common/el3_common_macros.S b/include/common/el3_common_macros.S
index 0cd85c34..ba80d95d 100644
--- a/include/common/el3_common_macros.S
+++ b/include/common/el3_common_macros.S
@@ -70,8 +70,15 @@
isb
/* ---------------------------------------------------------------------
- * Enable the SError interrupt now that the exception vectors have been
- * setup.
+ * Early set RES1 bits in SCR_EL3. Set EA bit as well to catch both
+ * External Aborts and SError Interrupts in EL3.
+ * ---------------------------------------------------------------------
+ */
+ mov x0, #(SCR_RES1_BITS | SCR_EA_BIT)
+ msr scr_el3, x0
+ /* ---------------------------------------------------------------------
+ * Enable External Aborts and SError Interrupts now that the exception
+ * vectors have been setup.
* ---------------------------------------------------------------------
*/
msr daifclr, #DAIF_ABT_BIT