diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/aarch64/arch_helpers.h | 1 | ||||
| -rw-r--r-- | include/lib/psci/psci.h | 16 | ||||
| -rw-r--r-- | include/lib/xlat_tables.h | 14 | ||||
| -rw-r--r-- | include/plat/arm/common/plat_arm.h | 10 | ||||
| -rw-r--r-- | include/plat/arm/css/common/css_def.h | 10 | ||||
| -rw-r--r-- | include/plat/arm/css/common/css_pm.h | 1 |
6 files changed, 50 insertions, 2 deletions
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index f9f0715f..4d936ad5 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -273,6 +273,7 @@ DEFINE_SYSREG_RW_FUNCS(cntvoff_el2) DEFINE_SYSREG_RW_FUNCS(vpidr_el2) DEFINE_SYSREG_RW_FUNCS(vmpidr_el2) +DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el0) DEFINE_SYSREG_READ_FUNC(isr_el1) diff --git a/include/lib/psci/psci.h b/include/lib/psci/psci.h index a583fef7..02cbbf35 100644 --- a/include/lib/psci/psci.h +++ b/include/lib/psci/psci.h @@ -78,6 +78,8 @@ #define PSCI_SYSTEM_OFF 0x84000008 #define PSCI_SYSTEM_RESET 0x84000009 #define PSCI_FEATURES 0x8400000A +#define PSCI_NODE_HW_STATE_AARCH32 0x8400000d +#define PSCI_NODE_HW_STATE_AARCH64 0xc400000d #define PSCI_SYSTEM_SUSPEND_AARCH32 0x8400000E #define PSCI_SYSTEM_SUSPEND_AARCH64 0xc400000E #define PSCI_STAT_RESIDENCY_AARCH32 0x84000010 @@ -200,6 +202,17 @@ typedef enum { } aff_info_state_t; /* + * These are the power states reported by PSCI_NODE_HW_STATE API for the + * specified CPU. The definitions of these states can be found in Section 5.15.3 + * of PSCI specification (ARM DEN 0022C). + */ +typedef enum { + HW_ON = 0, + HW_OFF = 1, + HW_STANDBY = 2 +} node_hw_state_t; + +/* * Macro to represent invalid affinity level within PSCI. */ #define PSCI_INVALID_PWR_LVL (PLAT_MAX_PWR_LVL + 1) @@ -293,6 +306,7 @@ typedef struct plat_psci_ops { int (*translate_power_state_by_mpidr)(u_register_t mpidr, unsigned int power_state, psci_power_state_t *output_state); + int (*get_node_hw_state)(u_register_t mpidr, unsigned int power_level); } plat_psci_ops_t; /******************************************************************************* @@ -330,6 +344,8 @@ int psci_affinity_info(u_register_t target_affinity, int psci_migrate(u_register_t target_cpu); int psci_migrate_info_type(void); long psci_migrate_info_up_cpu(void); +int psci_node_hw_state(u_register_t target_cpu, + unsigned int power_level); int psci_features(unsigned int psci_fid); void __dead2 psci_power_down_wfi(void); void psci_arch_setup(void); diff --git a/include/lib/xlat_tables.h b/include/lib/xlat_tables.h index d2ac6db6..0e9800ab 100644 --- a/include/lib/xlat_tables.h +++ b/include/lib/xlat_tables.h @@ -32,13 +32,27 @@ #define __XLAT_TABLES_H__ /* Miscellaneous MMU related constants */ +#define NUM_2MB_IN_GB (1 << 9) +#define NUM_4K_IN_2MB (1 << 9) +#define NUM_GB_IN_4GB (1 << 2) + +#define TWO_MB_SHIFT 21 +#define ONE_GB_SHIFT 30 #define FOUR_KB_SHIFT 12 +#define ONE_GB_INDEX(x) ((x) >> ONE_GB_SHIFT) +#define TWO_MB_INDEX(x) ((x) >> TWO_MB_SHIFT) +#define FOUR_KB_INDEX(x) ((x) >> FOUR_KB_SHIFT) + #define INVALID_DESC 0x0 #define BLOCK_DESC 0x1 /* Table levels 0-2 */ #define TABLE_DESC 0x3 /* Table levels 0-2 */ #define PAGE_DESC 0x3 /* Table level 3 */ +#define FIRST_LEVEL_DESC_N ONE_GB_SHIFT +#define SECOND_LEVEL_DESC_N TWO_MB_SHIFT +#define THIRD_LEVEL_DESC_N FOUR_KB_SHIFT + #define XN (1ull << 2) #define PXN (1ull << 1) #define CONT_HINT (1ull << 0) diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index 25aab249..d2e8729b 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -37,6 +37,12 @@ #include <utils.h> #include <xlat_tables.h> +/******************************************************************************* + * Forward declarations + ******************************************************************************/ +struct bl31_params; +struct meminfo; + #define ARM_CASSERT_MMAP \ CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ <= MAX_MMAP_REGIONS, \ @@ -145,7 +151,7 @@ void arm_bl1_platform_setup(void); void arm_bl1_plat_arch_setup(void); /* BL2 utility functions */ -void arm_bl2_early_platform_setup(meminfo_t *mem_layout); +void arm_bl2_early_platform_setup(struct meminfo *mem_layout); void arm_bl2_platform_setup(void); void arm_bl2_plat_arch_setup(void); uint32_t arm_get_spsr_for_bl32_entry(void); @@ -158,7 +164,7 @@ void arm_bl2u_platform_setup(void); void arm_bl2u_plat_arch_setup(void); /* BL31 utility functions */ -void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, +void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, void *plat_params_from_bl2); void arm_bl31_platform_setup(void); void arm_bl31_plat_runtime_setup(void); diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h index 636daf29..173de1b4 100644 --- a/include/plat/arm/css/common/css_def.h +++ b/include/plat/arm/css/common/css_def.h @@ -148,5 +148,15 @@ /* Trusted mailbox base address common to all CSS */ #define PLAT_ARM_TRUSTED_MAILBOX_BASE ARM_TRUSTED_SRAM_BASE +/* + * Parsing of CPU and Cluster states, as returned by 'Get CSS Power State' SCP + * command + */ +#define CSS_CLUSTER_PWR_STATE_ON 0 +#define CSS_CLUSTER_PWR_STATE_OFF 3 + +#define CSS_CPU_PWR_STATE_ON 1 +#define CSS_CPU_PWR_STATE_OFF 0 +#define CSS_CPU_PWR_STATE(state, n) (((state) >> (n)) & 1) #endif /* __CSS_DEF_H__ */ diff --git a/include/plat/arm/css/common/css_pm.h b/include/plat/arm/css/common/css_pm.h index ea6a5d25..4a6ca816 100644 --- a/include/plat/arm/css/common/css_pm.h +++ b/include/plat/arm/css/common/css_pm.h @@ -45,5 +45,6 @@ void __dead2 css_system_off(void); void __dead2 css_system_reset(void); void css_cpu_standby(plat_local_state_t cpu_state); void css_get_sys_suspend_power_state(psci_power_state_t *req_state); +int css_node_hw_state(u_register_t mpidr, unsigned int power_level); #endif /* __CSS_PM_H__ */ |