diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/common/el3_common_macros.S | 11 | ||||
| -rw-r--r-- | include/drivers/auth/auth_common.h | 5 | ||||
| -rw-r--r-- | include/lib/aarch64/arch.h | 5 | ||||
| -rw-r--r-- | include/lib/aarch64/arch_helpers.h | 18 | ||||
| -rw-r--r-- | include/plat/arm/board/common/board_arm_def.h | 6 | ||||
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 39 | ||||
| -rw-r--r-- | include/plat/arm/soc/common/soc_css_def.h | 7 | ||||
| -rw-r--r-- | include/plat/common/platform.h | 4 |
8 files changed, 69 insertions, 26 deletions
diff --git a/include/common/el3_common_macros.S b/include/common/el3_common_macros.S index 0cd85c34..ba80d95d 100644 --- a/include/common/el3_common_macros.S +++ b/include/common/el3_common_macros.S @@ -70,8 +70,15 @@ isb /* --------------------------------------------------------------------- - * Enable the SError interrupt now that the exception vectors have been - * setup. + * Early set RES1 bits in SCR_EL3. Set EA bit as well to catch both + * External Aborts and SError Interrupts in EL3. + * --------------------------------------------------------------------- + */ + mov x0, #(SCR_RES1_BITS | SCR_EA_BIT) + msr scr_el3, x0 + /* --------------------------------------------------------------------- + * Enable External Aborts and SError Interrupts now that the exception + * vectors have been setup. * --------------------------------------------------------------------- */ msr daifclr, #DAIF_ABT_BIT diff --git a/include/drivers/auth/auth_common.h b/include/drivers/auth/auth_common.h index 52a895e4..456f69f2 100644 --- a/include/drivers/auth/auth_common.h +++ b/include/drivers/auth/auth_common.h @@ -46,6 +46,7 @@ typedef enum auth_param_type_enum { AUTH_PARAM_SIG_ALG, /* The image signature algorithm */ AUTH_PARAM_HASH, /* A hash (including the algorithm) */ AUTH_PARAM_PUB_KEY, /* A public key */ + AUTH_PARAM_NV_CTR, /* A non-volatile counter */ } auth_param_type_t; /* @@ -80,6 +81,7 @@ typedef enum auth_method_type_enum { AUTH_METHOD_NONE = 0, AUTH_METHOD_HASH, /* Authenticate by hash matching */ AUTH_METHOD_SIG, /* Authenticate by PK operation */ + AUTH_METHOD_NV_CTR, /* Authenticate by Non-Volatile Counter */ AUTH_METHOD_NUM /* Number of methods */ } auth_method_type_t; @@ -105,7 +107,8 @@ typedef struct auth_method_param_sig_s { * Parameters for authentication by NV counter */ typedef struct auth_method_param_nv_ctr_s { - auth_param_type_desc_t *nv_ctr; /* NV counter value */ + auth_param_type_desc_t *cert_nv_ctr; /* NV counter in certificate */ + auth_param_type_desc_t *plat_nv_ctr; /* NV counter in platform */ } auth_method_param_nv_ctr_t; /* diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index a9b2dbb2..f9b8ed6a 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -186,6 +186,11 @@ #define HCR_IMO_BIT (1 << 4) #define HCR_FMO_BIT (1 << 3) +/* ISR definitions */ +#define ISR_A_SHIFT 8 +#define ISR_I_SHIFT 7 +#define ISR_F_SHIFT 6 + /* CNTHCTL_EL2 definitions */ #define EVNTEN_BIT (1 << 2) #define EL1PCEN_BIT (1 << 1) diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index d1ad31dc..f9f0715f 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -113,15 +113,6 @@ static inline void _op ## _type(uint64_t v) \ } /******************************************************************************* - * Aarch64 translation tables manipulation helper prototypes -******************************************************************************/ -uint64_t create_table_desc(uint64_t *next_table_ptr); -uint64_t create_block_desc(uint64_t desc, uint64_t addr, uint32_t level); -uint64_t create_device_block(uint64_t output_addr, uint32_t level, uint32_t ns); -uint64_t create_romem_block(uint64_t output_addr, uint32_t level, uint32_t ns); -uint64_t create_rwmem_block(uint64_t output_addr, uint32_t level, uint32_t ns); - -/******************************************************************************* * TLB maintenance accessor prototypes ******************************************************************************/ DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1) @@ -168,15 +159,6 @@ void disable_mmu_icache_el3(void); DEFINE_SYSREG_WRITE_CONST_FUNC(daifset) DEFINE_SYSREG_WRITE_CONST_FUNC(daifclr) -#define enable_irq() write_daifclr(DAIF_IRQ_BIT) -#define enable_fiq() write_daifclr(DAIF_FIQ_BIT) -#define enable_serror() write_daifclr(DAIF_ABT_BIT) -#define enable_debug_exceptions() write_daifclr(DAIF_DBG_BIT) -#define disable_irq() write_daifset(DAIF_IRQ_BIT) -#define disable_fiq() write_daifset(DAIF_FIQ_BIT) -#define disable_serror() write_daifset(DAIF_ABT_BIT) -#define disable_debug_exceptions() write_daifset(DAIF_DBG_BIT) - DEFINE_SYSREG_READ_FUNC(par_el1) DEFINE_SYSREG_READ_FUNC(id_pfr1_el1) DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1) diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h index b065537d..d70fbb46 100644 --- a/include/plat/arm/board/common/board_arm_def.h +++ b/include/plat/arm/board/common/board_arm_def.h @@ -75,10 +75,10 @@ */ #if IMAGE_BL31 || IMAGE_BL32 # define PLAT_ARM_MMAP_ENTRIES 6 -# define MAX_XLAT_TABLES 3 -#else -# define PLAT_ARM_MMAP_ENTRIES 9 # define MAX_XLAT_TABLES 4 +#else +# define PLAT_ARM_MMAP_ENTRIES 10 +# define MAX_XLAT_TABLES 5 #endif #endif /* ARM_BOARD_OPTIMISE_MMAP */ diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index d04f9d6f..18fe7180 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -165,6 +165,12 @@ TSP_SEC_MEM_SIZE, \ MT_MEMORY | MT_RW | MT_SECURE) +#if ARM_BL31_IN_DRAM +#define ARM_MAP_BL31_SEC_DRAM MAP_REGION_FLAT( \ + BL31_BASE, \ + PLAT_ARM_MAX_BL31_SIZE, \ + MT_MEMORY | MT_RW | MT_SECURE) +#endif /* * The number of regions like RO(code), coherent and data required by @@ -240,15 +246,32 @@ /******************************************************************************* * BL2 specific defines. ******************************************************************************/ +#if ARM_BL31_IN_DRAM +/* + * BL31 is loaded in the DRAM. + * Put BL2 just below BL1. + */ +#define BL2_BASE (BL1_RW_BASE - PLAT_ARM_MAX_BL2_SIZE) +#define BL2_LIMIT BL1_RW_BASE +#else /* * Put BL2 just below BL31. */ #define BL2_BASE (BL31_BASE - PLAT_ARM_MAX_BL2_SIZE) #define BL2_LIMIT BL31_BASE +#endif /******************************************************************************* * BL31 specific defines. ******************************************************************************/ +#if ARM_BL31_IN_DRAM +/* + * Put BL31 at the bottom of TZC secured DRAM + */ +#define BL31_BASE ARM_AP_TZC_DRAM1_BASE +#define BL31_LIMIT (ARM_AP_TZC_DRAM1_BASE + \ + PLAT_ARM_MAX_BL31_SIZE) +#else /* * Put BL31 at the top of the Trusted SRAM. */ @@ -257,6 +280,7 @@ PLAT_ARM_MAX_BL31_SIZE) #define BL31_PROGBITS_LIMIT BL1_RW_BASE #define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) +#endif /******************************************************************************* * BL32 specific defines. @@ -266,7 +290,16 @@ * Trusted DRAM (if available) or the DRAM region secured by the TrustZone * controller. */ -#if ARM_TSP_RAM_LOCATION_ID == ARM_TRUSTED_SRAM_ID +#if ARM_BL31_IN_DRAM +# define TSP_SEC_MEM_BASE (ARM_AP_TZC_DRAM1_BASE + \ + PLAT_ARM_MAX_BL31_SIZE) +# define TSP_SEC_MEM_SIZE (ARM_AP_TZC_DRAM1_SIZE - \ + PLAT_ARM_MAX_BL31_SIZE) +# define BL32_BASE (ARM_AP_TZC_DRAM1_BASE + \ + PLAT_ARM_MAX_BL31_SIZE) +# define BL32_LIMIT (ARM_AP_TZC_DRAM1_BASE + \ + ARM_AP_TZC_DRAM1_SIZE) +#elif ARM_TSP_RAM_LOCATION_ID == ARM_TRUSTED_SRAM_ID # define TSP_SEC_MEM_BASE ARM_BL_RAM_BASE # define TSP_SEC_MEM_SIZE ARM_BL_RAM_SIZE # define TSP_PROGBITS_LIMIT BL2_BASE @@ -292,7 +325,11 @@ * FWU Images: NS_BL1U, BL2U & NS_BL2U defines. ******************************************************************************/ #define BL2U_BASE BL2_BASE +#if ARM_BL31_IN_DRAM +#define BL2U_LIMIT BL1_RW_BASE +#else #define BL2U_LIMIT BL31_BASE +#endif #define NS_BL2U_BASE ARM_NS_DRAM1_BASE #define NS_BL1U_BASE (PLAT_ARM_NVM_BASE + 0x03EB8000) diff --git a/include/plat/arm/soc/common/soc_css_def.h b/include/plat/arm/soc/common/soc_css_def.h index 428df4d2..f1396a6c 100644 --- a/include/plat/arm/soc/common/soc_css_def.h +++ b/include/plat/arm/soc/common/soc_css_def.h @@ -65,6 +65,13 @@ */ #define SOC_CSS_NIC400_APB4_BRIDGE 4 +/* Non-volatile counters */ +#define SOC_TRUSTED_NVCTR_BASE 0x7fe70000 +#define TFW_NVCTR_BASE (SOC_TRUSTED_NVCTR_BASE + 0x0000) +#define TFW_NVCTR_SIZE 4 +#define NTFW_CTR_BASE (SOC_TRUSTED_NVCTR_BASE + 0x0004) +#define NTFW_CTR_SIZE 4 + /* Keys */ #define SOC_KEYS_BASE 0x7fe80000 #define TZ_PUB_KEY_HASH_BASE (SOC_KEYS_BASE + 0x0000) diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h index 5c61f381..58575012 100644 --- a/include/plat/common/platform.h +++ b/include/plat/common/platform.h @@ -60,7 +60,7 @@ uint64_t plat_get_syscnt_freq(void); int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, uintptr_t *image_spec); -unsigned long plat_get_ns_image_entrypoint(void); +uintptr_t plat_get_ns_image_entrypoint(void); unsigned int plat_my_core_pos(void); int plat_core_pos_by_mpidr(u_register_t mpidr); @@ -249,6 +249,8 @@ void bl32_plat_enable_mmu(uint32_t flags); ******************************************************************************/ int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len, unsigned int *flags); +int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr); +int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr); #if ENABLE_PLAT_COMPAT /* |