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Diffstat (limited to 'plat/fvp/fvp_pm.c')
-rw-r--r--plat/fvp/fvp_pm.c43
1 files changed, 16 insertions, 27 deletions
diff --git a/plat/fvp/fvp_pm.c b/plat/fvp/fvp_pm.c
index 03f06e7c..55f465ba 100644
--- a/plat/fvp/fvp_pm.c
+++ b/plat/fvp/fvp_pm.c
@@ -29,11 +29,13 @@
*/
#include <arch_helpers.h>
+#include <arm_gic.h>
#include <assert.h>
#include <bakery_lock.h>
#include <cci400.h>
#include <mmio.h>
#include <platform.h>
+#include <plat_config.h>
#include <platform_def.h>
#include <psci.h>
#include "drivers/pwrc/fvp_pwrc.h"
@@ -129,8 +131,7 @@ int fvp_affinst_off(unsigned long mpidr,
unsigned int state)
{
int rc = PSCI_E_SUCCESS;
- unsigned int gicc_base, ectlr;
- unsigned long cpu_setup, cci_setup;
+ unsigned int ectlr;
switch (afflvl) {
case MPIDR_AFFLVL1:
@@ -139,10 +140,8 @@ int fvp_affinst_off(unsigned long mpidr,
* Disable coherency if this cluster is to be
* turned off
*/
- cci_setup = fvp_get_cfgvar(CONFIG_HAS_CCI);
- if (cci_setup) {
+ if (get_plat_config()->flags & CONFIG_HAS_CCI)
cci_disable_coherency(mpidr);
- }
/*
* Program the power controller to turn the
@@ -160,8 +159,7 @@ int fvp_affinst_off(unsigned long mpidr,
* Take this cpu out of intra-cluster coherency if
* the FVP flavour supports the SMP bit.
*/
- cpu_setup = fvp_get_cfgvar(CONFIG_CPU_SETUP);
- if (cpu_setup) {
+ if (get_plat_config()->flags & CONFIG_CPUECTLR_SMP_BIT) {
ectlr = read_cpuectlr();
ectlr &= ~CPUECTLR_SMP_BIT;
write_cpuectlr(ectlr);
@@ -171,8 +169,7 @@ int fvp_affinst_off(unsigned long mpidr,
* Prevent interrupts from spuriously waking up
* this cpu
*/
- gicc_base = fvp_get_cfgvar(CONFIG_GICC_ADDR);
- gic_cpuif_deactivate(gicc_base);
+ arm_gic_cpuif_deactivate();
/*
* Program the power controller to power this
@@ -208,8 +205,8 @@ int fvp_affinst_suspend(unsigned long mpidr,
unsigned int state)
{
int rc = PSCI_E_SUCCESS;
- unsigned int gicc_base, ectlr;
- unsigned long cpu_setup, cci_setup, linear_id;
+ unsigned int ectlr;
+ unsigned long linear_id;
mailbox_t *fvp_mboxes;
switch (afflvl) {
@@ -219,10 +216,8 @@ int fvp_affinst_suspend(unsigned long mpidr,
* Disable coherency if this cluster is to be
* turned off
*/
- cci_setup = fvp_get_cfgvar(CONFIG_HAS_CCI);
- if (cci_setup) {
+ if (get_plat_config()->flags & CONFIG_HAS_CCI)
cci_disable_coherency(mpidr);
- }
/*
* Program the power controller to turn the
@@ -239,8 +234,7 @@ int fvp_affinst_suspend(unsigned long mpidr,
* Take this cpu out of intra-cluster coherency if
* the FVP flavour supports the SMP bit.
*/
- cpu_setup = fvp_get_cfgvar(CONFIG_CPU_SETUP);
- if (cpu_setup) {
+ if (get_plat_config()->flags & CONFIG_CPUECTLR_SMP_BIT) {
ectlr = read_cpuectlr();
ectlr &= ~CPUECTLR_SMP_BIT;
write_cpuectlr(ectlr);
@@ -257,8 +251,7 @@ int fvp_affinst_suspend(unsigned long mpidr,
* Prevent interrupts from spuriously waking up
* this cpu
*/
- gicc_base = fvp_get_cfgvar(CONFIG_GICC_ADDR);
- gic_cpuif_deactivate(gicc_base);
+ arm_gic_cpuif_deactivate();
/*
* Program the power controller to power this
@@ -288,9 +281,9 @@ int fvp_affinst_on_finish(unsigned long mpidr,
unsigned int state)
{
int rc = PSCI_E_SUCCESS;
- unsigned long linear_id, cpu_setup;
+ unsigned long linear_id;
mailbox_t *fvp_mboxes;
- unsigned int gicd_base, gicc_base, ectlr;
+ unsigned int ectlr;
switch (afflvl) {
@@ -325,8 +318,7 @@ int fvp_affinst_on_finish(unsigned long mpidr,
* Turn on intra-cluster coherency if the FVP flavour supports
* it.
*/
- cpu_setup = fvp_get_cfgvar(CONFIG_CPU_SETUP);
- if (cpu_setup) {
+ if (get_plat_config()->flags & CONFIG_CPUECTLR_SMP_BIT) {
ectlr = read_cpuectlr();
ectlr |= CPUECTLR_SMP_BIT;
write_cpuectlr(ectlr);
@@ -345,14 +337,11 @@ int fvp_affinst_on_finish(unsigned long mpidr,
flush_dcache_range((unsigned long) &fvp_mboxes[linear_id],
sizeof(unsigned long));
- gicd_base = fvp_get_cfgvar(CONFIG_GICD_ADDR);
- gicc_base = fvp_get_cfgvar(CONFIG_GICC_ADDR);
-
/* Enable the gic cpu interface */
- gic_cpuif_setup(gicc_base);
+ arm_gic_cpuif_setup();
/* TODO: This setup is needed only after a cold boot */
- gic_pcpu_distif_setup(gicd_base);
+ arm_gic_pcpu_distif_setup();
break;