From 5f3a60301ef7a455f1c74e71e286b89cb0c97f7d Mon Sep 17 00:00:00 2001 From: Soby Mathew Date: Fri, 8 May 2015 10:18:59 +0100 Subject: CSS: Implement topology support for System power domain This patch implements the necessary topology changes for supporting system power domain on CSS platforms. The definition of PLAT_MAX_PWR_LVL and PLAT_NUM_PWR_DOMAINS macros are removed from arm_def.h and are made platform specific. In addition, the `arm_power_domain_tree_desc[]` and `arm_pm_idle_states[]` are modified to support the system power domain at level 2. With this patch, even though the power management operations involving the system power domain will not return any error, the platform layer will silently ignore any operations to the power domain. The actual power management support for the system power domain will be added later. Change-Id: I791867eded5156754fe898f9cdc6bba361e5a379 --- include/plat/arm/common/arm_def.h | 8 +++----- include/plat/arm/common/plat_arm.h | 5 +++++ 2 files changed, 8 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index c236970a..452c3856 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -44,7 +44,8 @@ /* Special value used to verify platform parameters from BL2 to BL3-1 */ #define ARM_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL -#define ARM_CLUSTER_COUNT 2ull +#define ARM_CLUSTER_COUNT 2 +#define ARM_SYSTEM_COUNT 1 #define ARM_CACHE_WRITEBACK_SHIFT 6 @@ -54,6 +55,7 @@ */ #define ARM_PWR_LVL0 MPIDR_AFFLVL0 #define ARM_PWR_LVL1 MPIDR_AFFLVL1 +#define ARM_PWR_LVL2 MPIDR_AFFLVL2 /* * Macros for local power states in ARM platforms encoded by State-ID field @@ -179,10 +181,6 @@ #define ADDR_SPACE_SIZE (1ull << 32) -#define PLAT_NUM_PWR_DOMAINS (ARM_CLUSTER_COUNT + \ - PLATFORM_CORE_COUNT) -#define PLAT_MAX_PWR_LVL ARM_PWR_LVL1 - /* * This macro defines the deepest retention state possible. A higher state * id will represent an invalid or a power down state. diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index ad41f4f0..3c8a811c 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -123,6 +123,11 @@ void arm_configure_mmu_el3(unsigned long total_base, (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \ arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type)) +/* Make composite power state parameter till power level 2 */ +#define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ + (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \ + arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type)) + #endif /* __ARM_RECOM_STATE_ID_ENC__ */ -- cgit From c1bb8a0500149c58f59f241676751b6b87edbae6 Mon Sep 17 00:00:00 2001 From: Soby Mathew Date: Mon, 12 Oct 2015 17:32:29 +0100 Subject: Support PSCI SYSTEM SUSPEND on Juno This patch adds the capability to power down at system power domain level on Juno via the PSCI SYSTEM SUSPEND API. The CSS power management helpers are modified to add support for power management operations at system power domain level. A new helper for populating `get_sys_suspend_power_state` handler in plat_psci_ops is defined. On entering the system suspend state, the SCP powers down the SYSTOP power domain on the SoC and puts the memory into retention mode. On wakeup from the power down, the system components on the CSS will be reinitialized by the platform layer and the PSCI client is responsible for restoring the context of these system components. According to PSCI Specification, interrupts targeted to cores in PSCI CPU SUSPEND should be able to resume it. On Juno, when the system power domain is suspended, the GIC is also powered down. The SCP resumes the final core to be suspend when an external wake-up event is received. But the other cores cannot be woken up by a targeted interrupt, because GIC doesn't forward these interrupts to the SCP. Due to this hardware limitation, we down-grade PSCI CPU SUSPEND requests targeted to the system power domain level to cluster power domain level in `juno_validate_power_state()` and the CSS default `plat_arm_psci_ops` is overridden in juno_pm.c. A system power domain resume helper `arm_system_pwr_domain_resume()` is defined for ARM standard platforms which resumes/re-initializes the system components on wakeup from system suspend. The security setup also needs to be done on resume from system suspend, which means `plat_arm_security_setup()` must now be included in the BL3-1 image in addition to previous BL images if system suspend need to be supported. Change-Id: Ie293f75f09bad24223af47ab6c6e1268f77bcc47 --- include/plat/arm/common/plat_arm.h | 4 ++++ include/plat/arm/css/common/css_pm.h | 1 + 2 files changed, 5 insertions(+) (limited to 'include') diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index 3c8a811c..41a5f0ab 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -140,10 +140,14 @@ void arm_io_setup(void); /* Security utility functions */ void arm_tzc_setup(void); +/* Systimer utility function */ +void arm_configure_sys_timer(void); + /* PM utility functions */ int arm_validate_power_state(unsigned int power_state, psci_power_state_t *req_state); int arm_validate_ns_entrypoint(uintptr_t entrypoint); +void arm_system_pwr_domain_resume(void); /* Topology utility function */ int arm_check_mpidr(u_register_t mpidr); diff --git a/include/plat/arm/css/common/css_pm.h b/include/plat/arm/css/common/css_pm.h index c19df92b..ea6a5d25 100644 --- a/include/plat/arm/css/common/css_pm.h +++ b/include/plat/arm/css/common/css_pm.h @@ -44,5 +44,6 @@ void css_pwr_domain_suspend_finish( void __dead2 css_system_off(void); void __dead2 css_system_reset(void); void css_cpu_standby(plat_local_state_t cpu_state); +void css_get_sys_suspend_power_state(psci_power_state_t *req_state); #endif /* __CSS_PM_H__ */ -- cgit