From b5fa6563e68b909dc5a364163dd745a9427eb9f4 Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Wed, 18 May 2016 16:11:47 +0100 Subject: Introduce arm_setup_page_tables() function This patch introduces the arm_setup_page_tables() function to set up page tables on ARM platforms. It replaces the arm_configure_mmu_elx() functions and does the same thing except that it doesn't enable the MMU at the end. The idea is to reduce the amount of per-EL code that is generated by the C preprocessor by splitting the memory regions definitions and page tables creation (which is generic) from the MMU enablement (which is the only per-EL configuration). As a consequence, the call to the enable_mmu_elx() function has been moved up into the plat_arch_setup() hook. Any other ARM standard platforms that use the functions `arm_configure_mmu_elx()` must be updated. Change-Id: I6f12a20ce4e5187b3849a8574aac841a136de83d --- plat/arm/common/arm_bl1_setup.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'plat/arm/common/arm_bl1_setup.c') diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c index 951f48a5..1ffd7ee2 100644 --- a/plat/arm/common/arm_bl1_setup.c +++ b/plat/arm/common/arm_bl1_setup.c @@ -118,7 +118,7 @@ void bl1_early_platform_setup(void) *****************************************************************************/ void arm_bl1_plat_arch_setup(void) { - arm_configure_mmu_el3(bl1_tzram_layout.total_base, + arm_setup_page_tables(bl1_tzram_layout.total_base, bl1_tzram_layout.total_size, BL1_RO_BASE, BL1_RO_LIMIT @@ -127,6 +127,7 @@ void arm_bl1_plat_arch_setup(void) BL1_COHERENT_RAM_LIMIT #endif ); + enable_mmu_el3(0); } void bl1_plat_arch_setup(void) -- cgit From af419dd63706ea3f5f280675b8559beec7245ff5 Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Wed, 15 Jun 2016 15:44:27 +0100 Subject: ARM platforms: Restrict mapping of Trusted ROM in BL1 At the moment, on ARM platforms, BL1 maps everything from BL1_RO_BASE to BL1_RO_LIMIT. BL1_RO_LIMIT, as defined in the porting guide, is the maximum address in Trusted ROM that BL1's actual content _can_ occupy. The actual portion of ROM occupied by BL1 can be less than that, which means that BL1 might map more Trusted ROM than it actually needs to. This patch changes BL1's memory mappings on ARM platforms to restrict the region of Trusted ROM it maps. It uses the symbols exported by the linker to figure out the actual extents of BL1's ROM footprint. This change increases the number of page tables used on FVP by 1. On FVP, we used to map the whole Trusted ROM. As it is 64MB large, we used to map it as blocks of 2MB using level-2 translation table entries. We now need a finer-grained mapping, which requires an additional level-3 translation table. On ARM CSS platforms, the number of translation tables is unchanged. The BL1 image resides in flash at address 0x0BEC0000. This address is not aligned on a 2MB-boundary so a level-3 translation table was already required to map this memory. Change-Id: I317a93fd99c40e70d0f13cc3d7a570f05c6c61eb --- plat/arm/common/arm_bl1_setup.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'plat/arm/common/arm_bl1_setup.c') diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c index 1ffd7ee2..34996604 100644 --- a/plat/arm/common/arm_bl1_setup.c +++ b/plat/arm/common/arm_bl1_setup.c @@ -35,6 +35,8 @@ #include #include #include +#include +#include #include "../../../bl1/bl1_private.h" @@ -118,10 +120,16 @@ void bl1_early_platform_setup(void) *****************************************************************************/ void arm_bl1_plat_arch_setup(void) { + /* + * BL1_ROM_END is not necessarily aligned on a page boundary as it + * just points to the end of BL1's actual content in Trusted ROM. + * Therefore it needs to be rounded up to the next page size in order to + * map the whole last page of it with the right memory attributes. + */ arm_setup_page_tables(bl1_tzram_layout.total_base, bl1_tzram_layout.total_size, BL1_RO_BASE, - BL1_RO_LIMIT + round_up(BL1_ROM_END, PAGE_SIZE) #if USE_COHERENT_MEM , BL1_COHERENT_RAM_BASE, BL1_COHERENT_RAM_LIMIT -- cgit From 0af559a833e9cb1be1e1295d00e22ecab1d3f5be Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Fri, 8 Jul 2016 14:38:16 +0100 Subject: ARM platforms: Add support for SEPARATE_CODE_AND_RODATA The arm_setup_page_tables() function used to expect a single set of addresses defining the extents of the whole read-only section, code and read-only data mixed up, which was mapped as executable. This patch changes this behaviour. arm_setup_page_tables() now expects 2 separate sets of addresses: - the extents of the code section; - the extents of the read-only data section. The code is mapped as executable, whereas the data is mapped as execute-never. New #defines have been introduced to identify the extents of the code and the read-only data section. Given that all BL images except BL1 share the same memory layout and linker script structure, these #defines are common across these images. The slight memory layout differences in BL1 have been handled by providing values specific to BL1. Note that this patch also affects the Xilinx platform port, which uses the arm_setup_page_tables() function. It has been updated accordingly, such that the memory mappings on this platform are unchanged. This is achieved by passing null values as the extents of the read-only data section so that it is ignored. As a result, the whole read-only section is still mapped as executable. Fixes ARM-software/tf-issues#85 Change-Id: I1f95865c53ce6e253a01286ff56e0aa1161abac5 --- plat/arm/common/arm_bl1_setup.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'plat/arm/common/arm_bl1_setup.c') diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c index 34996604..c94f0cd7 100644 --- a/plat/arm/common/arm_bl1_setup.c +++ b/plat/arm/common/arm_bl1_setup.c @@ -120,16 +120,12 @@ void bl1_early_platform_setup(void) *****************************************************************************/ void arm_bl1_plat_arch_setup(void) { - /* - * BL1_ROM_END is not necessarily aligned on a page boundary as it - * just points to the end of BL1's actual content in Trusted ROM. - * Therefore it needs to be rounded up to the next page size in order to - * map the whole last page of it with the right memory attributes. - */ arm_setup_page_tables(bl1_tzram_layout.total_base, bl1_tzram_layout.total_size, - BL1_RO_BASE, - round_up(BL1_ROM_END, PAGE_SIZE) + BL_CODE_BASE, + BL1_CODE_LIMIT, + BL1_RO_DATA_BASE, + BL1_RO_DATA_LIMIT #if USE_COHERENT_MEM , BL1_COHERENT_RAM_BASE, BL1_COHERENT_RAM_LIMIT -- cgit