From b5fa6563e68b909dc5a364163dd745a9427eb9f4 Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Wed, 18 May 2016 16:11:47 +0100 Subject: Introduce arm_setup_page_tables() function This patch introduces the arm_setup_page_tables() function to set up page tables on ARM platforms. It replaces the arm_configure_mmu_elx() functions and does the same thing except that it doesn't enable the MMU at the end. The idea is to reduce the amount of per-EL code that is generated by the C preprocessor by splitting the memory regions definitions and page tables creation (which is generic) from the MMU enablement (which is the only per-EL configuration). As a consequence, the call to the enable_mmu_elx() function has been moved up into the plat_arch_setup() hook. Any other ARM standard platforms that use the functions `arm_configure_mmu_elx()` must be updated. Change-Id: I6f12a20ce4e5187b3849a8574aac841a136de83d --- plat/arm/common/arm_bl2u_setup.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'plat/arm/common/arm_bl2u_setup.c') diff --git a/plat/arm/common/arm_bl2u_setup.c b/plat/arm/common/arm_bl2u_setup.c index 5b7354b3..5f2634a2 100644 --- a/plat/arm/common/arm_bl2u_setup.c +++ b/plat/arm/common/arm_bl2u_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -102,7 +102,7 @@ void bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info) ******************************************************************************/ void arm_bl2u_plat_arch_setup(void) { - arm_configure_mmu_el1(BL2U_RO_LIMIT, + arm_setup_page_tables(BL2U_RO_LIMIT, BL31_LIMIT, BL2U_RO_BASE, BL2U_RO_LIMIT @@ -112,6 +112,7 @@ void arm_bl2u_plat_arch_setup(void) BL2U_COHERENT_RAM_LIMIT #endif ); + enable_mmu_el1(0); } void bl2u_plat_arch_setup(void) -- cgit From b2c96eed562b221f32f56976c7283d0e5e8503d0 Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Mon, 20 Jun 2016 10:10:40 +0100 Subject: ARM platforms: Include BL2U's RO section in total memory region This patch changes the base address of the "total" Trusted SRAM region seen by the BL2U image. It used to start just after BL2U's read-only section (i.e. at address BL2U_RO_LIMIT), it now starts from the base address of the BL2U image (i.e. at address BL2U_BASE). In other words, the "total" memory region now includes BL2U's own read-only section. This does not change BL2U's resulting memory mappings because the read-only section was already mapped in BL2U, it just wasn't part of this total memory region. Change-Id: I2da16ac842469023b41904eaa8d13ed678d65671 --- plat/arm/common/arm_bl2u_setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'plat/arm/common/arm_bl2u_setup.c') diff --git a/plat/arm/common/arm_bl2u_setup.c b/plat/arm/common/arm_bl2u_setup.c index 5f2634a2..8185f9f5 100644 --- a/plat/arm/common/arm_bl2u_setup.c +++ b/plat/arm/common/arm_bl2u_setup.c @@ -102,7 +102,7 @@ void bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info) ******************************************************************************/ void arm_bl2u_plat_arch_setup(void) { - arm_setup_page_tables(BL2U_RO_LIMIT, + arm_setup_page_tables(BL2U_BASE, BL31_LIMIT, BL2U_RO_BASE, BL2U_RO_LIMIT -- cgit From 0af559a833e9cb1be1e1295d00e22ecab1d3f5be Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Fri, 8 Jul 2016 14:38:16 +0100 Subject: ARM platforms: Add support for SEPARATE_CODE_AND_RODATA The arm_setup_page_tables() function used to expect a single set of addresses defining the extents of the whole read-only section, code and read-only data mixed up, which was mapped as executable. This patch changes this behaviour. arm_setup_page_tables() now expects 2 separate sets of addresses: - the extents of the code section; - the extents of the read-only data section. The code is mapped as executable, whereas the data is mapped as execute-never. New #defines have been introduced to identify the extents of the code and the read-only data section. Given that all BL images except BL1 share the same memory layout and linker script structure, these #defines are common across these images. The slight memory layout differences in BL1 have been handled by providing values specific to BL1. Note that this patch also affects the Xilinx platform port, which uses the arm_setup_page_tables() function. It has been updated accordingly, such that the memory mappings on this platform are unchanged. This is achieved by passing null values as the extents of the read-only data section so that it is ignored. As a result, the whole read-only section is still mapped as executable. Fixes ARM-software/tf-issues#85 Change-Id: I1f95865c53ce6e253a01286ff56e0aa1161abac5 --- plat/arm/common/arm_bl2u_setup.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) (limited to 'plat/arm/common/arm_bl2u_setup.c') diff --git a/plat/arm/common/arm_bl2u_setup.c b/plat/arm/common/arm_bl2u_setup.c index 8185f9f5..de7d0c2f 100644 --- a/plat/arm/common/arm_bl2u_setup.c +++ b/plat/arm/common/arm_bl2u_setup.c @@ -36,16 +36,6 @@ #include #include - -/* - * The next 2 constants identify the extents of the code & RO data region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. - */ -#define BL2U_RO_BASE (unsigned long)(&__RO_START__) -#define BL2U_RO_LIMIT (unsigned long)(&__RO_END__) - #if USE_COHERENT_MEM /* * The next 2 constants identify the extents of the coherent memory region. @@ -104,8 +94,10 @@ void arm_bl2u_plat_arch_setup(void) { arm_setup_page_tables(BL2U_BASE, BL31_LIMIT, - BL2U_RO_BASE, - BL2U_RO_LIMIT + BL_CODE_BASE, + BL_CODE_LIMIT, + BL_RO_DATA_BASE, + BL_RO_DATA_LIMIT #if USE_COHERENT_MEM , BL2U_COHERENT_RAM_BASE, -- cgit