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-rw-r--r--doc/hardware.md4
-rw-r--r--native/driver/etna_resource.c6
2 files changed, 10 insertions, 0 deletions
diff --git a/doc/hardware.md b/doc/hardware.md
index 54a6b94..b36ce9a 100644
--- a/doc/hardware.md
+++ b/doc/hardware.md
@@ -237,6 +237,10 @@ The tile status bits are cleared using RS, by clearing a small surface with the
0x55555555. When clearing, only the destination address and stride needs to be set,
the source is ignored.
+An invalid pattern in the tile status memory can result in hangs when rendering. This was discovered
+in tests that used a depth surface but did not clear it. The residual data in the TS are caused
+the GPU to hang mysteriously on rendering.
+
Shader ISA
================
diff --git a/native/driver/etna_resource.c b/native/driver/etna_resource.c
index acf54fd..fac5f64 100644
--- a/native/driver/etna_resource.c
+++ b/native/driver/etna_resource.c
@@ -67,6 +67,12 @@ bool etna_screen_resource_alloc_ts(struct pipe_screen *screen, struct etna_resou
resource->ts = rt_ts;
resource->levels[0].ts_address = resource->ts->address;
resource->levels[0].ts_size = resource->ts->size;
+ /* It is important to initialize the TS to zero, as random pattern
+ * can result in crashes. Do this on the CPU as this only happens once
+ * per surface anyway and it's a small area, so it may not be worth
+ * queuing this to the GPU.
+ */
+ memset(rt_ts->logical, 0, rt_ts_size);
return true;
}