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authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2025-02-28 11:11:56 +0000
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2025-04-04 14:39:22 +0100
commit632c5b200347b1d9f24d537b339d7ee03cd81d5e (patch)
treef5a2c27568da7ce22c4d340139f5e9f256ec4188
parent8c2bda48f1d46c393246b98d3ddefae60c059f41 (diff)
net: phylink: add config of PHY receive clock-stop in phylink_resume()
Add configuration of the receive clock-stop in phylink_resume() to ensure that the clock-stop is correctly configured. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
-rw-r--r--drivers/net/phy/phylink.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 046ec8dda159..10687f50c95c 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -2284,7 +2284,7 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0;
if (pl->mac_supports_eee_ops) {
- /* Explicitly configure whether the PHY is allowed to stop it's
+ /* Explicitly configure whether the PHY is allowed to stop its
* receive clock.
*/
ret = phy_eee_rx_clock_stop(phy,
@@ -2665,8 +2665,22 @@ EXPORT_SYMBOL_GPL(phylink_suspend);
*/
void phylink_resume(struct phylink *pl)
{
+ int ret;
+
ASSERT_RTNL();
+ if (pl->mac_supports_eee_ops && pl->phydev) {
+ /* Explicitly configure whether the PHY is allowed to stop its
+ * receive clock on resume to ensure that it is correctly
+ * configured.
+ */
+ ret = phy_eee_rx_clock_stop(pl->phydev,
+ pl->config->eee_rx_clk_stop_enable);
+ if (ret == -EOPNOTSUPP)
+ phylink_warn(pl, "failed to set rx clock stop: %pe\n",
+ ERR_PTR(ret));
+ }
+
if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
/* Wake-on-Lan enabled, MAC handling */