diff options
| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2025-02-28 11:11:57 +0000 |
|---|---|---|
| committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2025-04-04 14:39:27 +0100 |
| commit | 70046a03a0bb8fad6f452486e9bf5471ffd60244 (patch) | |
| tree | 7541bf91895663b975caeaf7956b13779a39c886 | |
| parent | ebabac3e17c2658c8be22699c7fd68732f4ff902 (diff) | |
net: stmmac: fix resume when media is in low-power mode
The Synopsys Designwavre GMAC core databook requires all clocks to be
active in order to complete software reset.
This means if the PHY receive clock has been stopped due to the media
being in EEE low-power state, and the PHY being permitted to stop its
clock, then software reset will not complete.
Phylink now provides a way to work around this by calling
phylink_prepare_resume() before attempting to issue a reset. This will
prepare any attached PHY by disabling its permission to stop the clock.
phylink_resume() will restore the receive clock stop setting according
to the configuration passed from the netdev driver.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 3afb1b3b83f0..12ce7e1b1868 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -7912,6 +7912,8 @@ int stmmac_resume(struct device *dev) } rtnl_lock(); + phylink_prepare_resume(priv->phylink); + mutex_lock(&priv->lock); stmmac_reset_queues_param(priv); |