diff options
| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2023-08-17 21:56:27 +0100 |
|---|---|---|
| committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2025-04-04 14:39:51 +0100 |
| commit | 070be2066dd17cc6872b9eee4219a2418cfdb7ce (patch) | |
| tree | 89d1c4308ebe41e0a5cad8ad6d08c2acade53a8a | |
| parent | be000a2b108eb4b8b9af49d85974543aac0e8fdc (diff) | |
net: dsa: mv88e6xxx: add 6352 family EEE support
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/chip.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 6078f466fec8..0c01ed239626 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -679,6 +679,8 @@ static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; + config->lpi_capabilities = MAC_1000FD | MAC_100FD; + config->eee_enabled_default = true; /* Port 4 supports automedia if the serdes is associated with it. */ if (port == 4) { @@ -4640,6 +4642,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops = { .phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45, .phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45, .port_set_link = mv88e6xxx_port_set_link, + .port_set_eee = mv88e6xxx_port_set_eee, .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6352_port_set_speed_duplex, @@ -4743,6 +4746,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops = { .phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45, .phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45, .port_set_link = mv88e6xxx_port_set_link, + .port_set_eee = mv88e6xxx_port_set_eee, .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6352_port_set_speed_duplex, @@ -5019,6 +5023,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = { .phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45, .phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45, .port_set_link = mv88e6xxx_port_set_link, + .port_set_eee = mv88e6xxx_port_set_eee, .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6352_port_set_speed_duplex, @@ -5442,6 +5447,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = { .phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45, .phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45, .port_set_link = mv88e6xxx_port_set_link, + .port_set_eee = mv88e6xxx_port_set_eee, .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6352_port_set_speed_duplex, @@ -5632,6 +5638,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = { .phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45, .phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45, .port_set_link = mv88e6xxx_port_set_link, + /* no port_set_eee due to mv88e6393x errata 4.5 */ .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6393x_port_set_speed_duplex, |