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authorJudith Mendez <jm@ti.com>2025-04-29 11:33:36 -0500
committerNishanth Menon <nm@ti.com>2025-05-02 10:57:59 -0500
commit6af731c5de59cc4e7cce193d446f1fe872ac711b (patch)
tree1231fda2a7401a6a5e52ba57ac29916c699b5b40 /tools/perf/scripts/python/export-to-postgresql.py
parent3a71cdfec94436079513d9adf4b1d4f7a7edd917 (diff)
arm64: dts: ti: k3-am62a-main: Set eMMC clock parent to default
Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT for eMMC. This change is necessary since DM is not implementing the correct procedure to switch PLL clock source for eMMC and MMC CLK mux is not glich-free. As a preventative action, lets switch back to the defaults. Fixes: d3ae4e8d8b6a ("arm64: dts: ti: k3-am62a-main: Add sdhci0 instance") Cc: stable@vger.kernel.org Signed-off-by: Judith Mendez <jm@ti.com> Acked-by: Udit Kumar <u-kumar1@ti.com> Acked-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20250429163337.15634-3-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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