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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2025-04-22 17:30:42 +0530 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2025-05-02 08:29:48 -0500 |
| commit | b1f9ec6545c6423e106f0aeddc3b8651b5ad116c (patch) | |
| tree | ea9711783011dbb4728746d052f59662eee14a9b /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 0fde00328cf8245bf498349a696ba22d6a4a1916 (diff) | |
arm64: dts: ti: k3-j784s4-j742s2-main-common: Switch to 64-bit address space for PCIe0 and PCIe1
The PCIe0 and PCIe1 instances of PCIe in J742S2 and J784S4 SoCs support:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space
The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-8-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions