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2025-04-04Revert "iommu: silence iommu group prints"cex7Russell King
This reverts commit 842002f3ef06e6ca88d90968733878660994b5b8.
2025-04-04iommu: silence iommu group printsRussell King
On the LX2160A, there are lots (about 160) of IOMMU messages produced during boot; this is excessive. Reduce the severity of these messages to debug level. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04arm64: dts: lx2160a-clearfog-cx: add QSFP support [*experimental*]Russell King
Add QSFP cage network interfaces. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: add qsfp support [*experimental*]Russell King
Add experimental QSFP+ support for the SolidRun Clearfog-CX platform. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: sfp: clean up sfp-bus buildingRussell King
Use a Kconfig symbol to control the build of sfp-bus.c Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04ahci: qoriq: workaround for errata A-379364 on lx2160aPeng Ma
There is a erratum on lx2160a which is: "SATA link is going down sometime during sata initialization" The workaround for it is to reset the lane. This patch implements this workaround. This erratum only exists on lx2160 Rev1, will be addressed on Rev2 and later. Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04bus: fsl-mc: fix dprc object reading raceRussell King
When modifying the objects attached to a DPRC, we may end up reading the list of objects from the firmware while another thread is changing changing the list. Since we read the objects via: - Read the number of DPRC objects - Iterate over this number of objects retrieving their details and objects can be added in the middle of the list, this causes the last few objects to unexpectedly disappear. The side effect of this is if network interfaces are added after boot, they come and go. This can result in already configured interfaces unexpectedly disappearing. This has been easy to provoke with the restool interface added, and a script which adds network interfaces one after each other; the kernel rescanning runs asynchronously to restool. NXP's approach to fixing this was to introduce a sysfs "attribute" in their vendor tree, /sys/bus/fsl-mc/rescan, which userspace poked at to request the kernel to rescan the DPRC object tree each time the "restool" command completed (whether or not the tool changed anything.) This has the effect of making the kernel's rescan synchronous with a scripted restool, but still fails if we have multiple restools running concurrently. This patch takes a different approach: - Read the number of DPRC objects - Iterate over this number of objects retrieving their details - Re-read the number of DPRC objects - If the number of DPRC objects has changed while reading, repeat. This solves the issue where network interfaces unexpectedly disappear while adding others via ls-addni, because they've fallen off the end of the object list. This does *not* solve the issue that if an object is deleted while another is added while we are reading the objects - that requires firmware modification, or a more elaborate solution on the Linux side (e.g., CRCing the object details and reading all objects at least twice to check the CRC is stable.) However, without firmware modification, this is probably the best way to ensure that we read all the objects. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04bus: fsl-mc: add IOMMU mappings for MC firmware and DCFGRussell King (Oracle)
The MC firmware (which runs the networking subsystem) is loaded into RAM by U-Boot, and this region is omitted from the memory passed to the kernel via DT. Prior to booting the kernel, the MC processing is halted to allow IOMMU setup. When booting the kernel with IOMMU support enabled and without using both bypass and passthrough mode, the MC firmware crashes as soon as it is released, as the MC is unable to access the RAM that has been assigned to it for both the firmware image and other purposes, and also the DCFG to retrieve the SoC version. In order to avoid this, we need to setup identity mappings in the MC domain. For the MC RAM region, we read the firmware base address registers which tell us where the firmware is located. According to the MC design document, the firmware is loaded within the upper 512M of the MC RAM region, aligned to 512M, and the RAM region is also aligned to 512M. The lower 8 bits of the firmware base address low register tells us how large the RAM region is. Use this to calculate its size and location in order to create an indentity mapping. We also search DT for the DCFG node to retrieve its address, and create a read-only identity mapping to allow the MC firmware to read the SoC version. If we are unable to find the DCFG node, we use a default address for this. [XXX This needs to be improved XXX] This allows "arm-smmu.disable_bypass=1" to be dropped from the kernel command line for LX2160A platforms. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04arm64: dts: lx2160a: add iommus property for mc nodeLaurentiu Tudor
Enable SMMU management for the MC firmware by adding the required iommus property in the device tree node. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
2025-04-04Merge branches 'net-queue' and 'pci-mobiveil' into cex7Russell King (Oracle)
2025-04-04PCI: mobiveil: ls_pcie_g4: fix SError when accessing config spaceXiaowei Bao
While the Mellanox driver is binding, the following kernel panic occurred: SError Interrupt on CPU1, code 0xbf000002 -- SError CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.3.0+ #392 Hardware name: SolidRun LX2160A COM express type 7 module (DT) pstate: 60400085 (nZCv daIf +PAN -UAO) pc : pci_generic_config_read+0xb0/0xc0 lr : pci_generic_config_read+0x1c/0xc0 sp : ffffff8010f9baf0 x29: ffffff8010f9baf0 x28: ffffff8010d620a0 x27: ffffff8010d79000 x26: ffffff8010d62000 x25: ffffff8010cb06d4 x24: 0000000000000000 x23: ffffff8010e499b8 x22: ffffff8010f9bbaf x21: 0000000000000000 x20: ffffffe2eda11800 x19: ffffff8010f62158 x18: ffffff8010bdede0 x17: ffffff8010bdede8 x16: ffffff8010b96970 x15: ffffffffffffffff x14: ffffffffff000000 x13: ffffffffffffffff x12: 0000000000000030 x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f x9 : 2dff716475687163 x8 : ffffffffffffffff x7 : fefefefefefefefe x6 : 0000000000000000 x5 : 0000000000000000 x4 : ffffff8010f9bb6c x3 : 0000000000000001 x2 : 0000000000000003 x1 : 0000000000000000 x0 : 0000000000000000 Kernel panic - not syncing: Asynchronous SError Interrupt CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.3.0+ #392 Hardware name: SolidRun LX2160A COM express type 7 module (DT) Call trace: dump_backtrace+0x0/0x120 show_stack+0x14/0x1c dump_stack+0x9c/0xc0 panic+0x148/0x34c print_tainted+0x0/0xa8 arm64_serror_panic+0x74/0x80 do_serror+0x8c/0x13c el1_error+0xbc/0x160 pci_generic_config_read+0xb0/0xc0 pci_bus_read_config_byte+0x64/0x90 pci_read_config_byte+0x40/0x48 pci_assign_irq+0x34/0xc8 pci_device_probe+0x28/0x148 really_probe+0x1c4/0x2d0 driver_probe_device+0x58/0xfc device_driver_attach+0x68/0x70 __driver_attach+0x94/0xdc bus_for_each_dev+0x50/0xa0 driver_attach+0x20/0x28 bus_add_driver+0x14c/0x200 driver_register+0x6c/0x124 __pci_register_driver+0x48/0x50 mlx4_init+0x154/0x180 do_one_initcall+0x30/0x250 kernel_init_freeable+0x23c/0x32c kernel_init+0x10/0xfc ret_from_fork+0x10/0x18 SMP: stopping secondary CPUs Kernel Offset: disabled CPU features: 0x0002,21006008 Memory Limit: none which appears to be due to: pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); in pci_assign_irq(). Avoiding that access just moves the SError later (e.g. while accessing the command register in pci_enable_device() instead.) This patch resolves the SError problem by preventing configuration accesses triggering a SError interrupt. Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Tested-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> [description modified -- rmk] Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451Hou Zhiqiang
When LX2 PCIe controller is sending multiple split completions and ACK latency expires indicating that ACK should be send at priority. But because of large number of split completions and FC update DLLP, the controller does not give priority to ACK transmission. This results into ACK latency timer timeout error at the link partner and the pending TLPs are replayed by the link partner again. Workaround: 1. Reduce the ACK latency timeout value to a very small value. 2. Restrict the number of completions from the LX2 PCIe controller to 1, by changing the Max Read Request Size (MRRS) of link partner to the same value as Max Packet size (MPS). This patch implemented part 1, the part 2 can be set by kernel parameter 'pci=pcie_bus_perf' This ERRATA is only for LX2160A Rev1.0, and it will be fixed in Rev2.0. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [fixed up for mainline -- rmk] Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577Hou Zhiqiang
PCIe configuration access to non-existent function triggered SERROR interrupt exception. Workaround: Disable error reporting on AXI bus during the Vendor ID read transactions in enumeration. This ERRATA is only for LX2160A Rev1.0, and it will be fixed in Rev2.0. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04Revert "PCI: mobiveil: Remove unused readl and writel functions"Russell King (Oracle)
This reverts commit 42d7a8dc195f99e2e99d8f38a683e0852a29f6af.
2025-04-04PCI: mobiveil: fix 5.7 merge errorsRussell King
Fix errors in the mobiveil version that was merged in 5.7 kernels: - the type of "root_bus_nr" was changed from "u8" to "char", but it is compared to values that are typed as "unsigned char". Depending whether a platform has "char" as signed or unsigned, this may not do what is intended. - ls_g4_pcie_reinit_hw() now returns a success/failure value, and follows the Linux style of return 0 on success and -ve errno on failure. However, the testing in ls_pcie_g4_reset() expects 0 on failure, so we won't call ls_ig4_pcie_enable_interrupt() except if ls_g4_pcie_reinit_hw() has failed - which is likely not what was intended. Fixes: d29ad70a813b ("PCI: mobiveil: Add PCIe Gen4 RC driver for Layerscape SoCs") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: dsa: mt753x: add phy_interface_t to LPI methodsnet-queueRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: dsa: mv88e6xxx: add phy_interface_t to LPI methodsRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: lan743x: add phy_interface_t to LPI methodsRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: stmmac: add phy_interface_t to LPI methodsRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: mvpp2: add phy_interface_t to LPI methods and validate itRussell King (Oracle)
Add the PHY interface mode to the LPI methods and validate that LPI is being entered for a supported mode. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: mvneta: add phy_interface_t to LPI methods and validate itRussell King (Oracle)
Add the PHY interface mode to the LPI methods and validate that LPI is being entered for a supported mode. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: phylink: pass PHY interface mode into MAC LPI methodsRussell King (Oracle)
Ass the PHY interface mode into mac_disable_tx_lpi() and mac_enable_tx_lpi() methods. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: phylink: handle mac_enable_tx_lpi() returning -EOPNOTSUPPRussell King (Oracle)
Handle -EOPNOTSUPP from mac_enable_tx_lpi() to print a sensible error. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: phylink: use phy interface mode bitmaps for SFP PHYsRussell King
Select the initial SFP PHY interface mode from the PHY supported interface bitmaps. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: add supported_interfaces to Aquantia AQR113CRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: add supported_interfaces to marvell10g PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: add supported_interfaces to marvell PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: add supported_interfaces to bcm84881Russell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: add supported_interfaces to phylibRussell King
Add a supported_interfaces member to phylib so we know which interfaces a PHY supports. Currently, set any unconverted driver to indicate all interfaces are supported. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: sfp: display SFP module information [*not for mainline*]Russell King
Display SFP module information verbosely, splitting the generic parts into a separate file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2025-04-04net: sfp: add sfp+ compatible [*not for mainline*]Russell King
Add a compatible for SFP+ cages. SFP+ cages are backwards compatible, but the ethernet device behind them may not support the slower speeds of SFP modules. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: sfp: add support for cooled SFP+ transceiversRussell King
Cooled SFP+ transceivers need a longer initialisation (startup) time. Select the initialisation time depending on the cooled option bit. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: make phy_error() report which PHY has failedRussell King
phy_error() is called from phy_interrupt() or phy_state_machine(), and uses WARN_ON() to print a backtrace. The backtrace is not useful when reporting a PHY error. However, a system may contain multiple ethernet PHYs, and phy_error() gives no clue which one caused the problem. Replace WARN_ON() with a call to phydev_err() so that we can see which PHY had an error, and also inform the user that we are halting the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: marvell10g: allow PHY to probe without firmwareRussell King
Allow the PHY to probe when there is no firmware, but do not allow the link to come up by forcing the PHY state to PHY_HALTED in a similar way to phy_error(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: provide phy driver start/stop hooksRussell King
Provide phy driver start/stop hooks so that the PHY driver knows when the network driver is starting or stopping. This will be used for the Marvell 10G driver so that we can sanely refuse to start if the PHYs firmware is not present, and also so that we can sanely support SFPs behind the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: marvell*: add support for hw resolved pause modesRussell King
Support reporting the hardware resolved pause enablement states via phylib, overriding our software implementation. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: add resolved pause support [*not for mainline*]Russell King
Allow phylib drivers to pass the hardware-resolved pause state to MAC drivers, rather than using the software-based pause resolution code. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phylink: handle MDIO_USXGMII_LINK when decoding USXGMIIRussell King (Oracle)
If MDIO_USXGMII_LINK is not set, it means that the PHYs media side link is down. Indicate back to phylink that the link as a whole is down. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04arm64: dts: configure Macchiatobin 10G PHY LED modesRussell King
Configure the Macchiatobin 10G PHY LED modes to correct their polarity. We keep the existing LED behaviours, but switch their polarity to reflect how they are connected. Tweak the LED modes as well to be: left: off = no link solid green = RJ45 link up (not SFP+ cage) flash green = traffic right: off = no link solid green = 10G solid yellow = 1G flash green = 100M flash yellow = 10M Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: marvell10g: add support for configuring LEDsRussell King
Add support for configuring the LEDs. Macchiatobin has an oddity in that the left LED goes out when the cable is connected, and flashes when there's link activity. This is because the reset default for the LED outputs assume that the LED is connected to supply, not to ground. Add support for configuring the LED modes and polarities. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04dt-bindings: net: add dt bindings for marvell10g driverRussell King
Add a DT bindings document for the Marvell 10G driver, which will augment the generic ethernet PHY binding by having LED mode configuration. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: phy: generate PHY mdio modaliasRussell King (Oracle)
The modalias string provided in the uevent sysfs file does not conform to the format used in PHY driver modules. One of the reasons is that udev loading of PHY driver modules has not been an expected use case. This patch changes the MODALIAS entry for only PHY devices from: MODALIAS=of:Nethernet-phyT(null) to: MODALIAS=mdio:00000000001000100001010100010011 Other MDIO devices (such as DSA) remain as before. However, having udev automatically load the module has the advantage of making use of existing functionality to have the module loaded before the device is bound to the driver, thus taking advantage of multithreaded boot systems, potentially decreasing the boot time. However, this patch will not solve any issues with the driver module not being loaded prior to the network device needing to use the PHY. This is something that is completely out of control of any patch to change the uevent mechanism. Reported-by: Yinbo Zhu <zhuyinbo@loongson.cn> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: mvpp2: tai: warn once if we fail to update our timestampRussell King
The hardware timestamps for packets contain a truncated seconds field, only containing two bits of seconds. In order to provide the full number of seconds, we need to keep track of the full hardware clock by reading it every two seconds. However, if we fail to read the clock, we silently ignore the error. Print a warning indicating that the PP2 TAI clock timestamps have become unreliable. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2025-04-04net: dsa: remove obsolete phylink dsa_switch operationsRussell King (Oracle)
No driver now uses the DSA switch phylink members, so we can now remove the shim functions and method pointers. Arrange to print an error message and fail registration if a DSA driver does not provide the phylink MAC operations structure. Signed-off-by: Russell King (oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: dsa: mv88e6xxx: add 6352 family EEE supportRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: dsa: mv88e6xxx: add EEE controlsRussell King (Oracle)
Add phylink EEE control methods to allow EEE to be configured. When LPI is to be disabled, we force the port to have EEE disabled, but when enabling EEE, if the port is under the control of the PPU, we stop forcing it, otherwise we force-enable EEE. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: dsa: mv88e6xxx: add support for EEE forcingRussell King (Oracle)
Add support for EEE forcing using the MAC control register. Replace the 88e6393x errata 4.5 EEE disable code with a call to the new EEE forcing code. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: dsa: mv88e6xxx: add port_set_eee() methodRussell King (Oracle)
Add a port_set_eee() method to allow the EEE settings for a port to be configured. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: xpcs: allow 1000BASE-X to work with older XPCS IPRussell King (Oracle)
Older XPCS IP requires SGMII_LINK and PHY_SIDE_SGMII to be set when operating in 1000BASE-X mode even though the XPCS is not configured for SGMII. An example of a device with older XPCS IP is KSZ9477. We already don't clear these bits if we switch from SGMII to 1000BASE-X on TXGBE - which would result in 1000BASE-X with the PHY_SIDE_SGMII bit left set. It is currently believed to be safe to set both bits on newer IP without side-effects. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2025-04-04net: xpcs: add SGMII MAC manual update modeRussell King (Oracle)
Older revisions of the XPCS IP do not support the MAC_AUTO_SW flag and need the BMCR register updated with the speed information from the PHY. Split the DW_XPCS_SGMII_MODE_MAC mode into _AUTO and _MANUAL variants, where _AUTO mode means the update happens in hardware autonomously, whereas the _MANUAL mode means that we need to update the BMCR register when the link comes up. This will be required for the older XPCS IP found in KSZ9477. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>