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2023-07-27drm/tegra: sor: Convert to devm_platform_ioremap_resource()Yangtao Li
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230710032355.72914-16-frank.li@vivo.com
2023-07-27drm/tegra: hdmi: Convert to devm_platform_ioremap_resource()Yangtao Li
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230710032355.72914-5-frank.li@vivo.com
2023-07-27drm/tegra: dpaux: Fix incorrect return value of platform_get_irqYangtao Li
When platform_get_irq fails, we should return dpaux->irq instead of -ENXIO. Fixes: 6b6b604215c6 ("drm/tegra: Add eDP support") Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230710032355.72914-13-frank.li@vivo.com
2023-07-27drm/tegra: output: hdmi: Support bridge/connectorMaxim Schwalm
Some Tegra device-trees may specify a video output graph, which involves MHL bridge/simple bridge and/or connector framework. This patch adds support for the bridge/connector attached to the HDMI output, allowing us to model the hardware properly. Inspired by: 29efdc2 ("drm/tegra: output: rgb: Support LVDS encoder bridge") Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> # ASUS P1801-T T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS TF201 T30 Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230618085046.10081-2-clamor95@gmail.com
2023-07-27drm/tegra: Enable runtime PM during probeMikko Perttunen
Currently, engine drivers only enable runtime PM during the host1x init callback. This can happen slightly later than the probe, which can cause the power domain to intermittently not be turned off after probe. My hypothesis is that there is a race condition between the post-probe power domain poweroff that is done from a queued work, and the pm_runtime_enable call happening in the host1x init callback. If the pm_runtime_enable call happens first, everything is OK and the power off work can disable the power domain as PM runtime is enabled and the device is runtime suspended. If power off work runs first, PM runtime is still disabled for the device and the domain must be kept powered. Resolve the issue by moving the runtime PM enablement to the probe function. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230613095215.2497004-1-cyndis@kapsi.fi
2023-07-27drm/tegra: dpaux: Use devm_platform_ioremap_resource()Yang Li
Convert platform_get_resource(),devm_ioremap_resource() to a single call to devm_platform_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230421084952.45275-1-yang.lee@linux.alibaba.com
2023-07-27gpu: host1x: Return error when context device not attached to IOMMUMikko Perttunen
If a context device was not attached to IOMMU, we kept the old success err value causing context devices to be unregistered but success to be returned. This would mean that things would go on but with context isolation disabled. To decide on an explicit behavior, let's return an error code here instead. If someone wants to go without IOMMU on a platform modern enough to support context isolation, they can remove the context devices from device tree. Reported-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413082202.114721-2-cyndis@kapsi.fi
2023-07-27drm/tegra: Add error check for NVDEC firmware memory allocationMikko Perttunen
The return value for tegra_drm_alloc was missing an error check. Add one. Reported-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413082202.114721-1-cyndis@kapsi.fi
2023-07-27drm/i915: Avoid -Wconstant-logical-operand in nsecs_to_jiffies_timeout()Nathan Chancellor
A proposed update to clang's -Wconstant-logical-operand to warn when the left hand side is a constant shows the following instance in nsecs_to_jiffies_timeout() when NSEC_PER_SEC is not a multiple of HZ, such as CONFIG_HZ=300: drivers/gpu/drm/i915/gem/i915_gem_wait.c:189:24: warning: use of logical '&&' with constant operand [-Wconstant-logical-operand] 189 | if (NSEC_PER_SEC % HZ && | ~~~~~~~~~~~~~~~~~ ^ drivers/gpu/drm/i915/gem/i915_gem_wait.c:189:24: note: use '&' for a bitwise operation 189 | if (NSEC_PER_SEC % HZ && | ^~ | & drivers/gpu/drm/i915/gem/i915_gem_wait.c:189:24: note: remove constant to silence this warning 1 warning generated. Turn this into an explicit comparison against zero to make the expression a boolean to make it clear this should be a logical check, not a bitwise one. Link: https://reviews.llvm.org/D142609 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Maíra Canal <mairacanal@riseup.net> Link: https://patchwork.freedesktop.org/patch/msgid/20230718-nsecs_to_jiffies_timeout-constant-logical-operand-v1-2-36ed8fc8faea@kernel.org
2023-07-27drm/v3d: Avoid -Wconstant-logical-operand in nsecs_to_jiffies_timeout()Nathan Chancellor
A proposed update to clang's -Wconstant-logical-operand to warn when the left hand side is a constant shows the following instance in nsecs_to_jiffies_timeout() when NSEC_PER_SEC is not a multiple of HZ, such as CONFIG_HZ=300: In file included from drivers/gpu/drm/v3d/v3d_debugfs.c:12: drivers/gpu/drm/v3d/v3d_drv.h:343:24: warning: use of logical '&&' with constant operand [-Wconstant-logical-operand] 343 | if (NSEC_PER_SEC % HZ && | ~~~~~~~~~~~~~~~~~ ^ drivers/gpu/drm/v3d/v3d_drv.h:343:24: note: use '&' for a bitwise operation 343 | if (NSEC_PER_SEC % HZ && | ^~ | & drivers/gpu/drm/v3d/v3d_drv.h:343:24: note: remove constant to silence this warning 1 warning generated. Turn this into an explicit comparison against zero to make the expression a boolean to make it clear this should be a logical check, not a bitwise one. Link: https://reviews.llvm.org/D142609 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Maíra Canal <mcanal@igalia.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Maíra Canal <mairacanal@riseup.net> Link: https://patchwork.freedesktop.org/patch/msgid/20230718-nsecs_to_jiffies_timeout-constant-logical-operand-v1-1-36ed8fc8faea@kernel.org
2023-07-27dt-bindings: display: panel: Document Hydis HV070WX2-1E0Thierry Reding
The Hydis HV070WX2-1E0 is a 7" WXGA (800x1280) TFT LCD LVDS panel that is one of the variants used on Google Nexus 7. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230726185010.2294709-2-thierry.reding@gmail.com
2023-07-27dt-bindings: display: panel: Move Chunghwa CLAA070WP03XG to LVDSThierry Reding
The Chunghwa CLAA070WP03XG is an LVDS panel, so move it to the correct bindings file. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230726185010.2294709-1-thierry.reding@gmail.com
2023-07-27dt-bindings: display: panel: Move HannStar HSD101PWW2 to LVDSThierry Reding
The HannStar HSD101PWW2 is an LVDS panel, so move it to the correct bindings file. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230726184857.2294570-1-thierry.reding@gmail.com
2023-07-27drm/ssd130x: Use shadow-buffer helpers when managing plane's stateJavier Martinez Canillas
The commit 45b58669e532 ("drm/ssd130x: Allocate buffer in the plane's .atomic_check() callback") moved the buffers allocation to be done in the primary plane's .atomic_check() callback. But it missed that since the driver uses a shadow-buffered plane, the __drm_gem_{reset,duplicate,destroy}_shadow_plane() helper functions must be used in the struct drm_plane_funcs handlers. This was missed because the mentioned commit did not remove the macro DRM_GEM_SHADOW_PLANE_FUNCS, which leads to the custom plane's atomic state management handlers to not be used. Fixes: 45b58669e532 ("drm/ssd130x: Allocate buffer in the plane's .atomic_check() callback") Reported-by: Arnd Bergmann <arnd@arndb.de> Closes: https://lore.kernel.org/dri-devel/20230727122412.2464210-1-arnd@kernel.org Suggested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230727140453.577445-1-javierm@redhat.com
2023-07-27Merge tag 'drm-misc-next-2023-07-27' of ↵Daniel Vetter
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v6.6: UAPI Changes: Cross-subsystem Changes: * dma-buf: * Documentation fixes * fbdev: * Make FB core selectable without drivers * Remove obsolete flags FBINFO_DEFAULT and FBINFO_FLAG_DEFAULT from all drivers and <linux/fb.h> * Add helper macros and Kconfig tokens for DMA-allocated framebuffers * Cleanups Core Changes: * Respect given gfp flags in drmm_kmalloc() Driver Changes: * ast: * Cleanups * bridge: * anx7625: Locking fixes * tc358767: Fix hardware delays * Minor fixes and cleanups * exynos: * Use fbdev DMA helpers * komeda: * Always attach encoder * omapdrm: * Use fbdev DMA helpers * panel: * ld9040: Fix Kconfig dependency * Minor cleanups * ssd130x: * Fix allocation of temporary buffers * Fix pitch computation * tegra: * Use fbdev DMA helpers Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230727124444.GA5547@linux-uq9g
2023-07-27drm/i915/color: Downscale degamma lut values read from hardwareChaitanya Kumar Borah
For MTL and beyond, convert back the 24 bit lut values read from HW to 16 bit values to maintain parity with userspace values. This way we avoid pipe config mismatch for pre-csc lut values. v2: Add helper function to downscale values (Jani) Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725083002.3779717-3-chaitanya.kumar.borah@intel.com
2023-07-27drm/i915/color: Upscale degamma values for MTLChaitanya Kumar Borah
MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from 16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16 bit precision. Until a new uapi comes along to support higher bitdepth, upscale the values sent from userland to 24 bit before writing into the HW to continue supporting degamma on MTL. Add helper function to upscale or downscale lut values. Parameters 'to' and 'from' needs to be less than 32. This should be sufficient as currently there are no lut values exceeding 32 bit. v2: (Jani) - Reuse glk_load_degamma_lut() - Create a helper function for upscaling values v3: Fix multi line comment style (Uma) v4: Remove extra line(Ankit) Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230727123342.4077017-1-chaitanya.kumar.borah@intel.com
2023-07-27Merge tag 'drm-misc-next-2023-07-21' of ↵Daniel Vetter
ssh://git.freedesktop.org/git/drm/drm-misc into drm-next drm-misc-next for 6.6: UAPI Changes: - syncobj: New DRM_IOCTL_SYNCOBJ_EVENTFD ioctl Cross-subsystem Changes: - Converge to use of_device_uevent() Core Changes: - GPU VA Manager - improvements to make it clearer that drm_minor_type is uAPI Driver Changes: - ssd130x: Improve intermediate buffer size computation - bridges: - adv7511: Fix low refresh rate - anx7625: Switch to macros instead of hardcoded values - panel: - ld9040: Backlight support, magic improved Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/urs7omo5xnhglztxgwgsslws7duqfj4jhzrtppaenuvdh2lwuz@4htm4iiqhkep
2023-07-27dma-buf: Fix the typo in DMA-BUF statistics docLuc Ma
The kernel-doc for DMA-BUF statistics mentions /sys/kernel/dma-buf/buffers but the correct path is /sys/kernel/dmabuf/buffers instead. Signed-off-by: Luc Ma <luc@sietium.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/64b6749a.170a0220.3acab.2af9@mx.google.com Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2023-07-26drm/ssd130x: Allocate buffer in the plane's .atomic_check() callbackJavier Martinez Canillas
Drivers are not allowed to fail after drm_atomic_helper_swap_state() has been called and the new atomic state is stored into the current sw state. Since the struct ssd130x_device .data_array is allocated in the encoder's .atomic_enable callback, the operation can fail and this is after the new state has been stored. So it can break an atomic mode settings assumption. Fix this by having custom helpers to allocate, duplicate and destroy the plane state, that will take care of allocating and freeing these buffers. Suggested-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230726105433.389740-2-javierm@redhat.com
2023-07-26drm/ssd130x: Inline the ssd130x_buf_{alloc, free}() function helpersJavier Martinez Canillas
There is only a single caller for both helper functions and these don't do much other than allocate and free two buffers, so let's just inline them. Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230726105433.389740-1-javierm@redhat.com
2023-07-26drm/i915/gt: Support aux invalidation on all enginesAndi Shyti
Perform some refactoring with the purpose of keeping in one single place all the operations around the aux table invalidation. With this refactoring add more engines where the invalidation should be performed. Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines") Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-8-andi.shyti@linux.intel.com
2023-07-26drm/i915/gt: Poll aux invalidation register bit on invalidationJonathan Cavitt
For platforms that use Aux CCS, wait for aux invalidation to complete by checking the aux invalidation register bit is cleared. Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines") Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-7-andi.shyti@linux.intel.com
2023-07-26drm/i915/gt: Enable the CCS_FLUSH bit in the pipe control and in the CSAndi Shyti
Enable the CCS_FLUSH bit 13 in the control pipe for render and compute engines in platforms starting from Meteor Lake (BSPEC 43904 and 47112). For the copy engine add MI_FLUSH_DW_CCS (bit 16) in the command streamer. Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines") Requires: 8da173db894a ("drm/i915/gt: Rename flags with bit_group_X according to the datasheet") Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com> Cc: Nirmoy Das <nirmoy.das@intel.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-6-andi.shyti@linux.intel.com
2023-07-26drm/i915/gt: Rename flags with bit_group_X according to the datasheetAndi Shyti
In preparation of the next patch align with the datasheet (BSPEC 47112) with the naming of the pipe control set of flag values. The variable "flags" in gen12_emit_flush_rcs() is applied as a set of flags called Bit Group 1. Define also the Bit Group 0 as bit_group_0 where currently only PIPE_CONTROL0_HDC_PIPELINE_FLUSH bit is set. Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-5-andi.shyti@linux.intel.com
2023-07-26drm/i915/gt: Ensure memory quiesced before invalidationJonathan Cavitt
All memory traffic must be quiesced before requesting an aux invalidation on platforms that use Aux CCS. Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines") Requires: a2a4aa0eef3b ("drm/i915: Add the gen12_needs_ccs_aux_inv helper") Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-4-andi.shyti@linux.intel.com
2023-07-26drm/i915: Add the gen12_needs_ccs_aux_inv helperAndi Shyti
We always assumed that a device might either have AUX or FLAT CCS, but this is an approximation that is not always true, e.g. PVC represents an exception. Set the basis for future finer selection by implementing a boolean gen12_needs_ccs_aux_inv() function that tells whether aux invalidation is needed or not. Currently PVC is the only exception to the above mentioned rule. Requires: 059ae7ae2a1c ("drm/i915/gt: Cleanup aux invalidation registers") Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-3-andi.shyti@linux.intel.com
2023-07-26drm/i915/gt: Cleanup aux invalidation registersAndi Shyti
Fix the 'NV' definition postfix that is supposed to be INV. Take the chance to also order properly the registers based on their address and call the GEN12_GFX_CCS_AUX_INV address as GEN12_CCS_AUX_INV like all the other similar registers. Remove also VD1, VD3 and VE1 registers that don't exist and add BCS0 and CCS0. Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-2-andi.shyti@linux.intel.com
2023-07-26drm/i915: Use the i915_vma_flush_writes helperTvrtko Ursulin
We can use the existing helper in flush_write_domain() and save some lines of code. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230721130741.1306563-1-tvrtko.ursulin@linux.intel.com
2023-07-26drm/i915/hotplug: Reduce SHPD_FILTER to 250usSuraj Kandpal
On TGP, the RTC (always running) was reduced from 3MHz to 32KHz. As a result of this change, when HPD active going low pulse or HPD IRQ is presented and the refclk (19.2MHz) is not toggling already toggling, there is a 60 to 90us synchronization delay which effectively reduces the duration of the IRQ pulse to less than the programmed 500us filter value and the hot plug interrupt is NOT registered. Solution was to Reduce SHPD_FILTER to 250us for ADL and above. This solution was derived when the below patch was floated. [1]https://patchwork.freedesktop.org/patch/532187 and after some internal discussion Ville's suggestion made sense. Bspec: 68970 Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Suggested-by: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230720104624.3063544-1-suraj.kandpal@intel.com
2023-07-25drm/ast: Do not enable PCI resources multiple timesThomas Zimmermann
Remove ast_init_pci_config() as the ast driver already enables the PCI resources by calling pcim_enable_device(). Suggested-by: Sui Jingfeng <suijingfeng@loongson.cn> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Tested-by: Sui Jingfeng <suijingfeng@loongson.cn> Link: https://patchwork.freedesktop.org/patch/msgid/20230712130826.3318-1-tzimmermann@suse.de
2023-07-25drm/amdgpu: Restore HQD persistent state registerLijo Lazar
On GFX v9.4.3, compute queue MQD is populated using the values in HQD persistent state register. Hence don't clear the values on module unload, instead restore it to the default reset value so that MQD is initialized correctly during next module load. In particular, preload flag needs to be set on compute queue MQD, otherwise it could cause uninitialized values being used at device reset state resulting in EDC. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/radeon: add missing spaces before ';'Ran Sun
ERROR: space required after that ';' (ctx:BxV) Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/radeon/si_dpm: open brace '{' following struct go on the same lineRan Sun
ERROR: open brace '{' following struct go on the same line Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amd/pm: Vangogh: Add new gpu_metrics_v2_4 to acquire gpu_metricsWenyou Yang
To acquire the voltage and current info from gpu_metrics interface, but gpu_metrics_v2_3 doesn't contain them, and to be backward compatible, add new gpu_metrics_v2_4 structure. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Wenyou Yang <WenYou.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: load sdma ucode in the guest machineYuanShang
[why] User mode driver need to check the sdma ucode version to see whether the sdma engine supports a new type of PM4 packet. In SRIOV, sdma is loaded by the host. And, there is no way to check the sdma ucode version of CHIP_NAVI12 and CHIP_SIENNA_CICHLID of the host in the guest machine. [how] Load the sdma ucode for CHIP_NAVI12 and CHIP_SIENNA_CICHLID in the guest machine. Signed-off-by: YuanShang <YuanShang.Mao@amd.com> Reviewed-By: Horace Chen <horace.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: Use seq_puts() instead of seq_printf()Srinivasan Shanmugam
For a constant format without additional arguments, use seq_puts() instead of seq_printf(). Also, it fixes the following warning. WARNING: Prefer seq_puts to seq_printf And other style fixes: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: Block comments should align the * on each line Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: Update min() to min_t() in 'amdgpu_info_ioctl'Srinivasan Shanmugam
Fixes the following: WARNING: min() should probably be min_t(size_t, size, sizeof(ip)) + ret = copy_to_user(out, &ip, min((size_t)size, sizeof(ip))); And other style fixes: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: Missing a blank line after declarations Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: Remove else after return in 'is_fru_eeprom_supported'Srinivasan Shanmugam
Expressions under 'else' branch under case 'CHIP_SIENNA_CICHLID' in function 'is_fru_eeprom_supported' are executed whenever the expression in 'if' is False. Otherwise, return from case occurs. Therefore, there is no need in 'else', and it has been removed. Fixes the following: WARNING: else is not generally useful after a break or return + return false; + } else { Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amd/display: Remove else after return in 'dm_vblank_get_counter' & ↵Srinivasan Shanmugam
'amdgpu_dm_backlight_get_level' Expressions under 'else' branch in function 'dm_vblank_get_counter' & 'amdgpu_dm_backlight_get_level' are executed whenever the expression in 'if' is False. Otherwise, return from function occurs. Therefore, there is no need in 'else', and it has been removed. Fixes the following: WARNING: else is not generally useful after a break or return + return 0; + else { WARNING: else is not generally useful after a break or return + return convert_brightness_to_user(&caps, avg); + } else { Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: Add -ENOMEM error handling when there is no memorySrinivasan Shanmugam
Return -ENOMEM, when there is no sufficient dynamically allocated memory Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: Check APU flag to disable RASStanley.Yang
Only disable RAS by default for aqua vanjaram on APU platform. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: fix the indexing issue during rlcg access ctrl initShiwu Zhang
In case that the GET_INST() is used for looping, only loops for the times of actual num of xcc, otherwise GET_INST() will return the invalid index, a.k.a -1 And also remove the redundant mask checking in case of GET_INST() Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: add VISIBLE info in amdgpu_bo_print_infoPierre-Eric Pelloux-Prayer
This allows tools to distinguish between VRAM and visible VRAM. Use the opportunity to fix locking before accessing bo. v2: squash in unused variable fix Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdkfd: avoid svm dump when dynamic debug disabledAlex Sierra
Set dynamic_svm_range_dump macro to avoid iterating over SVM lists from svm_range_debug_dump when dynamic debug is disabled. Otherwise, it could drop performance, specially with big number of SVM ranges. Make sure both svm_range_set_attr and svm_range_debug_dump functions are dynamically enabled to print svm_range_debug_dump debug traces. Signed-off-by: Alex Sierra <alex.sierra@amd.com> Tested-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/radeon: ERROR: "foo * bar" should be "foo *bar"Ran Sun
Fix two occurrences of the checkpatch.pl error: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amdgpu: open brace '{' following struct go on the same lineRan Sun
ERROR: open brace '{' following struct go on the same line Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amd/pm: open brace '{' following struct go on the same lineRan Sun
ERROR: open brace '{' following struct go on the same line Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amd: open brace '{' following struct go on the same lineRan Sun
Fix the checkpatch error as open brace '{' following struct should go on the same line. Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-25drm/amd/display: Unlock on error path in ↵Dan Carpenter
dm_handle_mst_sideband_msg_ready_event() This error path needs to unlock the "aconnector->handle_mst_msg_ready" mutex before returning. Fixes: bb4fa525f327 ("drm/amd/display: Add polling method to handle MST reply packet") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-07-20 01:02:59 +0000