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2023-08-09arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board levelAndrew Davis
SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-09arm64: dts: ti: k3-j784s4: Fix interrupt ranges for wkup & main gpioApelete Seketeli
This patch fixes the interrupt range for wakeup and main domain gpio interrupt routers. They were wrongly subtracted by 32 instead of following what is defined in the interrupt map in the TRM (Table 9-35). Link: http://www.ti.com/lit/pdf/spruj52 Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC") Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com> Signed-off-by: Esteban Blanc <eblanc@baylibre.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20230810-tps6594-v6-4-2b2e2399e2ef@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-09arm64: dts: ti: k3: Add cfg reg region to ringacc nodeVignesh Raghavendra
Add register range of ringacc cfg node to all k3 SoC dtsi files. This is normally under Device Management firmware control but some entities like bootloader have to access directly and thus required to be present in DT. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230809175932.2553156-3-vigneshr@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-09dt-bindings: soc: ti: k3-ringacc: Describe cfg reg regionVignesh Raghavendra
RINGACC module on K3 SoCs have CFG register region which is usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first four regions to be present at least. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230809175932.2553156-2-vigneshr@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-09arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ADCUdit Kumar
After splitting wkup_pmx pin mux for J784S4 into four regions. Pin mux offset for ADC nodes were not updated to align with new regions, due to this while probing ADC driver out of range error was seen. Pin mux offsets for ADC nodes are corrected in this patch. Fixes: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets") Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://lore.kernel.org/r/20230809050108.751164-1-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-08arm64: dts: ti: verdin-am62: dahlia: add sound cardFrancesco Dolcini
Add WM8904 based analog sound card to Dahlia carrier board. Reviewed-by: Jai Luthra <j-luthra@ti.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230807202159.13095-5-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-08arm64: dts: ti: verdin-am62: dev: add sound cardFrancesco Dolcini
Add NAU8822 based analog sound card to Development carrier board. Reviewed-by: Jai Luthra <j-luthra@ti.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230807202159.13095-4-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-08arm64: dts: ti: verdin-am62: Set I2S_1 MCLK rateFrancesco Dolcini
Set AUDIO_EXT_REFCLK1, used as I2S_1_MCLK on Verdin AM62 family, to 25MHz (this is the only valid option according to TI [1]). [1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322 Reviewed-by: Jai Luthra <j-luthra@ti.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230807202159.13095-3-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-08arm64: dts: ti: k3-am62: Enable AUDIO_REFCLKxJai Luthra
On AM62-based SoCs the AUDIO_REFCLKx clocks can be used as an input to external peripherals when configured through CTRL_MMR, so add the clock nodes. Signed-off-by: Jai Luthra <j-luthra@ti.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230807202159.13095-2-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-07arm64: dts: ti: k3-j721s2: correct pinmux offset for ospiUdit Kumar
Due to non-addressable regions in J721S2 SOC wkup_pmx was split into four regions from wkup_pmx0 to wkup_pmx3. Correcting OSPI1 pin mux, which now falls under wkup_pmx1. Along with that removing unused pin mux for OSPI-0. Fixes: 6bc829ceea41 ("arm64: dts: ti: k3-j721s2: Fix wkup pinmux range") Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://lore.kernel.org/r/20230804075341.3858488-1-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-07arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ospiUdit Kumar
After splitting wkup_pmx pin mux for J784S4 into four regions. Pin mux offset for OSPI nodes were not updated to align with new regions, due to this while setting ospi pin muxes out of range error was seen. Pin mux offsets for OSPI nodes are corrected in this patch. Fixes: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets") Signed-off-by: Udit Kumar <u-kumar1@ti.com> Tested-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://lore.kernel.org/r/20230802114126.162445-1-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-07arm64: dts: ti: k3-am62a7: Add MCU MCAN nodesJudith Mendez
On AM62ax there are no hardware interrupts routed to A53 GIC interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were omitted from MCU dtsi. Timer polling was introduced in commits [1][2] enabling 3x MCAN on AM62ax, so now add MCU MCAN nodes to the mcu dtsi for the Cortex A53. [1] commit b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt") [2] commit bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN") Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20230804220137.425442-1-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3-am68-sk-base-board: Add HDMI supportJayesh Choudhary
AM68-SK has an HDMI port. The bridge used is TI-TFP410. Add support to enable the connection: DSS => TI TFP410 DPI-to-DVI Bridge => HDMI connector Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://lore.kernel.org/r/20230803081800.368582-3-j-choudhary@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3-j721s2-main: Add DSS nodeJayesh Choudhary
Add DSS node for J721S2 SoC. DSS IP in J721S2 is same as DSS IP in J721E, so same compatible is used. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://lore.kernel.org/r/20230803081800.368582-2-j-choudhary@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3: Fix epwm_tbclk node name to generic nameAndrew Davis
The name "clock" is not allowed for nodes, use "clock-controller" to remove the DTS check warning. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230802174521.236255-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3-am64: Merge the two main_conf nodesAndrew Davis
There are two nodes representing the same register space, this looks to have been created by some merge or copy/paste error. Remove the second instance of this node and move its children into the first instance. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230802174521.236255-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3-am62a: Remove syscon compatible from epwm_tbclkAndrew Davis
The other instances have been fixed, but AM62a seems to have been missed, fix this here. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230802174521.236255-1-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3-am62a7-sk: Enable dual role support for Type-C portRavi Gunasekaran
USB0 is interfaced with a Type-C DRP connector and is managed via a USB PD controller. Add support for the Type-C port with dual data and power sink role. Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20230725103651.1612-1-r-gunasekaran@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3-am625-verdin: enable CAN_2Hiago De Franco
Add Verdin CAN_2 (TI AM62 MCU_MCAN0) and enable it on the Yavia, Dahlia and Verdin Development board. Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230802073635.11290-3-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3-am62: Add MCU MCAN nodesJudith Mendez
On AM62x there are no hardware interrupts routed to A53 GIC interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were omitted from MCU dtsi. Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes to the MCU dtsi for the Cortex A53. [1] commit b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt") [2] commit bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN") [fd: fixed labels to match datasheet numbering, revised commit message, fixed reg/reg-names order] Signed-off-by: Judith Mendez <jm@ti.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230802073635.11290-2-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3: Fixup remaining pin group node names for make dtbs checksNishanth Menon
Fix up outstanding pingroup node names to be compliant with the upcoming pinctrl-single schema. Reviewed-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20230802040347.2264339-1-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: k3-am64-tqma64xxl-mbax4xxl: add SD-card and WLAN overlaysMatthias Schiffer
As the SD-card and WLAN are connected to the same SDHC interface (with a GPIO-controlled mux), they are mutually exclusive. Provide Device Tree overlays for both configurations. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/8ff8a6f1fdbe6ebb478f88bb0737628054c43c5b.1690463382.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05arm64: dts: ti: Add TQ-Systems TQMa64XxL SoM and MBaX4XxL carrier board ↵Matthias Schiffer
Device Trees The TQMa64XxL is an LGA SoM based on the TI AM64x SoC family. Add DTS(I) for the AM642 (2x Cortex-A53) variant and its combination with our MBaX4XxL carrier board. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/2a635428c73b5ab0fe793e558db6b5d88edccf8c.1690463382.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-05dt-bindings: arm: ti: Add compatible for AM642-based TQMaX4XxL SOM family ↵Matthias Schiffer
and carrier board For now only the MBaX4Xx carrier board is defined. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/e4283d6af59c77d2f690e070eb948dd9142a2276.1690463382.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-01arm64: dts: ti: k3-j721s2: Add overlay to enable main CPSW2G with GESIKishon Vijay Abraham I
The MAIN CPSW2G instance of CPSW on J721S2 SoC can be enabled with the GESI Expansion Board connected to the J7 Common-Proc-Board. Use the overlay to enable this. Add alias for the MAIN CPSW2G port to enable kernel to fetch MAC address directly from U-Boot. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Link: https://lore.kernel.org/r/20230726065407.378455-3-s-vadapalli@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-01arm64: dts: ti: k3-j721s2-main: Add main CPSW2G devicetree nodeKishon Vijay Abraham I
TI's J721S2 SoC has a MAIN CPSW2G instance of the CPSW Ethernet Switch. Add devicetree node for it. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Link: https://lore.kernel.org/r/20230726065407.378455-2-s-vadapalli@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-01arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports with GESISiddharth Vadapalli
The J7 GESI EXP board for J721E Common-Proc-Board supports RGMII mode. Use the overlay to configure CPSW9G ports in RGMII-RXID mode. Add aliases for CPSW9G ports to enable kernel to fetch MAC addresses directly from U-Boot. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Link: https://lore.kernel.org/r/20230725073057.96705-1-s-vadapalli@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-01arm64: dts: ti: k3-j784s4-evm: Add Support for UFS peripheralUdit Kumar
J784S4 EVM board has 32GB Non-Volatile UFS Memory. So enabling UFS at board level. UFS flash details are documented in board data sheet[1] Section 1.2 Key Features and Interfaces. [1] https://www.ti.com/lit/pdf/spruj62 Cc: Chai Wenle <Wenle.Chai@windriver.com> Tested-by: Chai Wenle <Wenle.Chai@windriver.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230725133607.2021379-3-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-01arm64: dts: ti: k3-j784s4-main: Add DT node for UFSUdit Kumar
Add UFS support present in J784S4 SOC. UFS is documented in J784S4 TRM[1] Section 12.3.7 'Universal Flash Storage (UFS) Interface' [1] http://www.ti.com/lit/zip/spruj52 Cc: Chai Wenle <Wenle.Chai@windriver.com> Tested-by: Chai Wenle <Wenle.Chai@windriver.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230725133607.2021379-2-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-01arm64: dts: ti: k3-j721s2-main: Add dts nodes for EHRPWMsSinthu Raja
Add dts nodes for 6 EHRPWM instances on SoC. Disable EHRPWM nodes in the dtsi files and only enable the ones that are actually pinned out on a given board in the board dts file. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Link: https://lore.kernel.org/r/20230721082150.12599-1-sinthu.raja@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-01arm64: dts: ti: k3-j721s2: Add support for CAN instances 3 and 5 in main domainBhavya Kapoor
CAN instances 3 and 5 in the main domain are brought on the common processor board through header J27 and J28. The CAN High and Low lines from the SoC are routed through a mux on the SoM. The select lines need to be set for the CAN signals to get connected to the transceivers on the common processor board. Threfore, add respective mux, transceiver dt nodes to add support for these CAN instances. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20230725085939.536766-1-b-kapoor@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-01arm64: dts: ti: k3-pinctrl: Introduce debounce select mux macrosNishanth Menon
Introduce the debounce select mux macros to allow folks to setup debounce configuration for pins. Each configuration selected maps to a specific timing register as documented in appropriate Technical Reference Manual (example:[1]). [1] AM625x TRM (section 6.1.2.2): https://www.ti.com/lit/pdf/spruiv7 Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230619131620.3286650-1-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-25arm64: dts: ti: k3-am62-main: Remove power-domains from crypto nodeKamlesh Gurudasani
Only SYSFW has control of SA3UL power. From SYSFW 08.04.00.002, for security reasons, device ID for power management of SA3UL has been removed. "power-domains" property in crypto node tries to access the SA3UL, for which it gets NACK and hence, SA3UL driver doesn't probe properly. Fixes: 8af893654c02 ("arm64: dts: ti: k3-am62-main: Enable crypto accelerator") Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Link: https://lore.kernel.org/r/20230614-sa3ul-v5-2-29dd2366fba3@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-25dt-bindings: crypto: ti,sa2ul: make power-domains conditionalKamlesh Gurudasani
Devices specific to compatible ti,am62-sa3ul don't have control over power of SA3UL from main domain. "power-domains" property in crypto node tries to access the SA3UL power, for which it gets NACK and hence, driver doesn't probe properly for those particular devices. Make "power-domains" property as false for devices with compatible ti,am62-sa3ul. Fixes: 2ce9a7299bf6 ("dt-bindings: crypto: Add TI SA2UL crypto accelerator documentation") Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Link: https://lore.kernel.org/r/20230614-sa3ul-v5-1-29dd2366fba3@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-25dt-bindings: ti-serdes-mux: Deprecate header with constantsJayesh Choudhary
The constants to define the idle state of SERDES MUX were defined in bindings header. They are used only in DTS and driver uses the dt property to set the idle state making it unsuitable for bindings. The constants are moved to header next to DTS ("arch/arm64/boot/dts/ti/") and all the references to bindings header are removed. So add a warning to mark this bindings header as deprecated. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Roger Quadros <rogerq@kernel.org> Acked-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20230721125732.122421-3-j-choudhary@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-25arm64: dts: ti: Use local header for SERDES MUX idle-state valuesJayesh Choudhary
The DTS uses constants for SERDES MUX idle state values which were earlier provided as bindings header. But they are unsuitable for bindings. So move these constants in a header next to DTS. Also add J784S4 SERDES4 lane definitions which were missed earlier. Suggested-by: Nishanth Menon <nm@ti.com> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Suggested-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/linux-arm-kernel/b24c2124-fe3b-246c-9af9-3ecee9fb32d4@kernel.org/ Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Roger Quadros <rogerq@kernel.org> Acked-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20230721125732.122421-2-j-choudhary@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-25arm64: dts: ti: k3-j721e-som-p0: Remove Duplicated wkup_i2c0 nodeUdit Kumar
wkup_i2c0 and associated eeprom device node were duplicated, This patch fixes the node duplication. Fixes: 4af0332876f9 ("arm64: dts: ti: k3-j721e-som-p0: Enable wakeup_i2c0 and eeprom") Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230721082344.1534094-1-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-14arm64: dts: ti: Fix compatible of ti,*-ehrpwm-tbclkNishanth Menon
TI EHRPWM compatible is just ti,*-ehrpwm-tbclk without needing a syscon compatibility. Fixes the following dtbs_check warnings: compatible: [''ti,am654-ehrpwm-tbclk, 'syscon'] is too long compatible: ['ti,am64-epwm-tbclk', 'syscon'] is too long compatible: ['ti,am62-epwm-tbclk', 'syscon'] is too long Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230713184759.3336536-1-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-11arm64: dts: ti: add missing space before {Krzysztof Kozlowski
Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Lechner <david@lechnology.com> Link: https://lore.kernel.org/r/20230705145755.292927-2-krzysztof.kozlowski@linaro.org Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-11arm64: dts: ti: minor whitespace cleanup around '='Krzysztof Kozlowski
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230702185221.44319-1-krzysztof.kozlowski@linaro.org Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-09Linux 6.5-rc1Linus Torvalds
2023-07-09MAINTAINERS 2: Electric BoogalooLinus Torvalds
We just sorted the entries and fields last release, so just out of a perverse sense of curiosity, I decided to see if we can keep things ordered for even just one release. The answer is "No. No we cannot". I suggest that all kernel developers will need weekly training sessions, involving a lot of Big Bird and Sesame Street. And at the yearly maintainer summit, we will all sing the alphabet song together. I doubt I will keep doing this. At some point "perverse sense of curiosity" turns into just a cold dark place filled with sadness and despair. Repeats: 80e62bc8487b ("MAINTAINERS: re-sort all entries and fields") Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2023-07-09Merge tag 'dma-mapping-6.5-2023-07-09' of ↵Linus Torvalds
git://git.infradead.org/users/hch/dma-mapping Pull dma-mapping fixes from Christoph Hellwig: - swiotlb area sizing fixes (Petr Tesarik) * tag 'dma-mapping-6.5-2023-07-09' of git://git.infradead.org/users/hch/dma-mapping: swiotlb: reduce the number of areas to match actual memory pool size swiotlb: always set the number of areas before allocating the pool
2023-07-09Merge tag 'irq_urgent_for_v6.5_rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq update from Borislav Petkov: - Optimize IRQ domain's name assignment * tag 'irq_urgent_for_v6.5_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqdomain: Use return value of strreplace()
2023-07-09Merge tag 'x86_urgent_for_v6.5_rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fpu fix from Borislav Petkov: - Do FPU AP initialization on Xen PV too which got missed by the recent boot reordering work * tag 'x86_urgent_for_v6.5_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/xen: Fix secondary processors' FPU initialization
2023-07-09Merge tag 'x86-core-2023-07-09' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fix from Thomas Gleixner: "A single fix for the mechanism to park CPUs with an INIT IPI. On shutdown or kexec, the kernel tries to park the non-boot CPUs with an INIT IPI. But the same code path is also used by the crash utility. If the CPU which panics is not the boot CPU then it sends an INIT IPI to the boot CPU which resets the machine. Prevent this by validating that the CPU which runs the stop mechanism is the boot CPU. If not, leave the other CPUs in HLT" * tag 'x86-core-2023-07-09' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/smp: Don't send INIT to boot CPU
2023-07-09Merge tag 'mips_6.5_1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Thomas Bogendoerfer: - fixes for KVM - fix for loongson build and cpu probing - DT fixes * tag 'mips_6.5_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: kvm: Fix build error with KVM_MIPS_DEBUG_COP0_COUNTERS enabled MIPS: dts: add missing space before { MIPS: Loongson: Fix build error when make modules_install MIPS: KVM: Fix NULL pointer dereference MIPS: Loongson: Fix cpu_probe_loongson() again
2023-07-09Merge tag 'xfs-6.5-merge-6' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linuxLinus Torvalds
Pull xfs fix from Darrick Wong: "Nothing exciting here, just getting rid of a gcc warning that I got tired of seeing when I turn on gcov" * tag 'xfs-6.5-merge-6' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux: xfs: fix uninit warning in xfs_growfs_data
2023-07-09Merge tag '6.5-rc-smb3-client-fixes-part2' of ↵Linus Torvalds
git://git.samba.org/sfrench/cifs-2.6 Pull more smb client updates from Steve French: - fix potential use after free in unmount - minor cleanup - add worker to cleanup stale directory leases * tag '6.5-rc-smb3-client-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6: cifs: Add a laundromat thread for cached directories smb: client: remove redundant pointer 'server' cifs: fix session state transition to avoid use-after-free issue
2023-07-09Merge tag 'ntb-6.5' of https://github.com/jonmason/ntbLinus Torvalds
Pull NTB updates from Jon Mason: "Fixes for pci_clean_master, error handling in driver inits, and various other issues/bugs" * tag 'ntb-6.5' of https://github.com/jonmason/ntb: ntb: hw: amd: Fix debugfs_create_dir error checking ntb.rst: Fix copy and paste error ntb_netdev: Fix module_init problem ntb: intel: Remove redundant pci_clear_master ntb: epf: Remove redundant pci_clear_master ntb_hw_amd: Remove redundant pci_clear_master ntb: idt: drop redundant pci_enable_pcie_error_reporting() MAINTAINERS: git://github -> https://github.com for jonmason NTB: EPF: fix possible memory leak in pci_vntb_probe() NTB: ntb_tool: Add check for devm_kcalloc NTB: ntb_transport: fix possible memory leak while device_register() fails ntb: intel: Fix error handling in intel_ntb_pci_driver_init() NTB: amd: Fix error handling in amd_ntb_pci_driver_init() ntb: idt: Fix error handling in idt_pci_driver_init()
generated by cgit (git 2.34.1) at 2025-07-15 08:12:24 +0000