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All the infrastructure is now in place for ST's PWM controller. This
patch takes the final step and enables the IP on the 2020 Rev-E
development platform.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Supply top level nodes for the STiH416 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416
based development boards.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Supply top level nodes for the STiH407 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Each pxa has an embedded OS Timers IP. The kernel cannot work without a
valid clocksource, and this adds the OS Timers to the pxa device-tree
description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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Each pxa27x has an embedded keypad controller. Add it in the pxa27x
device-tree description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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Each pxa27x has an embedded usb udc controller. Add it in the pxa27x
device-tree description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.
This patch ensures that :
- the current description is correct
- the clocks are actually claimed, so that clock framework doesn't
disable them automatically (unused clocks shutdown)
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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pxa27x variant has 2 I2C busses on the SoC :
- the casual I2C
- the power I2C, normally driving power regulators, and capable of
receiving orders on core frequency modifications
Add the missing pwri2c to pxa27x description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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The act8846 is the main pmic and system-power-controller on radxarock boards,
so add the necessary property.
Signed-off-by: Michael Niewoehner <mniewoeh@stud.hs-offenburg.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT additions for 4.1, take 1" from Maxime Ripard:
All the device tree related changes for the 4.1 merge window.
It has a rather big diffstat, because of a lot of mechanical and harmless
changes, as described below.
There is mostly:
- The end of the DT relicensing. All our DT should now be under the dual
X11/GPL license.
- Convertion of all the DT to a label based syntax, instead of
duplicating the tree like was done before.
- Rework of the A10s and A13 DTSI to share the common devices
- A few drivers enablings: A80 USB, the A31 PMIC, A31 and A23 arch
timers, etc
- Fix the checkpatch warnings
- A few new boards : cubieboard4, mele i7, utoo p66, auxtex t004,
pcduino3 nano, gemei G9, mk808c, jesurun q5, orange pi, orange pi mini
* tag 'sunxi-dt-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (84 commits)
ARM: sunxi: dt: Split the SPI pinctrl groups
ARM: sunxi: dt: Fix whitespace errors
ARM: sunxi: DT: Fix lines over 80 characters
ARM: sunxi: dt: Remove the FSF address
ARM: sunxi: dts: split IR pins for A10 and A20
ARM: sun7i: dt: Add new MK808C device
ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node
ARM: dts: sunxi: Update ahb clocks for sun5i and sun7i
ARM: dts: sun7i: Add dts file for the Jesurun Q5 top set box
ARM: dts: sun5i: Enable touchscreen on Utoo P66
ARM: dts: sun7i: Add dts file for the Orangepi mini SBC
ARM: dts: sun7i: Add dts file for the Orangepi SBC
ARM: dts: sun7i: Add A20 SRAM and SRAM controller
ARM: dts: sun5i: Add A13 and A10s SRAM and SRAM controller
ARM: dts: sun4i: Add A10 SRAM and SRAM controller
ARM: dts: sun5i: Add broken-hpi property for Utoo-P66 eMMC
ARM: sun8i: dt: Enable A23 SMP support
ARM: dts: sun6i: Add cpu thermal zones to dtsi
ARM: dts: sun6i: Add cpu clock reference and operating points to dtsi
ARM: sunxi: DT: Add stdout-path property
...
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git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Pull "SoCFPGA DTS updates for v4.2" from Dinh Nguyen:
- Add accelerometer to sockit
- Update and clean up support for the Arria10 platform
- Add sdmmc_clk/4 clock node SoCFPGA Cyclone5/Arria5
- Update ethernet nodes with multicast/unicast/fifo-depth properties
- Add clocks for Arria10 platform
* tag 'socfpga_dts_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: dts: add clocks to the Arria10 platform
ARM: socfpga: dts: Add tx-fifo-depth and rx-fifo-depth properties
ARM: socfpga: dts: Add multicast bins and unicast filter entries
ARM: socfpga: dts: Add a clock node for sdmmc CIU
ARM: socfpga: dts: rename socdk board file to socdk_sdmmc
ARM: socfpga: dts: enable UART1 for the debug uart
ARM: socfpga: dts: disable the sdmmc, and uart nodes in the base arria10
ARM: socfpga: dts: add cpu1-start-addr for Arria 10
ARM: socfpga: dts: Add adxl34x
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git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Pull "First batch of DT changes for 4.2" from Nicolas Ferre:
- cleanup and addition of Overkiz boards
- at91sam9x5: pwm0 pinctrl definition
- delete deprecated mainck nodes
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: drop deprecated mainck node from pmc
ARM: at91/dt: add support for kizbox2
ARM: at91/dt: add support for kizboxmini
ARM: at91/dt: sam9x5: add pinctrl for pwm0
ARM: at91/dt: at91-kizbox: update chosen node
ARM: at91/dt: at91-kizbox: re-size nand partitions
ARM: at91/dt: at91-kizbox: leds related changes
ARM: at91/dt: at91-kizbox: gpio-keys related changes
ARM: at91/dt: at91-kizbox: user proper serial uart
ARM: at91/dt: at91-kizbox: sanitize file
ARM: at91/dt: kizbox: rename to at91-kizbox
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next/dt
Merge "ARM: DT: Hisilicon hip04 soc and D01 board updates for 4.2" from Wei Xu:
- Add hip04 GPIO nodes
- Add NANDC nodes for hip04 and D01 board
- Add hip04 ethernet related nodes
* tag 'hip04-dt-for-4.2' of git://github.com/hisilicon/linux-hisi:
ARM: dts: add HiSilicon hip04 ethernet controller resource
mtd: hisilicon: add device tree node for NAND controller
ARM: dts: hip04: add GPIO pieces
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Initial device trees for UniPhier SoCs: PH1-sLD3, PH1-LD4, PH1-Pro4,
and PH1-sLD8.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt
Pull "STi DT updates for v4.2, round 1." from Maxime Coquelin:
Highlights:
-----------
- Add DT nodes for SSC on STiH407 family
- Add DT nodes for SD/MMC on STiH407 & STiH418
- Add DT node for LPC on STiH407
- Add Sata DT nodes for STiH407
- Fix PIO3 & PIO35 pins retiming on STiH407
* tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: DT: STi: STiH407: Add sata DT nodes.
ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35
ARM: STi: DT: STiH407: Add Device Tree node for the LPC
mfd: dt-bindings: Provide human readable defines for LPC mode choosing
ARM: STi: DT: STiH418: Add dt nodes for sdhci and emmc.
ARM: STi: DT: STiH407: Add dt nodes for sdhci and emmc.
ARM: sti: Provide DT nodes for SBC SSC[0..2]
ARM: sti: Provide DT nodes for SSC[0..4]
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Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch adds DMA properties to the HSUSB node.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch adds DMA properties to the HSUSB node.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add all the clock nodes for the Arria10 platform. At the same time, update
the peripherals with their respective clocks property.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Add the l4_sys_free_clk node
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Add tx-fifo-depth and rx-fifo-depth devicetree properties for socfpga
stmmac. These devicetree properties will be used to configure certain
features of the stmmac on the socfpga.
Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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Add multicast-filter-bins and perfect-filter-entries configuration properties
to the socfpga devicetree for the Arria 10 socfpga.
Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
node and makes the sdmmc_clk it's parent.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: renamed ciu_clk to sdmmc_clk_divided
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Rename the socfpga_arria10_socdk board file to socfpga_arria10_socdk_sdmmc
as Arria 10 devkit cannot support SDMMC and QSPI at the same time. Thus
we will need to have 2 separate board files, one for SDMMC and one for
QSPI. We also add a new base board dtsi file, socfpga_arria10_socdk.dtsi
so that we use common peripherals for each flavor of the devkits.
Add the sdmmc node to the socfpga_arria10_socdk_sdmmc.dts board file.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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Arria10 devkit is using UART1 for the debug uart port. Remove
unused aliases.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Add removal of unused aliases
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Add status = "disabled" in the base DTSI for Arria10. The SDMMC and uart
nodes should be enabled in the appropriate board file.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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This patch adds the DTS bindings for the adxl34x digital
accelerometer.
Signed-off-by: Walter Lozano <walter@vanguardiasur.com.ar>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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This allows us to reference it later.
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
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With reworked device tree files for Compulab CM-A510 SoM and SBC-A510
base board, now add the correspoding board file to Makefile again.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Existing dts file for Compulab CM-A510 was very limited due to missing
hardware. Now that we actually found somebody with that board, properly
rework it to provide a CoM/SoM include and a board file for Compulab's
SBC-A510.
Both the CM-A510 SoM and the SBC-A510 can be configured with different
options, so we only enable a minimum set of options. The actual board
configuration will have to be set by either the bootloader or user.
Although functionally not required, repeat even disabled nodes again
to increse their visibility in the dtsi/dts files.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Gabriel Dobato <dobatog@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Prior reworking Dove based Compulab CM-A510 device tree, remove it
from the compiled device tree files.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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This adds a i2c-mux-pinctrl node to dove.dtsi for the internal i2c
mux found on Dove SoCs. Up to now, we had no board using any of the
two additional i2c busses, so make sure the change does not break
any existing boards.
Therefore, we rename the i2c-controller node label to "i2c" and
enable it by default. Also, the dedicated sub-bus (now "i2c0") is
enabled by default. The two optional sub-busses require additional
external pin-muxing, so disable them by default.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The clock-frequency property became obsolete since the rework of the main
clock driver in 3.16 (see commit 27cb1c2083373a44130d50d4d2fb64cf7eff2d90).
It now get and uses the clock-frequency from the main_xtal node.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add DT file for Kizbox 2 board.
This board is based on Atmel's SAMA5D31 Cortex-A5 SoC.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add DT file for Kizbox mini board.
This board is based on Atmel's AT91SAM9G25 SoC.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Defines the pinctrl configurations for PWM0.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Note that from now on any of the pfc8575 gpio keys will wake up the
system, as the pfc8575 cannot mask individual interrupts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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sound-codec -> codec
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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sound-codec -> codec
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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sound-codec -> codec
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Spansion s25fl008k is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Spansion s25fl008k is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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wm8978 -> codec
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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