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2024-10-24arm64: dts: rockchip: replace deprecated snps,reset props for NanoPi R3STianling Shen
Replace deprecated snps,reset props and move them to the PHY node. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-3-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: fix model name for FriendlyElec NanoPi R3STianling Shen
Use the marketing name for model name, this matches the dt-binding. Also update the website url in copyright. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-2-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: Enable HDMI0 on rock-5aCristian Ciocaltea
Add the necessary DT changes to enable HDMI0 on Radxa ROCK 5A. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241022-rk3588-hdmi0-dt-v3-1-3cc981e89afb@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: Enable HDMI0 on rk3588-nanopc-t6Marcin Juszkiewicz
Add the necessary DT changes to enable HDMI0 on FriendlyELEC NanoPC-T6. Tested on LTS variant of the board but this part is the same on both. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20241023080605.623125-1-marcin.juszkiewicz@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: pwm-leds for Orange Pi 5Jimmy Hon
The green LED RUN is driven by PWM0_LED that can be controlled by PWM0_M2 Fixes: b6bc755d806e ("arm64: dts: rockchip: Add Orange Pi 5") Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241024012726.1730-2-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: reorder audio/hdmi nodes in Orange Pi 5Jimmy Hon
Fix the node order so analog-audio is before hdmi0-con Audio was submitted first, and it wanted to live above the leds node. Next, the HDMI was submitted, but it wanted to live above the leds node. However, HDMI was approved first, so the Audio node ended up living above the leds node. Fixes: ae46756faff8 ("arm64: dts: rockchip: analog audio on Orange Pi 5") Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241024041851.5600-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: analog audio on Orange Pi 5Jimmy Hon
Analog audio using es8388 codec via the headset jack and onboard mic Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241008031429.2410-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add dtsi file for RK3399S SoC variantDragan Simic
Following the hierarchical representation of the SoC data that's been already established in the commit 296602b8e5f7 ("arm64: dts: rockchip: Move RK3399 OPPs to dtsi files for SoC variants"), add new SoC dtsi file for the Rockchip RK3399S SoC, which is yet another variant of the Rockchip RK3399 SoC. The only perceivable differences between the RK3399S and the RK3399 are in the supported CPU DVFS OPPs, which result from the RK3399S being binned for lower maximum CPU frequencies than the regular RK3399 variant. The RK3399S variant is used in the Pine64 PinePhone Pro only, [1] whose board dts file included the necessary adjustments to the CPU DVFS OPPs. This commit effectively moves those adjustments into the separate RK3399S SoC dtsi file, following the above-mentioned "encapsulation" approach. No functional changes are introduced, which was validated by decompiling and comparing the affected dtb file before and after these changes. [1] https://wiki.pine64.org/index.php/PinePhone_Pro Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/c32622e4a6897378d9df81c8c3eda1bdb9211e0b.1728632052.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Convert dts files used as parents to dtsi filesDragan Simic
Including a board dts file is not the right way to represent the hierarchical nature of the board dts files and to create a dts file for another variant of an ancestor board. However, a few boards and their variants (ab)used this approach, so let's clean that up by converting the common ancestors into dtsi files, and by adding separate board-variant dts files. No functional changes are introduced, which was validated by decompiling and comparing all affected board dtb files before and after these changes. In more detail, the affected dtb files have some of their blocks shuffled around a bit and some of their phandles have different values, as a result of the changes to the order in which the building blocks from the parent dtsi files are included, but they effectively remain the same as the originals. The only perceivable introduced change is the turning of "roc-rk3328-cc" into "ROC-RK3328-CC", which is the model name of one of the affected boards, which was performed to match the styling of the official board name. As a side note, due to the nature of introduced changes, this commit is best viewed using "-B80%/80% -M20% -C5%" as the set of options for git-log(1). Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/f3d789c14fe34a53327cac03cd3837e530e21f5c.1728937091.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: fix the pcie refclock oscillator on Rock 5 ITXHeiko Stuebner
The Rock 5 ITX uses two PCIe controllers to drive both a M.2 slot and its SATA controller with 2 lanes each. The supply for the refclk oscillator is the same that supplies the M.2 slot, but the SATA controller port is supplied by a different rail. This leads to the effect that if the PCIe30x4 controller for the M.2 probes first, everything works normally. But if the PCIe30x2 controller that is connected to the SATA controller probes first, it will hang on the first DBI read as nothing will have enabled the refclock before. Fix this by describing the clock generator with its supplies so that both controllers can reference it as needed. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240906082511.2963890-6-heiko@sntech.de
2024-10-22arm64: dts: rockchip: Add FriendlyARM NanoPi R3S boardTianling Shen
The NanoPi R3S(as "R3S") is an open source platform with dual-Gbps Ethernet ports designed and developed by FriendlyElec for IoT applications. Specification: - Rockchip RK3566 - 2GB LPDDR4X RAM - optional 32GB eMMC module - SD card slot - 2x 1000 Base-T - 3x LEDs (POWER, LAN, WAN) - 2x Buttons (Reset, MaskROM) - 1x USB 3.0 Port - Type-C 5V 2A Power Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241020173946.225960-2-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22dt-bindings: arm: rockchip: Add FriendlyARM NanoPi R3STianling Shen
Add devicetree binding for FriendlyARM NanoPi R3S. Signed-off-by: Tianling Shen <cnsztl@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241020173946.225960-1-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Enable HDMI0 on Orange Pi 5Jimmy Hon
Add the necessary DT changes to enable HDMI0 on Orange Pi 5 Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241019021034.1710-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: add and enable gpu node for Radxa ROCK 5AFUKAUMI Naoki
add gpu node to make it usable on Radxa ROCK 5A. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20241019025008.852-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Enable HDMI0 on orangepi-5-plusCristian Ciocaltea
Add the necessary DT changes to enable HDMI0 on Orange Pi 5 Plus. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-4-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Enable HDMI0 on rk3588-evb1Cristian Ciocaltea
Add the necessary DT changes to enable HDMI0 on Rockchip RK3588 EVB1. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-3-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Enable HDMI0 on rock-5bCristian Ciocaltea
Add the necessary DT changes to enable HDMI0 on Radxa ROCK 5B. Tested-by: FUKAUMI Naoki <naoki@radxa.com> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-2-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add HDMI0 node to rk3588Cristian Ciocaltea
Add support for the HDMI0 output port found on RK3588 SoC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-1-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add Radxa e20c boardYao Zi
Add board-level device tree for Radxa e20c board[1]. This basic implementation supports boot into a kernel with only UART console. Other features will be added later. [1]: https://docs.radxa.com/en/e/e20c Signed-off-by: Yao Zi <ziyao@disroot.org> Link: https://lore.kernel.org/r/20240829092705.6241-5-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add base DT for rk3528 SoCYao Zi
This initial device tree describes CPU, interrupts and UART on the chip and is able to boot into basic kernel with only UART. Cache information is omitted for now as there is no precise documentation. Support for other features will be added later. Signed-off-by: Yao Zi <ziyao@disroot.org> Link: https://lore.kernel.org/r/20240829092705.6241-4-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22dt-bindings: arm: rockchip: Add Radxa E20C boardYao Zi
Add device tree documentation for Radxa E20C board. Link: https://docs.radxa.com/en/e/e20c Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yao Zi <ziyao@disroot.org> Link: https://lore.kernel.org/r/20240829092705.6241-3-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add rk3576-armsom-sige5 boardDetlev Casanova
Add board file for the rk3576 based ArmSoM Sige5 board. While the hardware offers plenty of peripherals and connectivity this basic implementation just handles things required to successfully boot Linux from SD card and connect via UART or Ethernet. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Link: https://lore.kernel.org/r/20240903152308.13565-10-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add rk3576 SoC base DTDetlev Casanova
This device tree contains all devices necessary for booting from network or SD Card. It supports CPU, CRU, PM domains, dma, interrupts, timers, UART, I2C and SDHCI (everything necessary to boot Linux on this system on chip) as well as Ethernet, SPI, GPU and RTC. Signed-off-by: Liang Chen <cl@rock-chips.com> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Tested-by: Liang Chen <cl@rock-chips.com> Link: https://lore.kernel.org/r/20240903152308.13565-9-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22dt-bindings: arm: rockchip: Add ArmSoM Sige 5Detlev Casanova
Add devicetree binding for the ArmSoM Sige 5 board. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240903152308.13565-2-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Drop rockchip prefix of s-p-c PMIC prop from rk356xDiederik de Haas
Property 'rockchip,system-power-controller' was deprecated in commit 961748bb1555 ("dt-bindings: mfd: rk8xx: Deprecate rockchip,system-power-controller") in the "rockchip,rk{805,808,809,817,818}.yaml" mtd bindings and its replacement is (just) 'system-power-controller'. Update the rk356x DT files which still used the deprecated variant. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20241008105450.20648-6-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Drop rockchip prefix of s-p-c PMIC prop from rk3399Diederik de Haas
Property 'rockchip,system-power-controller' was deprecated in commit 961748bb1555 ("dt-bindings: mfd: rk8xx: Deprecate rockchip,system-power-controller") in the "rockchip,rk{805,808,809,817,818}.yaml" mtd bindings and its replacement is (just) 'system-power-controller'. Update the rk3399 DT files which still used the deprecated variant. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20241008105450.20648-5-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Drop rockchip prefix of s-p-c PMIC prop from rk3368Diederik de Haas
Property 'rockchip,system-power-controller' was deprecated in commit 961748bb1555 ("dt-bindings: mfd: rk8xx: Deprecate rockchip,system-power-controller") in the "rockchip,rk{805,808,809,817,818}.yaml" mtd bindings and its replacement is (just) 'system-power-controller'. Update the rk3368 DT files which still used the deprecated variant. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20241008105450.20648-4-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Drop rockchip prefix of s-p-c PMIC prop from rk3328Diederik de Haas
Property 'rockchip,system-power-controller' was deprecated in commit 961748bb1555 ("dt-bindings: mfd: rk8xx: Deprecate rockchip,system-power-controller") in the "rockchip,rk{805,808,809,817,818}.yaml" mtd bindings and its replacement is (just) 'system-power-controller'. Update the rk3328 DT files which still used the deprecated variant. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20241008105450.20648-3-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Drop rockchip prefix of s-p-c PMIC prop from px30Diederik de Haas
Property 'rockchip,system-power-controller' was deprecated in commit 961748bb1555 ("dt-bindings: mfd: rk8xx: Deprecate rockchip,system-power-controller") in the "rockchip,rk{805,808,809,817,818}.yaml" mtd bindings and its replacement is (just) 'system-power-controller'. Update the px30 DT files which still used the deprecated variant. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20241008105450.20648-2-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-08arm64: rockchip: add clocks property to cru node rk3328Johan Jonker
Add clocks property to rk3328 cru node to fix warnings like: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20240930215001.1999212-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-08arm64: dts: rockchip: fix compatible string rk3328 cru nodeJohan Jonker
The cru node references undocumented compatibles of "rockchip,cru" and also marks it as syscon. A general rockchip,cru is way too generic to ever be used anywhere, so needs to go away, similarly the cru should not be written to from other places, instead regular clock routines should be used. Both mainline Linux as well as the vendor-kernel up to their 6.1 branch only reference the cru via the normal assigned-clocks, clocks and resets properties and do not get a syscon from the node. Similarly, there is no syscon access by compatible both in mainline nor the vendor-kernel up to their 6.1 branch, through either the rockchip,rk3328-cru nor rockchip,cru compatibles. So these two really are unused in all publically visible places. Sidenote: the vendor-kernel does pretty crazy stuff in the camera interface and tdm driver, where they map the cru separately and set clock muxes and gates directly. This should of course never reach mainline anyway. Signed-off-by: Johan Jonker <jbx6244@gmail.com> [update commit message, to explain the unused compatibles] Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240930215001.1999212-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-05arm64: dts: rockchip: Switch to hp-det-gpiosGeert Uytterhoeven
Replace the deprecated "hp-det-gpio" property by "hp-det-gpios" in Audio Graph Card and Realtek RT5651 Audio Codec device nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/717e7c9527139c3a3e5246dd367a3ad98c5c81b6.1727438777.git.geert+renesas@glider.be Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-05arm64: dts: rockchip: Switch to simple-audio-card,hp-det-gpiosGeert Uytterhoeven
Replace the deprecated "simple-audio-card,hp-det-gpio" property by "simple-audio-card,hp-det-gpios" in Simple Audio Card device nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/c976b09c6048564737321cf91c3f97b9da5dbfe8.1727438777.git.geert+renesas@glider.be Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-02arm64: dts: rockchip: Enable all 3 USBs on Turing RK1Sam Edwards
The Turing RK1 contains 3 different USBs: - USB0: USB 2.0, OTG - USB1: USB 3.0, host - USB2: USB 2.0, host This patch activates the necessary DT nodes to enable all 3 buses. Future work will be needed on USB0: it is not USB3-capable, so the USB0 controller needs to be told that there is no USB3 port. Per Jonas's suggestion, the USBDP0 node is given a `rockchip,dp-lane-mux` property that tells the USBDP driver that USBDP0 is not involved in USB so that it can make the necessary configuration changes in hardware. Technically, this is USB *controller* configuration, not *PHY* configuration, so the underlying code may be moved in the future to the USB controller driver instead, freeing up the (software) dependency on USBDP0. A TODO comment is added to explain this. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Suggested-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240930210652.1232951-1-CFSworks@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-02arm64: dts: rockchip: Add Powkiddy RGB20SXChris Morgan
The Powkiddy RGB20SX is a portable game console extremely similar to the existing RGB30 console. The key differences from the RGB30 are as follows: - Realtek RTW8723DS WiFi and Bluetooth. - UART pads for debug console (UART2). - A function button (ADC channel 0). - A much larger battery (5000 mAh). Otherwise, the device is identical to the RGB30, including the hard-coded value on ADC channel 1 used to identify the device at runtime. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20241001154016.87386-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-02dt-bindings: arm: rockchip: Add Powkiddy RGB20SXChris Morgan
Add devicetree binding for Powkiddy RGB20SX. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241001154016.87386-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-02arm64: dts: rockchip: Add power button for puma-haikouDaniel Semkowicz
There is a PWRBTN# input pin exposed on a Q7 connector. The pin is routed to a GPIO0_A1 through a diode. Q7 specification describes the PWRBTN# pin as a Power Button signal. Configure the pin as KEY_POWER, so it can function as power button and trigger device shutdown. Signed-off-by: Daniel Semkowicz <dse@thaumatec.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20241001134741.210979-1-dse@thaumatec.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: add LED_FUNCTION_STATUS for RGB LEDs on Radxa E25FUKAUMI Naoki
multicolor(RGB) PWM LEDs on Radxa E25 carrier board is clearly defined as status LED ("use it to see the status") in product overview[1]. add "function = LED_FUNCTION_STATUS" to "multi-led". [1] https://radxa.com/products/network-computer/e25#overview Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20240816215316.1429-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: Add AP6275P wireless support to Khadas Edge 2Jacobe Zang
Khadas Edge2 uses the PCI-e Ampak AP6275P 2T2R Wi-Fi 6 module. The pcie@0 node can be used as Bridge1, so the wifi@0 node is used as a device under the Bridge1. Co-developed-by: Muhammed Efe Cetin <efectn@protonmail.com> Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com> Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com> Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com> Link: https://lore.kernel.org/r/20240910-dts-v14-1-82b39bd91257@wesion.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: Enable GPU on Turing RK1Sam Edwards
Enable the Mali GPU in the Turing RK1. This patch also sets the external GPU voltage regulator in the RK806-1 to "always-on" because it is necessary for this regulator to be active when enabling the GPU power domain or the kernel will fail with: rockchip-pm-domain fd8d8000.power-management:power-controller: \ failed to set domain 'gpu', val=0 rockchip-pm-domain fd8d8000.power-management:power-controller: \ failed to get ack on domain 'gpu', val=0x1bffff ...followed by a panic when it attempts to access unavailable QoS registers. Since there is currently no `domain-supply` or similar to express this dependency, the only way to ensure that the regulator is never off when the GPU power domain is brought up is to ensure that the regulator is never off. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Link: https://lore.kernel.org/r/20240912025034.180233-6-CFSworks@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: Enable automatic fan control on Turing RK1Sam Edwards
This patch adds thermal trip points and cooling maps to the Turing RK1 in order to enable automatic control of the external PWM fan. The fan is not active below 45C, as the heatsink alone can generally keep the chip in this temperature region at idle load. This cooling profile errs on the side of quietness, since the RK1 is commonly deployed in a Turing Pi 2 clusterboard alongside three others, with additional cooling provided at the chassis level. Helped-by: soxrok2212 <soxrok2212@gmail.com> Signed-off-by: Sam Edwards <CFSworks@gmail.com> Link: https://lore.kernel.org/r/20240912025034.180233-4-CFSworks@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: Fix Turing RK1 PCIe3 hangSam Edwards
The PCIe 3 PHY in the RK3588 requires a running external reference clock for both external bus transfers and some internal PIPE operations. Without this clock, the PCIe3 controller fails to initialize and ignores DBI transactions indefinitely, which stalls the Linux boot process. On most RK3588 boards, this is evidently not an issue. But on some "SoM" designs (Turing RK1, Mixtile Core 3588E, ArmSoM AIM7, to name a few), this clock is only provided when the CLKREQ# signal is asserted. The PCIe 3 PHY generates the CLKREQ# signal when it knows it needs the reference clock for proper operation. Unfortunately, the current DT for Turing RK1 does not mux out these low-speed signals, resulting in broken boots and potentially other issues. This patch, following the previous one that split up the PCIe pinctrls, resolves this problem for Turing RK1 by explicitly muxing all of the signals needed for PCIe 2 and 3 support. Cc: Jonathan Bennett <jbennett@incomsystems.biz> Fixes: 2806a69f3fef ("arm64: dts: rockchip: Add Turing RK1 SoM support") Signed-off-by: Sam Edwards <CFSworks@gmail.com> Link: https://lore.kernel.org/r/20240912025034.180233-3-CFSworks@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: Split up RK3588's PCIe pinctrlsSam Edwards
These pinctrls manage the low-speed PCIe signals: - CLKREQ#: An output on the RK3588 (both RC or EP modes), used to request that external clock-generation circuitry provide a clock. - PERST#: An input on the RK3588 in EP mode, used to detect a reset signal from the RC. In RC mode, the hardware does not use this signal: Linux itself generates it by putting the pin in GPIO mode. - WAKE#: In EP mode, this is an output; in RC mode, this is an input. Each of these signals serves a distinct purpose, and more importantly, PERST# should not be muxed when the RK3588 is in the RC role. Bundling them together in pinctrl groups prevents proper use: indeed, almost none of the current board-specific .dts files make any use of them. (Exception: Rock 5A recently had a patch land that misuses _pins; this patch corrects that.) However, on some RK3588 boards, the PCIe 3 controller will indefinitely stall the boot if CLKREQ# is not muxed (details in the next patch). This patch unbundles the signals to allow them to be used. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Link: https://lore.kernel.org/r/20240912025034.180233-2-CFSworks@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: Add RK3588S EVB1 boardDamon Ding
RK3588S EVB1 board features: - Rockchip RK3588S - PMIC: RK806-2x2pcs+DiscretePower - RAM: LPDDR4/4x 2pcsx 32bit - ROM: eMMC5.1+ SPI Falsh Add support for pmic, eMMC, SD-card, USB, PCIE and audio. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Link: https://lore.kernel.org/r/20240914095456.2347532-3-damon.ding@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30dt-bindings: arm: rockchip: Add RK3588S EVB1 boardDamon Ding
Add devicetree binding for the Rockchip RK3588S evaluation board. RK3588S EVB1 board features: - Rockchip RK3588S - PMIC: RK806-2x2pcs+DiscretePower - RAM: LPDDR4/4x 2pcsx 32bit - ROM: eMMC5.1+ SPI Falsh Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240914095456.2347532-2-damon.ding@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: Add ArmSoM W3 boardJianfeng Liu
W3 is the carrier board for LM7 System on Module. W3 features: - 1x 2.5GbE Realtek RTL8125 Ethernet - 2x HDMI Type A out - 1x HDMI Type A in - 1x USB 3.1 Type C - 2x USB 2.0 Type A - 2x USB 3.0 Type A - 1x PCIE 2.0 M.2 E Key (1 lane) - 1x PCIE 3.0 PCIe (4 lanes) - 1x TF scard slot - 1x MIPI CSI - 1x MIPI DSI - 1x ES8316 audio jack - 1x FAN connector - 1x RTC - 40-pin expansion header Add support for ArmSoM LM7 board. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Link: https://lore.kernel.org/r/20240918165008.169917-4-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: Add ArmSoM LM7 SoMJianfeng Liu
LM7 is an System on Module made by ArmSoM based on Rockchip RK3588. This SoM is used by W3 Board. LM7 features: - Rockchip RK3588 - LPDDR4x 4/8/16/32 GB - eMMC 16/32/64/128 GB Add support for ArmSoM LM7 SoM. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Link: https://lore.kernel.org/r/20240918165008.169917-3-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30dt-bindings: arm: rockchip: Add ArmSoM LM7 SoMJianfeng Liu
LM7 is an System on Module made by ArmSoM based on Rockchip RK3588. This SoM is used by W3 Board. LM7 features: - Rockchip RK3588 - LPDDR4x 4/8/16/32 GB - eMMC 16/32/64/128 GB Add devicetree binding for ArmSoM LM7 SoM. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240918165008.169917-2-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: enable automatic fan control on Orange Pi 5+Florian Klink
This links the PWM fan on Orange Pi 5+ as an active cooling device managed automatically by the thermal subsystem, with a target SoC temperature of 65C and a minimum-spin interval from 55C to 65C to ensure airflow when the system gets warm. This is pretty much the same as '4a152231b050 ("arm64: dts: rockchip: enable automatic fan control on Rock 5B")', except for the Orange Pi 5+ board. Signed-off-by: Florian Klink <flokli@flokli.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20240922145538.256235-2-flokli@flokli.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-30arm64: dts: rockchip: add attiny_rst_gate to RingneckJakob Unterwurzacher
Ringneck v1.4 can contain (placement option) an on-board ATtiny microcontroller instead of an STM32. In normal operation, this is transparent to the software, as both microcontrollers emulate the same ICs (amc6821 and isl1208). For flashing the ATtiny, the SWITCH_REG1 regulator of the board's PMIC is used to enable the ATtiny UPDI debug interface. If the STM32 is placed, or if we are running on an older Ringneck revision, SWITCH_REG1 is not connected and has no effect. Add attiny-updi-gate-regulator so userspace can control it via sysfs (needs CONFIG_REGULATOR_USERSPACE_CONSUMER): echo enabled > /sys/devices/platform/attiny-updi-gate-regulator/state Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de> Tested-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20240926132028.21910-1-jakob.unterwurzacher@cherry.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit (git 2.34.1) at 2025-07-16 02:59:31 +0000