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2023-04-07Merge branch 'ib-qcom-quad-spi' of ↵Bjorn Andersson
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into arm64-for-6.4 Merge the support for output-enable/disable in the pinctrl-msm driver, to ensure that bisection across the following SC7180/SC7280 DeviceTree changes result in something electrically sound. Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-04-07arm64: dts: qcom: Add ipq9574 SoC and AL02 board supportDevi Priya
Add initial device tree support for Qualcomm IPQ9574 SoC and AL02 board Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Co-developed-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316072940.29137-6-quic_devipriy@quicinc.com
2023-04-07Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into HEADBjorn Andersson
Merge the IPQ9574 Global Clock Controller Devicetree binding, to make available the clock definitions used in the Devicetree source.
2023-04-07dt-bindings: clock: Add ipq9574 clock and reset definitionsDevi Priya
Add clock and reset ID definitions for ipq9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316072940.29137-2-quic_devipriy@quicinc.com
2023-04-07arm64: dts: qcom: msm8994-angler: removed clash with smem_regionPetr Vorel
This fixes memory overlap error: [ 0.000000] reserved@6300000 (0x0000000006300000--0x0000000007000000) overlaps with smem_region@6a00000 (0x0000000006a00000--0x0000000006c00000) smem_region is the same as in downstream (qcom,smem) [1], therefore split reserved memory into two sections on either side of smem_region. Not adding labels as it's not expected to be used. [1] https://android.googlesource.com/kernel/msm/+/refs/heads/android-msm-angler-3.10-marshmallow-mr1/arch/arm/boot/dts/qcom/msm8994.dtsi#948 Fixes: 380cd3a34b7f ("arm64: dts: msm8994-angler: fix the memory map") Signed-off-by: Petr Vorel <pvorel@suse.cz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230131200414.24373-3-pvorel@suse.cz
2023-04-07arm64: dts: qcom: msm8994-angler: Fix cont_splash_mem mappingPetr Vorel
Angler's cont_splash_mem mapping is shorter in downstream [1], therefore 380cd3a34b7f was wrong. Obviously also 0e5ded926f2a was wrong (workaround which fixed booting at the time). This fixes error: [ 0.000000] memory@3401000 (0x0000000003401000--0x0000000005601000) overlaps with tzapp@4800000 (0x0000000004800000--0x0000000006100000) [1] https://android.googlesource.com/kernel/msm/+/refs/heads/android-msm-angler-3.10-marshmallow-mr1/arch/arm64/boot/dts/huawei/huawei_msm8994_angler_row_vn1/huawei-fingerprint.dtsi#16 Fixes: 380cd3a34b7f ("arm64: dts: msm8994-angler: fix the memory map") Fixes: 0e5ded926f2a ("arm64: dts: qcom: msm8994-angler: Disable cont_splash_mem") Signed-off-by: Petr Vorel <pvorel@suse.cz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230131200414.24373-2-pvorel@suse.cz
2023-04-07MAINTAINERS: qcom: Add reviewer for Qualcomm ChromebooksDouglas Anderson
Developers on the ChromeOS team generally want to be notified to review changes that affect Chromebook device tree files. While we could individually add developers, the set of developers and the time each one has available to review patches will change over time. Let's try adding a group list as a reviewer and see if that's an effective way to manage things. A few notes: * Though this email address is actually backed by a mailing list, I'm adding it as "R"eviewer and not "L"ist since it's not a publicly readable mailing list and it's intended just to have a few people on it. This also hopefully conveys a little more responisbility for the people that are part of this group. * I've added all sc7180 and sc7280 files here. At the moment I'm not aware of any non-Chromebooks being supported that use these chips. If later something shows up then we can try to narrow down. * I've added "sdm845-cheza" to this list but not the rest of "sdm845". Cheza never shipped but some developers still find the old developer boards useful and thus it continues to get minimal maintenance. Most sdm845 device tree work, however, seems to be for non-Chromebooks. Cc: Stephen Boyd <swboyd@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230330141051.1.If8eb4f30cb53a00a5bef1b7d3cc645c3536615ec@changeid
2023-04-06arm64: dts: qcom: ipq5332: add few device nodesKathiravan T
Add the nodes for QUP peripheral, PRNG and WDOG. While at it, enable the I2C device for MI01.2 board. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230320104530.30411-3-quic_kathirav@quicinc.com
2023-04-06arm64: dts: qcom: sm8550: add ADSP audio codec macrosKrzysztof Kozlowski
Add the Low Power Audio SubSystem (LPASS) / ADSP audio codec macros on Qualcomm SM8550. The nodes are very similar to SM8450, except missing NPL clock which is not exposed on SM8550 and should not be touched. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230310134925.514125-1-krzysztof.kozlowski@linaro.org
2023-04-06arm64: dts: qcom: Remove "iommus" property from PCIe nodesManivannan Sadhasivam
Currently, most of the Qualcomm SoCs specify both "iommus" and "iommu-map" properties for the PCIe nodes. First one passes the SMR mask to the iommu driver and the latter specifies the SID for each PCIe device. But with "iommus" property, the PCIe controller will be added to the iommu group along with the devices. This makes no sense because the controller will not initiate any DMA transaction on its own. And moreover, it is not strictly required to pass the SMR mask to the iommu driver. If the "iommus" property is not present, then the default mask of "0" would be used which should work for all PCIe devices. On the other side, if the SMR mask specified doesn't match the one expected by the hypervisor, then all the PCIe transactions will end up triggering "Unidentified Stream Fault" by the SMMU. So to get rid of these hassles and also prohibit PCIe controllers from adding to the iommu group, let's remove the "iommus" property from PCIe nodes. Reported-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/linux-arm-msm/20230227195535.GA749409-robh@kernel.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230308075648.134119-1-manivannan.sadhasivam@linaro.org
2023-04-06arm64: dts: qcom: sm8450: simplify interrupts-extendedKrzysztof Kozlowski
The parent controller for both interrupts is GIC, so no need for interrupts-extended. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230405060906.143058-5-krzysztof.kozlowski@linaro.org
2023-04-06arm64: dts: qcom: sm8250: simplify interrupts-extendedKrzysztof Kozlowski
The parent controller for the interrupt is GIC, so no need for interrupts-extended. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230405060906.143058-4-krzysztof.kozlowski@linaro.org
2023-04-06arm64: dts: qcom: sc8280xp: simplify interrupts-extendedKrzysztof Kozlowski
The parent controller for both interrupts is GIC, so no need for interrupts-extended. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230405060906.143058-3-krzysztof.kozlowski@linaro.org
2023-04-06arm64: dts: qcom: sm8450: label the Soundwire nodesKrzysztof Kozlowski
Use labels, instead of comments, for Soundwire controllers. Naming them is useful, because they are specialized and have also naming in datasheet/programming guide. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230405060906.143058-2-krzysztof.kozlowski@linaro.org
2023-04-06arm64: dts: qcom: sc8280xp: label the Soundwire nodesKrzysztof Kozlowski
Use labels, instead of comments, for Soundwire controllers. Naming them is useful, because they are specialized and have also naming in datasheet/programming guide. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230405060906.143058-1-krzysztof.kozlowski@linaro.org
2023-04-05arm64: dts: qcom: sm6115: Use the correct DSI compatibleKonrad Dybcio
Use the non-deprecated, SoC-specific DSI compatible. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-9-70e13b1214fa@linaro.org
2023-04-04arm64: dts: qcom: sc8280xp-x13s: Add bluetoothSteev Klimaszewski
The Lenovo Thinkpad X13s has a WCN6855 Bluetooth controller on uart2, add this. Signed-off-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230326233812.28058-5-steev@kali.org
2023-04-04arm64: dts: qcom: sc8280xp: Define uart2Bjorn Andersson
Add the definition for uart2 for sc8280xp devices. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230326233812.28058-4-steev@kali.org
2023-04-04arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodesManivannan Sadhasivam
The "mhi" region contains the debug registers that could be used to monitor the PCIe link transitions. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316081117.14288-19-manivannan.sadhasivam@linaro.org
2023-04-04arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodesManivannan Sadhasivam
The "mhi" region contains the debug registers that could be used to monitor the PCIe link transitions. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316081117.14288-18-manivannan.sadhasivam@linaro.org
2023-04-04arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodesManivannan Sadhasivam
The "mhi" region contains the debug registers that could be used to monitor the PCIe link transitions. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316081117.14288-17-manivannan.sadhasivam@linaro.org
2023-04-04arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOsBartosz Golaszewski
Set line names for GPIO lines exposed by PMICs on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-16-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodesBartosz Golaszewski
Add GPIO controller nodes to PMICs that have the GPIO hooked up on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-15-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: pmic: add thermal zonesBartosz Golaszewski
Add the thermal zones and associated alarm nodes for the PMICs that have them hooked up on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-12-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN inputBartosz Golaszewski
Add the RESIN input for sa8775p platforms' PMIC. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-11-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: pmic: add the power keyBartosz Golaszewski
Add the power key node under the PON node for PMIC #0 on sa8775p. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-10-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: add the Power On device nodeBartosz Golaszewski
Add the PON node to PMIC #0 for sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-9-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: add support for the on-board PMICsBartosz Golaszewski
Add a new .dtsi file for sa8775p PMICs and add the four PMICs interfaced to the SoC via SPMI. Enable the PMICs for sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-8-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: add the spmi nodeBartosz Golaszewski
Add the SPMI PMIC Arbiter node for SA8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-6-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: add the pdc nodeBartosz Golaszewski
Add the Power Domain Controller node for SA8775p. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-5-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: sort soc nodes by reg propertyBartosz Golaszewski
Sort all children of the soc node by the first address in their reg property. This was mostly already the case but there were some nodes that didn't follow it so fix it now for consistency. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-3-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sa8775p: pad reg properties to 8 digitsBartosz Golaszewski
The file has inconsistent padding of the address part of soc node children's reg properties. Fix it. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-2-brgl@bgdev.pl
2023-04-04arm64: dts: qcom: sc8280xp: correct Soundwire wakeup interrupt nameKrzysztof Kozlowski
The bindings expect second Soundwire interrupt to be "wakeup" (Linux driver takes by index): sc8280xp-crd.dtb: soundwire-controller@3330000: interrupt-names:1: 'wakeup' was expected Fixes: c18773d162a6 ("arm64: dts: qcom: sc8280xp: add SoundWire and LPASS") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230403132328.61414-1-krzysztof.kozlowski@linaro.org
2023-04-04arm64: dts: qcom: sdm845-tama: Enable GPI_DMA0/1Konrad Dybcio
Enable both GPI DMAs. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230313-topic-tama_disp-v3-6-2b1567c039d7@linaro.org
2023-04-04arm64: dts: qcom: sdm845-tama: Enable GPUKonrad Dybcio
Enable the A630 GPU and its GMU. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230313-topic-tama_disp-v3-5-2b1567c039d7@linaro.org
2023-04-04arm64: dts: qcom: sdm845-tama: Enable remoteprocsKonrad Dybcio
Enable ADSP, CDSP and Venus. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230313-topic-tama_disp-v3-4-2b1567c039d7@linaro.org
2023-04-04arm64: dts: qcom: sdm845-tama: Add regulator-system-load to l14a/l28aKonrad Dybcio
Add the properties to ensure the ever so delicate touchscreen setup matches downstream. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230313-topic-tama_disp-v3-3-2b1567c039d7@linaro.org
2023-04-04arm64: dts: qcom: sdm845-tama: Add Synaptics TouchscreenKonrad Dybcio
Add required pins and RMI4 node to the common DT and remove it from Akatsuki, as it uses a different touch. Since the panels are super high tech proprietary incell, they need to be handled with very precise timings. As such the panel driver sets up the power rails and GPIOs and the touchscreen driver *has to* probe afterwards. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230313-topic-tama_disp-v3-2-2b1567c039d7@linaro.org
2023-04-04arm64: dts: qcom: sdm845-tama: Add display nodesKonrad Dybcio
Add required nodes to support display on XZ2/XZ2c. XZ3 has a different power rail setup and needs to be handled separately. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230313-topic-tama_disp-v3-1-2b1567c039d7@linaro.org
2023-04-04arm64: dts: msm8953: Pad regs to 8 digitsAdam Skladowski
Follow other dtses and pad regs to 8 digits. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230325112852.18841-4-a39.skl@gmail.com
2023-04-04arm64: dts: msm8953: Drop unsupported dwc3 flagAdam Skladowski
Property phy_mode according to binding checker does not exist, drop it. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230325112852.18841-3-a39.skl@gmail.com
2023-04-04arm64: dts: msm8953: Provide dsi_phy clocks to gccAdam Skladowski
Provide clocks from dsi_phy to gcc, this will make sure we don't fallback to global name lookup. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230325112852.18841-2-a39.skl@gmail.com
2023-04-04arm64: dts: msm8953: Replace xo_board with rpmcc sourced xoAdam Skladowski
Assign RPM_SMD_XO_CLK_SRC from rpmcc in place of fixed-clock where possible. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230325112852.18841-1-a39.skl@gmail.com
2023-04-04arm64: dts: qcom: sm8450: remove invalid properties in cluster-sleep nodesNeil Armstrong
Fixes the following DT bindings check error: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' domain-idle-states: cluster-sleep-1: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230323-topic-sm8450-upstream-dt-bindings-fixes-v2-2-0ca1bea1a843@linaro.org
2023-04-04arm64: dts: qcom: sc8280xp: drop incorrect domain idle states propertiesKrzysztof Kozlowski
Domain idle states do not use 'idle-state-name': sc8280xp-crd.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name' does not match any of the regexes: 'pinctrl-[0-9]+' Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/all/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-4-3ead1e418fe4@linaro.org/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324073813.22158-6-krzysztof.kozlowski@linaro.org
2023-04-04arm64: dts: qcom: sm8350: drop incorrect domain idle states propertiesKrzysztof Kozlowski
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sm8350-mtp.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/all/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-4-3ead1e418fe4@linaro.org/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324073813.22158-5-krzysztof.kozlowski@linaro.org
2023-04-04arm64: dts: qcom: sm8150: drop incorrect domain idle states propertiesKrzysztof Kozlowski
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sm8150-hdk.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/all/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-4-3ead1e418fe4@linaro.org/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324073813.22158-4-krzysztof.kozlowski@linaro.org
2023-04-04arm64: dts: qcom: sm6375: drop incorrect domain idle states propertiesKrzysztof Kozlowski
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sm6375-sony-xperia-murray-pdx225.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/all/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-4-3ead1e418fe4@linaro.org/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324073813.22158-3-krzysztof.kozlowski@linaro.org
2023-04-04arm64: dts: qcom: sdm845: drop incorrect domain idle states propertiesKrzysztof Kozlowski
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sdm845-shift-axolotl.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/all/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-4-3ead1e418fe4@linaro.org/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324073813.22158-2-krzysztof.kozlowski@linaro.org
2023-04-04arm64: dts: qcom: sm8250: drop incorrect domain idle states propertiesKrzysztof Kozlowski
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sm8250-hdk.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/all/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-4-3ead1e418fe4@linaro.org/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324073813.22158-1-krzysztof.kozlowski@linaro.org
generated by cgit (git 2.34.1) at 2025-07-15 11:24:55 +0000