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2021-02-16net: amd-xgbe: Fix NETDEV WATCHDOG transmit queue timeout warningShyam Sundar S K
The current driver calls netif_carrier_off() late in the link tear down which can result in a netdev watchdog timeout. Calling netif_carrier_off() immediately after netif_tx_stop_all_queues() avoids the warning. ------------[ cut here ]------------ NETDEV WATCHDOG: enp3s0f2 (amd-xgbe): transmit queue 0 timed out WARNING: CPU: 3 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x20d/0x220 Modules linked in: amd_xgbe(E) amd-xgbe 0000:03:00.2 enp3s0f2: Link is Down CPU: 3 PID: 0 Comm: swapper/3 Tainted: G E Hardware name: AMD Bilby-RV2/Bilby-RV2, BIOS RBB1202A 10/18/2019 RIP: 0010:dev_watchdog+0x20d/0x220 Code: 00 49 63 4e e0 eb 92 4c 89 e7 c6 05 c6 e2 c1 00 01 e8 e7 ce fc ff 89 d9 48 RSP: 0018:ffff90cfc28c3e88 EFLAGS: 00010286 RAX: 0000000000000000 RBX: 0000000000000000 RCX: 0000000000000006 RDX: 0000000000000007 RSI: 0000000000000086 RDI: ffff90cfc28d63c0 RBP: ffff90cfb977845c R08: 0000000000000050 R09: 0000000000196018 R10: ffff90cfc28c3ef8 R11: 0000000000000000 R12: ffff90cfb9778000 R13: 0000000000000003 R14: ffff90cfb9778480 R15: 0000000000000010 FS: 0000000000000000(0000) GS:ffff90cfc28c0000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00007f240ff2d9d0 CR3: 00000001e3e0a000 CR4: 00000000003406e0 Call Trace: <IRQ> ? pfifo_fast_reset+0x100/0x100 call_timer_fn+0x2b/0x130 run_timer_softirq+0x3e8/0x440 ? enqueue_hrtimer+0x39/0x90 Fixes: e722ec82374b ("amd-xgbe: Update the BelFuse quirk to support SGMII") Co-developed-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: amd-xgbe: Reset the PHY rx data path when mailbox command timeoutShyam Sundar S K
Sometimes mailbox commands timeout when the RX data path becomes unresponsive. This prevents the submission of new mailbox commands to DXIO. This patch identifies the timeout and resets the RX data path so that the next message can be submitted properly. Fixes: 549b32af9f7c ("amd-xgbe: Simplify mailbox interface rate change code") Co-developed-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16Merge branches 'clk-socfpga', 'clk-mstar', 'clk-qcom' and 'clk-warnings' ↵Stephen Boyd
into clk-next - PLL support on MStar/SigmaStar ARMv7 SoCs - CPU clks for Qualcomm SDX55 - GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs - GCC clks for Qualcomm SM8350 - Video clk fixups on Qualcomm SM8250 - GPU clks for Qualcomm SDM660/SDM630 - Improvements for multimedia clks on Qualcomm MSM8998 - Fix many warnings with W=1 enabled builds under drivers/clk/ * clk-socfpga: clk: socfpga: agilex: add clock driver for eASIC N5X platform dt-bindings: documentation: add clock bindings information for eASIC N5X * clk-mstar: clk: mstar: msc313-mpll: Fix format specifier clk: mstar: Allow MStar clk drivers to be compile tested clk: mstar: MStar/SigmaStar MPLL driver clk: fixed: add devm helper for clk_hw_register_fixed_factor() dt-bindings: clk: mstar msc313 mpll binding description dt-bindings: clk: mstar msc313 mpll binding header * clk-qcom: (42 commits) clk: qcom: Add Global Clock controller (GCC) driver for SC7280 dt-bindings: clock: Add SC7280 GCC clock binding clk: qcom: rpmh: Add support for RPMH clocks on SC7280 dt-bindings: clock: Add RPMHCC bindings for SC7280 clk: qcom: gcc-sm8350: add gdsc dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver clk: qcom: gcc-sdm660: Mark GPU CFG AHB clock as critical clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc clk: qcom: gdsc: Implement NO_RET_PERIPH flag clk: qcom: mmcc-msm8998: Set bimc_smmu_gdsc always on clk: qcom: mmcc-msm8998: Add hardware clockgating registers to some clks clk: qcom: gcc-msm8998: Fix Alpha PLL type for all GPLLs clk: qcom: gcc-msm8998: Mark gpu_cfg_ahb_clk as critical ... * clk-warnings: (27 commits) clk: zynq: clkc: Remove various instances of an unused variable 'clk' clk: versatile: clk-icst: Fix worthy struct documentation block clk: ti: gate: Fix possible doc-rot in 'omap36xx_gate_clk_enable_with_hsdiv_restore' clk: ti: dpll: Fix misnaming of '_register_dpll()'s 'user' parameter clk: ti: clockdomain: Fix description for 'omap2_init_clk_clkdm's hw param clk: st: clkgen-fsyn: Fix worthy struct documentation demote partially filled one clk: st: clkgen-pll: Demote unpopulated kernel-doc header clk: mvebu: ap-cpu-clk: Demote non-conformant kernel-doc header clk: socfpga: clk-pll-a10: Remove set but unused variable 'rc' clk: socfpga: clk-pll: Remove unused variable 'rc' clk: sifive: fu540-prci: Declare static const variable 'prci_clk_fu540' where it's used clk: bcm: clk-iproc-pll: Demote kernel-doc abuse clk: zynqmp: divider: Add missing description for 'max_div' clk: spear: Move prototype to accessible header clk: qcom: clk-rpm: Remove a bunch of superfluous code clk: clk-xgene: Add description for 'mask' and fix formatting for 'flags' clk: qcom: mmcc-msm8974: Remove unused static const tables 'mmcc_xo_mmpll0_1_2_gpll0{map}' clk: clk-npcm7xx: Remove unused static const tables 'npcm7xx_gates' and 'npcm7xx_divs_fx' clk: clk-fixed-mmio: Demote obvious kernel-doc abuse clk: qcom: gcc-ipq4019: Remove unused variable 'ret' ...
2021-02-16Merge branches 'clk-vc5', 'clk-silabs', 'clk-aspeed', 'clk-qoriq' and ↵Stephen Boyd
'clk-rohm' into clk-next - Support crystal load capacitance for Versaclock VC5 - Add a "skip recall" DT binding for Silicon Labs' si570 to avoid glitches at boot * clk-vc5: clk: vc5: Add support for optional load capacitance dt-bindings: clk: versaclock5: Add optional load capacitance property * clk-silabs: clk: si570: Skip NVM to RAM recall operation if an optional property is set dt-bindings: clock: si570: Add 'silabs,skip-recall' property * clk-aspeed: clk: aspeed: Fix APLL calculate formula from ast2600-A2 * clk-qoriq: clk: qoriq: use macros to generate pll_mask * clk-rohm: clk: BD718x7: Do not depend on parent driver data
2021-02-16Merge branches 'clk-mediatek', 'clk-imx', 'clk-amlogic' and 'clk-at91' into ↵Stephen Boyd
clk-next * clk-mediatek: clk: mediatek: mux: Update parent at enable time clk: mediatek: mux: Drop unused clock ops clk: mediatek: Select all the MT8183 clocks by default * clk-imx: dt-bindings: clock: imx: Switch to my personal address MAINTAINERS: Add section for NXP i.MX clock drivers clk: imx: Move 'imx6sl_set_wait_clk()'s prototype out to accessible header clk: imx8mn: add clkout1/2 support clk: imx8mm: add clkout1/2 support clk: imx8mq: add PLL monitor output clk: imx: clk-imx31: Remove unused static const table 'uart_clks' clk: imx6q: demote warning about pre-boot ldb_di_clk reparenting clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS subsystems clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2() clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 bypass clocks clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 PLL clocks * clk-amlogic: clk: meson: axg: Remove MIPI enable clock gate clk: meson-axg: remove CLKID_MIPI_ENABLE dt-bindings: clock: meson8b: remove non-existing clock macros clk: meson: meson8b: remove compatibility code for old .dtbs clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate() clk: meson: clk-pll: make "ret" a signed integer clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL * clk-at91: clk: at91: Fix the declaration of the clocks
2021-02-16Merge branch 'clk-unused' into clk-nextStephen Boyd
- Remove efm32 clk driver - Remove tango4 clk driver - Remove zte zx clk driver - Remove sirf prima2/atlast clk drivers - Remove u300 clk driver * clk-unused: clk: remove u300 driver clk: remove sirf prima2/atlas drivers clk: remove zte zx driver clk: remove tango4 driver clk: Drop unused efm32gg driver
2021-02-16Merge branches 'clk-doc', 'clk-renesas', 'clk-allwinner', 'clk-rockchip' and ↵Stephen Boyd
'clk-xilinx' into clk-next - Convert Xilinx VCU clk driver to a proper clk provider driver - Expose Xilinx ZynqMP clk driver to more platforms * clk-doc: linux/clk.h: use correct kernel-doc notation for 2 functions * clk-renesas: (21 commits) clk: renesas: cpg-mssr: Fix formatting issues for 'smstpcr_saved's documentation clk: renesas: r8a779a0: Add RAVB clocks clk: renesas: r8a779a0: Add I2C clocks dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add support for RZ/G2 M/N/H clk: renesas: r8a779a0: Add SYS-DMAC clocks clk: renesas: r8a779a0: Add SDHI support clk: renesas: rcar-gen3: Factor out CPG library clk: renesas: rcar-gen3: Remove cpg_quirks access when registering SD clock clk: renesas: r8a779a0: Add MSIOF clocks clk: renesas: r8a779a0: Add PFC/GPIO clocks clk: renesas: r8a779a0: Fix parent of CBFUSA clock clk: renesas: r8a779a0: Remove non-existent S2 clock clk: renesas: r8a779a0: Add HSCIF support clk: renesas: r8a779a0: Add RWDT clocks clk: renesas: r8a779a0: Add VSPX clock support clk: renesas: r8a779a0: Add VSPD clock support clk: renesas: r8a779a0: Add FCPVD clock support clk: renesas: r8a77995: Add TMU clocks clk: renesas: r8a77990: Add TMU clocks clk: renesas: r8a77965: Add TMU clocks ... * clk-allwinner: clk: sunxi-ng: Add support for the Allwinner H616 CCU clk: sunxi-ng: Add support for the Allwinner H616 R-CCU dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616 clk: sunxi-ng: h6: Fix clock divider range on some clocks clk: sunxi: clk-mod0: Demote non-conformant kernel-doc header clk: sunxi: clk-a10-ve: Demote obvious kernel-doc abuse clk: sunxi: clk-sunxi: Demote a bunch of non-conformant kernel-doc headers clk: sunxi-ng: h6: Fix CEC clock clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset * clk-rockchip: clk: rockchip: fix DPHY gate locations on rk3368 clk: rockchip: use clock id for SCLK_VIP_OUT on rk3368 clk: rockchip: add clock id for SCLK_VIP_OUT on rk3368 clk: rockchip: use clock ids for PCLK_DPHYRX and PCLK_DPHYTX0 on rk3368 clk: rockchip: add clock ids for PCLK_DPHYRX and PCLK_DPHYTX0 on rk3368 clk: rockchip: Demote non-conformant kernel-doc header in half-divider clk: rockchip: Demote kernel-doc abuses to standard comment blocks in plls clk: rockchip: Remove unused/undocumented struct members from clk-cpu clk: rockchip: Demote non-conformant kernel-doc headers in main clock code * clk-xilinx: clk: xilinx: move xlnx_vcu clock driver from soc soc: xilinx: vcu: fix alignment to open parenthesis soc: xilinx: vcu: fix repeated word the in comment soc: xilinx: vcu: use bitfields for register definition soc: xilinx: vcu: remove calculation of PLL configuration soc: xilinx: vcu: make the PLL configurable soc: xilinx: vcu: make pll post divider explicit soc: xilinx: vcu: implement clock provider for output clocks soc: xilinx: vcu: register PLL as fixed rate clock soc: xilinx: vcu: implement PLL disable soc: xilinx: vcu: add helpers for configuring PLL soc: xilinx: vcu: add helper to wait for PLL locked soc: xilinx: vcu: drop coreclk from struct xlnx_vcu clk: divider: fix initialization with parent_hw ARM: dts: vcu: define indexes for output clocks clk: axi-clkgen: use devm_platform_ioremap_resource() short-hand dt-bindings: clock: adi,axi-clkgen: add compatible string for ZynqMP support clk: clk-axiclkgen: add ZynqMP PFD and VCO limits clk: axi-clkgen: replace ARCH dependencies with driver deps
2021-02-16Merge branch 'Fixes-applied-to-VCS8514'David S. Miller
Bjarni Jonasson says: ==================== Fixes applied to VCS8514 3 different fixes applied to VSC8514: LCPLL reset, serdes calibration and coma mode disabled. Especially the serdes calibration is large and is now placed in a new file 'mscc_serdes.c' which can act as a placeholder for future serdes configuration. v1 -> v2: Preserved reversed christmas tree Removed forward definitions Fixed build issues Changed net to net-next v2 -> v3: Added cover letter. Removed ena_clk_bypass from function call Created mscc_serdes.c and .h for serdes configuration Modified coma register config. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: phy: mscc: coma mode disabled for VSC8514Bjarni Jonasson
The 'coma mode' (configurable through sw or hw) provides an optional feature that may be used to control when the PHYs become active. The typical usage is to synchronize the link-up time across all PHY instances. This patch releases coma mode if not done by hardware, otherwise the phys will not link-up. Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: phy: mscc: improved serdes calibration applied to VSC8514Bjarni Jonasson
The current IB serdes calibration algorithm (performed by the onboard 8051) has proven to be unstable for the VSC8514 QSGMII phy. A new algorithm has been developed based on 'Frequency-offset Jittered-Injection' or 'FoJi' method which solves all known issues. This patch disables the 8051 algorithm and replaces it with the new FoJi algorithm. The calibration is now performed in a new file (mscc_serdes.c), which can act as an placeholder for future serdes configurations. Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: phy: mscc: adding LCPLL reset to VSC8514Bjarni Jonasson
At Power-On Reset, transients may cause the LCPLL to lock onto a clock that is momentarily unstable. This is normally seen in QSGMII setups where the higher speed 6G SerDes is being used. This patch adds an initial LCPLL Reset to the PHY (first instance) to avoid this issue. Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net/mlx5: Add cyc2time HW translation mode supportAya Levin
Device timestamp can be in real time mode (cycles to time translation is offloaded into the Hardware). With real time mode, HW provides timestamp which is already translated into nanoseconds. With this mode, driver adjusts both the HW and timecounter (to keep clock_info_page updated) using callbacks: adjfreq, adjtime and settime. HW clock modifications are done via MTUTC access reg commands. Driver is allowed to modify HW real time clock only if MCAM ptpcyc2realtime_modify capability is set. Add MTUTC set function to be used for configuring the HW real time clock. Modify existing code to support both internal timer (with conversion via timecounter_cyc2time() and real time (no conversions). Align the signatures of the helpers converting from timestamp to nanoseconds. With that, when allocating a queue assign the corresponding callback with respect to the capability. Adjust 1PPS timestamp calculation flows based on the timestamp mode. Cyc2time offload brings two major advantages: - Improve MTAE (Max Time Absolute Error) for HW TS by up to 160 ns over a 100% loaded CPU. - Faster data-path timestamp to nanoseconds, as translation is lock-less and done in HW. On real time mode, timestamp format is 32 high bits of seconds and 32 low bits of nanoseconds. On some flows, driver shall convert this format into nanoseconds wall-clock with REAL_TIME_TO_NS macro. HW supports a single clock, and it is shared by all functions on a device. In case real time clock is used, it is recommended to use a single GM to all device's functions. Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-02-16net/mlx5: Move some PPS logic into helper functionsEran Ben Elisha
Some of PPS logic (timestamp calculations) fits only internal timer timestamp mode. Move these logics into helper functions. Later in the patchset cyc2time HW translation mode will expose its own PPS timestamp calculations. With this change, main flow will only hold calling PPS logic based on run time mode. Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-02-16net/mlx5: Move all internal timer metadata into a dedicated structEran Ben Elisha
Internal timer mode (SW clock) requires some PTP clock related metadata structs. Real time mode (HW clock) will not need these metadata structs. This separation emphasize the different interfaces for HW clock and SW clock. Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-02-16net/mlx5: Refactor init clock functionEran Ben Elisha
Function mlx5_init_clock() is responsible for internal PTP related metadata initializations. Break mlx5_init_clock() to sub functions, each takes care of its own logic. Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-02-16net/mlx5: Add register layout to support real-time time-stampEran Ben Elisha
Add needed structure layouts and defines for MTUTC (Management UTC) register. MTUTC will be used for cyc2time HW translation. In addition, add cyc2time modify capability bit and init segment HCA real time address. Finally, add capability bits indicating which time-stamping format is supported per SQ and RQ. Add ts_format in the queue's context layout to allow configuration. Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-02-16Merge branch 'Fix-buggy-brport-flags-offload-for-SJA1105-DSA'David S. Miller
Vladimir Oltean says: ==================== Fix buggy brport flags offload for SJA1105 DSA I am resending this series because the title and the patches were mixed up and these patches were lost. This series' cover letter was used as the merge commit for the unrelated "Fixing build breakage after "Merge branch 'Propagate-extack-for-switchdev-LANs-from-DSA'"" series, as can be seen below: https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=ca04422afd6998611a81d0ea1b61d5a5f4923f84 while the actual patches from the "Fix buggy brport flags offload for SJA1105 DSA" series were marked as superseded and not applied: https://patchwork.kernel.org/project/netdevbpf/cover/20210214155704.1784220-1-olteanv@gmail.com/ which they should have. I know with so many bugs I introduced it's hard to keep track, I'm sorry. Original series description: While testing software bridging on sja1105, I discovered that I managed to introduce two bugs in a single patch submitted recently to net-next. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: dsa: sja1105: fix leakage of flooded frames outside bridging domainVladimir Oltean
Quite embarrasingly, I managed to fool myself into thinking that the flooding domain of sja1105 source ports is restricted by the forwarding domain, which it isn't. Frames which match an FDB entry are forwarded towards that entry's DESTPORTS restricted by REACH_PORT[SRC_PORT], while frames that don't match any FDB entry are forwarded towards FL_DOMAIN[SRC_PORT] or BC_DOMAIN[SRC_PORT]. This means we can't get away with doing the simple thing, and we must manage the flooding domain ourselves such that it is restricted by the forwarding domain. This new function must be called from the .port_bridge_join and .port_bridge_leave methods too, not just from .port_bridge_flags as we did before. Fixes: 4d9423549501 ("net: dsa: sja1105: offload bridge port flags to device") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: dsa: sja1105: fix configuration of source address learningVladimir Oltean
Due to a mistake, the driver always sets the address learning flag to the previously stored value, and not to the currently configured one. The bug is visible only in standalone ports mode, because when the port is bridged, the issue is masked by .port_stp_state_set which overwrites the address learning state to the proper value. Fixes: 4d9423549501 ("net: dsa: sja1105: offload bridge port flags to device") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16octeontx2-af: cn10k: Fixes CN10K RPM reference issueGeetha sowjanya
This patch fixes references to uninitialized variables and debugfs entry name for CN10K platform and HW_TSO flag check. Fixes: 3ad3f8f93c81 ("octeontx2-af: cn10k: MAC internal loopback support"). Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> v1-v2 - Clear HW_TSO flag for 96xx B0 version. This patch fixes the bug introduced by the commit 3ad3f8f93c81 ("octeontx2-af: cn10k: MAC internal loopback support"). These changes are not yet merged into net branch, hence submitting to net-next. Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: dsa: felix: perform teardown on error in felix_setupVladimir Oltean
If the driver fails to probe, it would be nice to not leak memory. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16net: dsa: felix: don't deinitialize unused portsVladimir Oltean
ocelot_init_port is called only if dsa_is_unused_port == false, however ocelot_deinit_port is called unconditionally. This causes a warning in the skb_queue_purge inside ocelot_deinit_port saying that the spin lock protecting ocelot_port->tx_skbs was not initialized. Fixes: e5fb512d81d0 ("net: mscc: ocelot: deinitialize only initialized ports") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16ionic: Remove unused function pointer typedef ionic_reset_cbChen Lin
Remove the 'ionic_reset_cb' typedef as it is not used. Signed-off-by: Chen Lin <chen.lin5@zte.com.cn> Acked-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextDavid S. Miller
Daniel Borkmann says: ==================== pull-request: bpf-next 2021-02-16 The following pull-request contains BPF updates for your *net-next* tree. There's a small merge conflict between 7eeba1706eba ("tcp: Add receive timestamp support for receive zerocopy.") from net-next tree and 9cacf81f8161 ("bpf: Remove extra lock_sock for TCP_ZEROCOPY_RECEIVE") from bpf-next tree. Resolve as follows: [...] lock_sock(sk); err = tcp_zerocopy_receive(sk, &zc, &tss); err = BPF_CGROUP_RUN_PROG_GETSOCKOPT_KERN(sk, level, optname, &zc, &len, err); release_sock(sk); [...] We've added 116 non-merge commits during the last 27 day(s) which contain a total of 156 files changed, 5662 insertions(+), 1489 deletions(-). The main changes are: 1) Adds support of pointers to types with known size among global function args to overcome the limit on max # of allowed args, from Dmitrii Banshchikov. 2) Add bpf_iter for task_vma which can be used to generate information similar to /proc/pid/maps, from Song Liu. 3) Enable bpf_{g,s}etsockopt() from all sock_addr related program hooks. Allow rewriting bind user ports from BPF side below the ip_unprivileged_port_start range, both from Stanislav Fomichev. 4) Prevent recursion on fentry/fexit & sleepable programs and allow map-in-map as well as per-cpu maps for the latter, from Alexei Starovoitov. 5) Add selftest script to run BPF CI locally. Also enable BPF ringbuffer for sleepable programs, both from KP Singh. 6) Extend verifier to enable variable offset read/write access to the BPF program stack, from Andrei Matei. 7) Improve tc & XDP MTU handling and add a new bpf_check_mtu() helper to query device MTU from programs, from Jesper Dangaard Brouer. 8) Allow bpf_get_socket_cookie() helper also be called from [sleepable] BPF tracing programs, from Florent Revest. 9) Extend x86 JIT to pad JMPs with NOPs for helping image to converge when otherwise too many passes are required, from Gary Lin. 10) Verifier fixes on atomics with BPF_FETCH as well as function-by-function verification both related to zero-extension handling, from Ilya Leoshkevich. 11) Better kernel build integration of resolve_btfids tool, from Jiri Olsa. 12) Batch of AF_XDP selftest cleanups and small performance improvement for libbpf's xsk map redirect for newer kernels, from Björn Töpel. 13) Follow-up BPF doc and verifier improvements around atomics with BPF_FETCH, from Brendan Jackman. 14) Permit zero-sized data sections e.g. if ELF .rodata section contains read-only data from local variables, from Yonghong Song. 15) veth driver skb bulk-allocation for ndo_xdp_xmit, from Lorenzo Bianconi. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-16clk: mstar: msc313-mpll: Fix format specifierDaniel Palmer
The output dividers are unsigned int so the format specifier should have been %u not %d. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20210215115710.3762276-2-daniel@0x0f.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-16clk: mstar: Allow MStar clk drivers to be compile testedDaniel Palmer
Allow COMPILE_TEST to also build the MStar clk drivers instead of only building them when ARCH_MSTARV7 is selected. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Suggested-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20210215115710.3762276-1-daniel@0x0f.com [sboyd@kernel.org: Drop regmap select too] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-16Merge branch 'mlx5_timestamp' into rdma.git for-nextJason Gunthorpe
Leon Romanovsky says: ==================== Add an extra timestamp format for mlx5_ib device. ==================== Based on the mlx5-next branch at git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux due to dependencies. Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> * branch 'mlx5_timestamp': RDMA/mlx5: Fail QP creation if the device can not support the CQE TS net/mlx5: Add new timestamp mode bits
2021-02-16RDMA/mlx5: Fail QP creation if the device can not support the CQE TSAharon Landau
In ConnectX6Dx device, HW can work in real time timestamp mode according to the device capabilities per RQ/SQ/QP. When the flag IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION is set, the user expect to get TS on the CQEs in free running format, so we need to fail the QP creation if the current mode of the device doesn't support it. Link: https://lore.kernel.org/r/20210209131107.698833-3-leon@kernel.org Signed-off-by: Aharon Landau <aharonl@nvidia.com> Signed-off-by: Maor Gottlieb <maorg@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/mlx5: Allow CQ creation without attached EQsTal Gilboa
The traditional DevX CQ creation flow goes through mlx5_core_create_cq() which checks that the given EQN corresponds to an existing EQ and attaches a devx handler to the EQN for the CQ. In some cases the EQ will not be a kernel EQ, but will be controlled by modify CQ, don't block creating these just because the EQN can't be found in the kernel. Link: https://lore.kernel.org/r/20210211085549.1277674-1-leon@kernel.org Signed-off-by: Tal Gilboa <talgi@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/rtrs-srv-sysfs: fix missing put_deviceGioh Kim
put_device() decreases the ref-count and then the device will be cleaned-up, while at is also add missing put_device in rtrs_srv_create_once_sysfs_root_folders This patch solves a kmemleak error as below: unreferenced object 0xffff88809a7a0710 (size 8): comm "kworker/4:1H", pid 113, jiffies 4295833049 (age 6212.380s) hex dump (first 8 bytes): 62 6c 61 00 6b 6b 6b a5 bla.kkk. backtrace: [<0000000054413611>] kstrdup+0x2e/0x60 [<0000000078e3120a>] kobject_set_name_vargs+0x2f/0xb0 [<00000000f1a17a6b>] dev_set_name+0xab/0xe0 [<00000000d5502e32>] rtrs_srv_create_sess_files+0x2fb/0x314 [rtrs_server] [<00000000ed11a1ef>] rtrs_srv_info_req_done+0x631/0x800 [rtrs_server] [<000000008fc5aa8f>] __ib_process_cq+0x94/0x100 [ib_core] [<00000000a9599cb4>] ib_cq_poll_work+0x32/0xc0 [ib_core] [<00000000cfc376be>] process_one_work+0x4bc/0x980 [<0000000016e5c96a>] worker_thread+0x78/0x5c0 [<00000000c20b8be0>] kthread+0x191/0x1e0 [<000000006c9c0003>] ret_from_fork+0x3a/0x50 Fixes: baa5b28b7a47 ("RDMA/rtrs-srv: Replace device_register with device_initialize and device_add") Link: https://lore.kernel.org/r/20210212134525.103456-5-jinpu.wang@cloud.ionos.com Signed-off-by: Gioh Kim <gi-oh.kim@cloud.ionos.com> Signed-off-by: Jack Wang <jinpu.wang@cloud.ionos.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/rtrs-srv: fix memory leak by missing kobject freeGioh Kim
kmemleak reported an error as below: unreferenced object 0xffff8880674b7640 (size 64): comm "kworker/4:1H", pid 113, jiffies 4296403507 (age 507.840s) hex dump (first 32 bytes): 69 70 3a 31 39 32 2e 31 36 38 2e 31 32 32 2e 31 ip:192.168.122.1 31 30 40 69 70 3a 31 39 32 2e 31 36 38 2e 31 32 10@ip:192.168.12 backtrace: [<0000000054413611>] kstrdup+0x2e/0x60 [<0000000078e3120a>] kobject_set_name_vargs+0x2f/0xb0 [<00000000ca2be3ee>] kobject_init_and_add+0xb0/0x120 [<0000000062ba5e78>] rtrs_srv_create_sess_files+0x14c/0x314 [rtrs_server] [<00000000b45b7217>] rtrs_srv_info_req_done+0x5b1/0x800 [rtrs_server] [<000000008fc5aa8f>] __ib_process_cq+0x94/0x100 [ib_core] [<00000000a9599cb4>] ib_cq_poll_work+0x32/0xc0 [ib_core] [<00000000cfc376be>] process_one_work+0x4bc/0x980 [<0000000016e5c96a>] worker_thread+0x78/0x5c0 [<00000000c20b8be0>] kthread+0x191/0x1e0 [<000000006c9c0003>] ret_from_fork+0x3a/0x50 It is caused by the not-freed kobject of rtrs_srv_sess. The kobject embedded in rtrs_srv_sess has ref-counter 2 after calling process_info_req(). Therefore it must call kobject_put twice. Currently it calls kobject_put only once at rtrs_srv_destroy_sess_files because kobject_del removes the state_in_sysfs flag and then kobject_put in free_sess() is not called. This patch moves kobject_del() into free_sess() so that the kobject of rtrs_srv_sess can be freed. And also this patch adds the missing call of sysfs_remove_group() to clean-up the sysfs directory. Fixes: 9cb837480424 ("RDMA/rtrs: server: main functionality") Link: https://lore.kernel.org/r/20210212134525.103456-4-jinpu.wang@cloud.ionos.com Signed-off-by: Gioh Kim <gi-oh.kim@cloud.ionos.com> Signed-off-by: Jack Wang <jinpu.wang@cloud.ionos.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/rtrs: Only allow addition of path to an already established sessionMd Haris Iqbal
While adding a path from the client side to an already established session, it was possible to provide the destination IP to a different server. This is dangerous. This commit adds an extra member to the rtrs_msg_conn_req structure, named first_conn; which is supposed to notify if the connection request is the first for that session or not. On the server side, if a session does not exist but the first_conn received inside the rtrs_msg_conn_req structure is 1, the connection request is failed. This signifies that the connection request is for an already existing session, and since the server did not find one, it is an wrong connection request. Fixes: 6a98d71daea1 ("RDMA/rtrs: client: main functionality") Fixes: 9cb837480424 ("RDMA/rtrs: server: main functionality") Link: https://lore.kernel.org/r/20210212134525.103456-3-jinpu.wang@cloud.ionos.com Signed-off-by: Md Haris Iqbal <haris.iqbal@cloud.ionos.com> Reviewed-by: Lutz Pogrell <lutz.pogrell@cloud.ionos.com> Signed-off-by: Jack Wang <jinpu.wang@cloud.ionos.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/rtrs-srv: Fix stack-out-of-boundsJack Wang
BUG: KASAN: stack-out-of-bounds in _mlx4_ib_post_send+0x1bd2/0x2770 [mlx4_ib] Read of size 4 at addr ffff8880d5a7f980 by task kworker/0:1H/565 CPU: 0 PID: 565 Comm: kworker/0:1H Tainted: G O 5.4.84-storage #5.4.84-1+feature+linux+5.4.y+dbg+20201216.1319+b6b887b~deb10 Hardware name: Supermicro H8QG6/H8QG6, BIOS 3.00 09/04/2012 Workqueue: ib-comp-wq ib_cq_poll_work [ib_core] Call Trace: dump_stack+0x96/0xe0 print_address_description.constprop.4+0x1f/0x300 ? irq_work_claim+0x2e/0x50 __kasan_report.cold.8+0x78/0x92 ? _mlx4_ib_post_send+0x1bd2/0x2770 [mlx4_ib] kasan_report+0x10/0x20 _mlx4_ib_post_send+0x1bd2/0x2770 [mlx4_ib] ? check_chain_key+0x1d7/0x2e0 ? _mlx4_ib_post_recv+0x630/0x630 [mlx4_ib] ? lockdep_hardirqs_on+0x1a8/0x290 ? stack_depot_save+0x218/0x56e ? do_profile_hits.isra.6.cold.13+0x1d/0x1d ? check_chain_key+0x1d7/0x2e0 ? save_stack+0x4d/0x80 ? save_stack+0x19/0x80 ? __kasan_slab_free+0x125/0x170 ? kfree+0xe7/0x3b0 rdma_write_sg+0x5b0/0x950 [rtrs_server] The problem is when we send imm_wr, the type should be ib_rdma_wr, so hw driver like mlx4 can do rdma_wr(wr), so fix it by use the ib_rdma_wr as type for imm_wr. Fixes: 9cb837480424 ("RDMA/rtrs: server: main functionality") Link: https://lore.kernel.org/r/20210212134525.103456-2-jinpu.wang@cloud.ionos.com Signed-off-by: Jack Wang <jinpu.wang@cloud.ionos.com> Reviewed-by: Gioh Kim <gi-oh.kim@cloud.ionos.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/rxe: Remove unused pkt->offsetBob Pearson
The pkt->offset field is never used except to assign it to 0. But it adds lots of unneeded code. This patch removes the field and related code. This causes a measurable improvement in performance. Link: https://lore.kernel.org/r/20210211210455.3274-1-rpearson@hpe.com Signed-off-by: Bob Pearson <rpearson@hpe.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/ucma: Fix use-after-free bug in ucma_create_ueventAvihai Horon
ucma_process_join() allocates struct ucma_multicast mc and frees it if an error occurs during its run. Specifically, if an error occurs in copy_to_user(), a use-after-free might happen in the following scenario: 1. mc struct is allocated. 2. rdma_join_multicast() is called and succeeds. During its run, cma_iboe_join_multicast() enqueues a work that will later use the aforementioned mc struct. 3. copy_to_user() is called and fails. 4. mc struct is deallocated. 5. The work that was enqueued by cma_iboe_join_multicast() is run and calls ucma_create_uevent() which tries to access mc struct (which is freed by now). Fix this bug by cancelling the work enqueued by cma_iboe_join_multicast(). Since cma_work_handler() frees struct cma_work, we don't use it in cma_iboe_join_multicast() so we can safely cancel the work later. The following syzkaller report revealed it: BUG: KASAN: use-after-free in ucma_create_uevent+0x2dd/0x;3f0 drivers/infiniband/core/ucma.c:272 Read of size 8 at addr ffff88810b3ad110 by task kworker/u8:1/108 CPU: 1 PID: 108 Comm: kworker/u8:1 Not tainted 5.10.0-rc6+ #257 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.13.0-0-gf21b5a4aeb02-prebuilt.qemu.org 04/01/2014 Workqueue: rdma_cm cma_work_handler Call Trace: __dump_stack lib/dump_stack.c:77 [inline] dump_stack+0xbe/0xf9 lib/dump_stack.c:118 print_address_description.constprop.0+0x3e/0×60 mm/kasan/report.c:385 __kasan_report mm/kasan/report.c:545 [inline] kasan_report.cold+0x1f/0×37 mm/kasan/report.c:562 ucma_create_uevent+0x2dd/0×3f0 drivers/infiniband/core/ucma.c:272 ucma_event_handler+0xb7/0×3c0 drivers/infiniband/core/ucma.c:349 cma_cm_event_handler+0x5d/0×1c0 drivers/infiniband/core/cma.c:1977 cma_work_handler+0xfa/0×190 drivers/infiniband/core/cma.c:2718 process_one_work+0x54c/0×930 kernel/workqueue.c:2272 worker_thread+0x82/0×830 kernel/workqueue.c:2418 kthread+0x1ca/0×220 kernel/kthread.c:292 ret_from_fork+0x1f/0×30 arch/x86/entry/entry_64.S:296 Allocated by task 359: kasan_save_stack+0x1b/0×40 mm/kasan/common.c:48 kasan_set_track mm/kasan/common.c:56 [inline] __kasan_kmalloc mm/kasan/common.c:461 [inline] __kasan_kmalloc.constprop.0+0xc2/0xd0 mm/kasan/common.c:434 kmalloc include/linux/slab.h:552 [inline] kzalloc include/linux/slab.h:664 [inline] ucma_process_join+0x16e/0×3f0 drivers/infiniband/core/ucma.c:1453 ucma_join_multicast+0xda/0×140 drivers/infiniband/core/ucma.c:1538 ucma_write+0x1f7/0×280 drivers/infiniband/core/ucma.c:1724 vfs_write fs/read_write.c:603 [inline] vfs_write+0x191/0×4c0 fs/read_write.c:585 ksys_write+0x1a1/0×1e0 fs/read_write.c:658 do_syscall_64+0x2d/0×40 arch/x86/entry/common.c:46 entry_SYSCALL_64_after_hwframe+0x44/0xa9 Freed by task 359: kasan_save_stack+0x1b/0×40 mm/kasan/common.c:48 kasan_set_track+0x1c/0×30 mm/kasan/common.c:56 kasan_set_free_info+0x1b/0×30 mm/kasan/generic.c:355 __kasan_slab_free+0x112/0×160 mm/kasan/common.c:422 slab_free_hook mm/slub.c:1544 [inline] slab_free_freelist_hook mm/slub.c:1577 [inline] slab_free mm/slub.c:3142 [inline] kfree+0xb3/0×3e0 mm/slub.c:4124 ucma_process_join+0x22d/0×3f0 drivers/infiniband/core/ucma.c:1497 ucma_join_multicast+0xda/0×140 drivers/infiniband/core/ucma.c:1538 ucma_write+0x1f7/0×280 drivers/infiniband/core/ucma.c:1724 vfs_write fs/read_write.c:603 [inline] vfs_write+0x191/0×4c0 fs/read_write.c:585 ksys_write+0x1a1/0×1e0 fs/read_write.c:658 do_syscall_64+0x2d/0×40 arch/x86/entry/common.c:46 entry_SYSCALL_64_after_hwframe+0x44/0xa9 The buggy address belongs to the object at ffff88810b3ad100 which belongs to the cache kmalloc-192 of size 192 The buggy address is located 16 bytes inside of 192-byte region [ffff88810b3ad100, ffff88810b3ad1c0) Fixes: b5de0c60cc30 ("RDMA/cma: Fix use after free race in roce multicast join") Link: https://lore.kernel.org/r/20210211090517.1278415-1-leon@kernel.org Reported-by: Amit Matityahu <mitm@nvidia.com> Signed-off-by: Avihai Horon <avihaih@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/core: Fix kernel doc warnings for ib_port_immutable_read()Leon Romanovsky
drivers/infiniband/core/device.c:859: warning: Function parameter or member 'dev' not described in 'ib_port_immutable_read' drivers/infiniband/core/device.c:859: warning: Function parameter or member 'port' not described in 'ib_port_immutable_read' Fixes: 7416790e2245 ("RDMA/core: Introduce and use API to read port immutable data") Link: https://lore.kernel.org/r/20210210151421.1108809-1-leon@kernel.org Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/qedr: Use true and false for bool variableJiapeng Chong
Fix the following coccicheck warning: ./drivers/infiniband/hw/qedr/qedr.h:629:9-10: WARNING: return of 0/1 in function 'qedr_qp_has_rq' with return type bool. ./drivers/infiniband/hw/qedr/qedr.h:620:9-10: WARNING: return of 0/1 in function 'qedr_qp_has_sq' with return type bool. Link: https://lore.kernel.org/r/1612949901-109873-1-git-send-email-jiapeng.chong@linux.alibaba.com Reported-by: Abaci Robot<abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Acked-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/hns: Adjust definition of FRMR fieldsYixing Liu
FRMR is not well-supported on HIP08, it is re-designed for HIP09 and the position of related fields is changed. Then the ULPs should be forbidden to use FRMR on older hardwares. Link: https://lore.kernel.org/r/1612924424-28217-1-git-send-email-liweihang@huawei.com Signed-off-by: Yixing Liu <liuyixing1@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/hns: Refactor process of posting CMDQLang Cheng
Simplify __hns_roce_cmq_send() then remove the redundant variables. Link: https://lore.kernel.org/r/1612688143-28226-6-git-send-email-liweihang@huawei.com Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/hns: Adjust fields and variables about CMDQ tail/headLang Cheng
The register 0x07014 is actually the head pointer of CMDQ, and 0x07010 means tail pointer. Current definitions are confusing, so rename them and related variables. The next_to_use of structure hns_roce_v2_cmq_ring has the same semantics as head, merge them into one member. The next_to_clean of structure hns_roce_v2_cmq_ring has the same semantics as tail. After deleting next_to_clean, tail should also be deleted. Link: https://lore.kernel.org/r/1612688143-28226-5-git-send-email-liweihang@huawei.com Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/hns: Remove redundant operations on CMDQLang Cheng
CMDQ works serially, after each successful transmission, the head and tail pointers will be equal, so there is no need to check whether the queue is full. At the same time, since the descriptor of each transmission is new, there is no need to perform a cleanup operation. Then, the field named next_to_clean in structure hns_roce_v2_cmq_ring is redundant. Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver") Link: https://lore.kernel.org/r/1612688143-28226-4-git-send-email-liweihang@huawei.com Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/hns: Fixes missing error code of CMDQLang Cheng
When posting a multi-descriptors command, the error code of previous failed descriptors may be rewrote to 0 by a later successful descriptor. Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver") Link: https://lore.kernel.org/r/1612688143-28226-3-git-send-email-liweihang@huawei.com Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/hns: Remove unused member and variable of CMDQLang Cheng
last_status of structure hns_roce_v2_cmq has never been used, and the variable named 'complete' in __hns_roce_cmq_send() is meaningless. Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver") Link: https://lore.kernel.org/r/1612688143-28226-2-git-send-email-liweihang@huawei.com Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16RDMA/ipoib: Remove racy Subnet Manager sendonly join checksChristoph Lameter
When a system receives a REREG event from the SM, then the SM information in the kernel is marked as invalid and a request is sent to the SM to update the information. The SM information is invalid in that time period. However, receiving a REREG also occurs simultaneously in user space applications that are now trying to rejoin the multicast groups. Some of those may be sendonly multicast groups which are then failing. If the SM information is invalid then ib_sa_sendonly_fullmem_support() returns false. That is wrong because it just means that we do not know yet if the potentially new SM supports sendonly joins. Sendonly join was introduced in 2015 and all the Subnet managers have supported it ever since. So there is no point in checking if a subnet manager supports it. Should an old opensm get a request for a sendonly join then the request will fail. The code that is removed here accomodated that situation and fell back to a full join. Falling back to a full join is problematic in itself. The reason to use the sendonly join was to reduce the traffic on the Infiniband fabric otherwise one could have just stayed with the regular join. So this patch may cause users of very old opensms to discover that lots of traffic needlessly crosses their IB fabrics. Link: https://lore.kernel.org/r/alpine.DEB.2.22.394.2101281845160.13303@www.lameter.com Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-02-16io_uring: tctx->task_lock should be IRQ safeJens Axboe
We add task_work from any context, hence we need to ensure that we can tolerate it being from IRQ context as well. Fixes: 7cbf1722d5fc ("io_uring: provide FIFO ordering for task_work") Signed-off-by: Jens Axboe <axboe@kernel.dk>
2021-02-16thermal: qcom: Fix comparison with uninitialized variable channels_availableColin Ian King
Currently the check of chip->channels[i].channel is against an the uninitialized variable channels_available. I believe the variable channels_available needs to be fetched first by the call to adc_tm5_read before the channels check. Fix the issue swapping the order of the channels check loop with the call to adc_tm5_read. Addresses-Coverity: ("Uninitialized scalar variable") Fixes: ca66dca5eda6 ("thermal: qcom: add support for adc-tm5 PMIC thermal monitor") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210216151626.162996-1-colin.king@canonical.com
2021-02-16SUNRPC: Further clean up svc_tcp_sendmsg()Chuck Lever
Clean up: The msghdr is no longer needed in the caller. Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2021-02-16SUNRPC: Remove redundant socket flags from svc_tcp_sendmsg()Trond Myklebust
Now that the caller controls the TCP_CORK socket option, it is redundant to set MSG_MORE and MSG_SENDPAGE_NOTLAST in the calls to kernel_sendpage(). Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com> Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2021-02-16SUNRPC: Use TCP_CORK to optimise send performance on the serverTrond Myklebust
Use a counter to keep track of how many requests are queued behind the xprt->xpt_mutex, and keep TCP_CORK set until the queue is empty. Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com> Link: https://lore.kernel.org/linux-nfs/20210213202532.23146-1-trondmy@kernel.org/T/#u Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2021-02-16vmlinux.lds.h: catch more UBSAN symbols into .dataAlexander Lobakin
LKP triggered lots of LD orphan warnings [0]: mipsel-linux-ld: warning: orphan section `.data.$Lubsan_data299' from `init/do_mounts_rd.o' being placed in section `.data.$Lubsan_data299' mipsel-linux-ld: warning: orphan section `.data.$Lubsan_data183' from `init/do_mounts_rd.o' being placed in section `.data.$Lubsan_data183' mipsel-linux-ld: warning: orphan section `.data.$Lubsan_type3' from `init/do_mounts_rd.o' being placed in section `.data.$Lubsan_type3' mipsel-linux-ld: warning: orphan section `.data.$Lubsan_type2' from `init/do_mounts_rd.o' being placed in section `.data.$Lubsan_type2' mipsel-linux-ld: warning: orphan section `.data.$Lubsan_type0' from `init/do_mounts_rd.o' being placed in section `.data.$Lubsan_type0' [...] Seems like "unnamed data" isn't the only type of symbols that UBSAN instrumentation can emit. Catch these into .data with the wildcard as well. [0] https://lore.kernel.org/linux-mm/202102160741.k57GCNSR-lkp@intel.com Fixes: f41b233de0ae ("vmlinux.lds.h: catch UBSAN's "unnamed data" into data") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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