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2023-01-31arm64: dts: qcom: sc8280xp-crd: drop #sound-dai-cells from eDP nodeDmitry Baryshkov
The eDP device doesn't provide sound DAI. Drop corresponding property from the eDP node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230118031718.1714861-3-dmitry.baryshkov@linaro.org
2023-01-31arm64: dts: qcom: Add base QDU1000/QRU1000 IDP DTsMelody Olvera
Add DTs for Qualcomm IDP platforms using the QDU1000 and QRU1000 SoCs. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112210722.6234-3-quic_molvera@quicinc.com
2023-01-31arm64: dts: qcom: Add base QDU1000/QRU1000 DTSIsMelody Olvera
Add the base DTSI files for QDU1000 and QRU1000 SoCs, including base descriptions of CPUs, GCC, RPMHCC, QUP, TLMM, and interrupt-controller to boot to shell with console on these SoCs. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112210722.6234-2-quic_molvera@quicinc.com
2023-01-31Merge branch '20230112204446.30236-2-quic_molvera@quicinc.com' into ↵Bjorn Andersson
arm64-for-6.3 Merge DT binding in order to get GCC clock defines.
2023-01-31Merge branch 'icc-qdu1000-immutable' of ↵Bjorn Andersson
https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD Merge DT binding to gain interconnect defines.
2023-01-26arm64: dts: qcom: sm8350: Hook up DSI1 to MDPKonrad Dybcio
Somehow DSI1 was not hooked up to MDP resulting in it not working. Fix it. Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120210101.2146852-8-konrad.dybcio@linaro.org
2023-01-26arm64: dts: qcom: sm8350: Add mdss_ prefix to DSIn out labelsKonrad Dybcio
Add the mdss_ prefix to DSIn labels, so that the hardware blocks can be organized near each other while retaining the alphabetical order in device DTs when referencing by label. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120210101.2146852-7-konrad.dybcio@linaro.org
2023-01-26arm64: dts: qcom: sm8350: Fix DSI PLL sizeKonrad Dybcio
As downstream indicates, DSI PLL is actually 0x27c and not 0x260- wide. Fix that to reserve the correct registers. Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120210101.2146852-6-konrad.dybcio@linaro.org
2023-01-26arm64: dts: qcom: sm8350: Fix DSI PHY compatiblesKonrad Dybcio
The compatibles were wrong, resulting in the driver not probing. Fix that. Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120210101.2146852-5-konrad.dybcio@linaro.org
2023-01-26arm64: dts: qcom: sm8350: Feed DSI1 PHY clocks to DISPCCKonrad Dybcio
This was omitted but is necessary for DSI1 to function. Fix it. Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120210101.2146852-4-konrad.dybcio@linaro.org
2023-01-26arm64: dts: qcom: sm8350: Fix DSI1 interruptKonrad Dybcio
The interrupt was wrong, likely copypasted from DSI0. Fix it. Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120210101.2146852-3-konrad.dybcio@linaro.org
2023-01-26arm64: dts: qcom: sm8350: Add missing #address/size-cells to DSInKonrad Dybcio
Panels/DRM bridges definitely don't need 64bits of address space and are usually not 32-bit wide. Set address-cells to 1 and size-cells to 0. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230120210101.2146852-2-konrad.dybcio@linaro.org
2023-01-18arm64: dts: qcom: sc7280: Add a carveout for modem metadataSibi Sankar
Add a new carveout for modem metadata on SC7280 SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230117085840.32356-12-quic_sibis@quicinc.com
2023-01-18arm64: dts: qcom: sc7180: Add a carveout for modem metadataSibi Sankar
Add a new carveout for modem metadata on SC7180 SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230117085840.32356-11-quic_sibis@quicinc.com
2023-01-18arm64: dts: qcom: sdm845: Add a carveout for modem metadataSibi Sankar
Add a new carveout for modem metadata on SDM845 SoCs. Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230117085840.32356-10-quic_sibis@quicinc.com
2023-01-18arm64: dts: qcom: msm8998: Add a carveout for modem metadataSibi Sankar
Add a new carveout for modem metadata on MSM8998 SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230117085840.32356-9-quic_sibis@quicinc.com
2023-01-18arm64: dts: qcom: msm8996: Add a carveout for modem metadataSibi Sankar
Add a new carveout for modem metadata on MSM8996 SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230117085840.32356-8-quic_sibis@quicinc.com
2023-01-18arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock namesRobert Marko
Current PCIe QMP PHY output name were changed in ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes") however it did not account for the fact that GCC driver is relying on the old names to match them as they are being used as the parent for the gcc_pcie0_pipe_clk and gcc_pcie1_pipe_clk. This broke parenting as GCC could not find the parent clock, so fix it by changing to the names that driver is expecting. Fixes: 942bcd33ed45 ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes") Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113164449.906002-9-robimarko@gmail.com
2023-01-18arm64: dts: qcom: ipq8074: fix Gen3 PCIe nodeRobert Marko
IPQ8074 comes in 2 silicon versions: * v1 with 2x Gen2 PCIe ports and QMP PHY-s * v2 with 1x Gen3 and 1x Gen2 PCIe ports and QMP PHY-s v2 is the final and production version that is actually supported by the kernel, however it looks like PCIe related nodes were added for the v1 SoC. Finish the PCIe fixup by using the correct compatible, adding missing ATU register space, declaring max-link-speed, use correct ranges, add missing clocks and resets. Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes") Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113164449.906002-8-robimarko@gmail.com
2023-01-18arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speedRobert Marko
Add the generic 'max-link-speed' property to describe the Gen2 PCIe link generation limit. This allows the generic DWC code to configure the link speed correctly. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113164449.906002-4-robimarko@gmail.com
2023-01-18arm64: dts: qcom: ipq8074: correct Gen2 PCIe rangesRobert Marko
Current ranges property set in Gen2 PCIe node is incorrect, replace it with the downstream 5.4 QCA kernel value. Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes") Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113164449.906002-3-robimarko@gmail.com
2023-01-18arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHYRobert Marko
IPQ8074 comes in 2 silicon versions: * v1 with 2x Gen2 PCIe ports and QMP PHY-s * v2 with 1x Gen3 and 1x Gen2 PCIe ports and QMP PHY-s v2 is the final and production version that is actually supported by the kernel, however it looks like PCIe related nodes were added for the v1 SoC. Now that we have Gen3 QMP PHY support, we can start fixing the PCIe support by fixing the Gen3 QMP PHY node first. Change the compatible to the Gen3 QMP PHY, correct the register space start and size, add the missing misc PCS register space. Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes") Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113164449.906002-2-robimarko@gmail.com
2023-01-18arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHYRobert Marko
Serdes register space sizes are incorrect, update them to match the actual sizes from downstream QCA 5.4 kernel. Fixes: 942bcd33ed45 ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes") Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113164449.906002-1-robimarko@gmail.com
2023-01-18arm64: dts: qcom: sdm845-db845c: drop label from I2C controllersKrzysztof Kozlowski
Geni I2C Controller node does not allow a "label" property and Linux driver does not parse it: sdm845-db845c.dtb: i2c@a8c000: Unevaluated properties are not allowed ('label' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113145231.79280-1-krzysztof.kozlowski@linaro.org
2023-01-18arm64: dts: qcom: msm8996: support using GPLL0 as kryocc inputDmitry Baryshkov
In some cases the driver might need using GPLL0 to drive CPU clocks. Bring it in through the sys_apcs_aux clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113120544.59320-15-dmitry.baryshkov@linaro.org
2023-01-18dt-bindings: clock: Add QDU1000 and QRU1000 GCC clocksMelody Olvera
Add device tree bindings for global clock controller on QDU1000 and QRU1000 SoCs. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112204446.30236-2-quic_molvera@quicinc.com
2023-01-18arm64: dts: qcom: sm8450: Allow both GIC-ITS and internal MSI controllerManivannan Sadhasivam
The devicetree should specify both MSI implementations and the OS/driver should choose the one based on the platform requirements. Currently, Linux DWC driver will choose GIC-ITS over the internal MSI controller. Fixes: a11bbf6adef4 ("arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1") Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111123004.21048-2-manivannan.sadhasivam@linaro.org
2023-01-18arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodesAbel Vesa
Enable USB HC and PHYs nodes on SM8550 MTP board. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230119004533.1869870-3-abel.vesa@linaro.org
2023-01-18arm64: dts: qcom: sm8550: Add USB PHYs and controller nodesAbel Vesa
Add USB host controller and PHY nodes. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230119004533.1869870-2-abel.vesa@linaro.org
2023-01-18arm64: dts: qcom: sm8250: drop unused properties from tx-macroKrzysztof Kozlowski
Neither qcom,sm8250-lpass-tx-macro bindings nor the driver use "clock-frequency" and address/size cells properties. sm8250-mtp.dtb: txmacro@3220000: Unevaluated properties are not allowed ('clock-frequency', '#address-cells', '#size-cells' were unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109112221.102473-4-krzysztof.kozlowski@linaro.org
2023-01-18arm64: dts: qcom: sm8250: drop unused clock-frequency from wsa-macroKrzysztof Kozlowski
Neither qcom,sm8250-lpass-wsa-macro bindings nor the driver use "clock-frequency" property. sm8250-hdk.dtb: codec@3240000: Unevaluated properties are not allowed ('clock-frequency' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109112221.102473-3-krzysztof.kozlowski@linaro.org
2023-01-18arm64: dts: qcom: align OPP table node name with DT schemaKrzysztof Kozlowski
Bindings expect OPP tables to start with "opp-table". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109112221.102473-2-krzysztof.kozlowski@linaro.org
2023-01-18arm64: dts: qcom: rename mdp nodes to display-controllerDmitry Baryshkov
Follow the schema change and rename mdp nodes to generic name 'display-controller'. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109051402.317577-6-dmitry.baryshkov@linaro.org
2023-01-18arm64: dts: qcom: rename mdss nodes to display-subsystemDmitry Baryshkov
Follow the schema change and rename mdss nodes to generic name 'display-subsystem'. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109051402.317577-4-dmitry.baryshkov@linaro.org
2023-01-18arm64: dts: qcom: add SoC specific compat strings to mdp5 nodesDmitry Baryshkov
Add SoC-specific compat string to the MDP5 device nodes to ease distinguishing between various platforms. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109050152.316606-5-dmitry.baryshkov@linaro.org
2023-01-18arm64: dts: qcom: ipq8074: correct USB3 QMP PHY-s clock output namesRobert Marko
It seems that clock-output-names for the USB3 QMP PHY-s where set without actually checking what is the GCC clock driver expecting, so clock core could never actually find the parents for usb0_pipe_clk_src and usb1_pipe_clk_src clocks in the GCC driver. So, correct the names to be what the driver expects so that parenting works. Before: gcc_usb0_pipe_clk_src 0 0 0 125000000 0 0 50000 Y gcc_usb1_pipe_clk_src 0 0 0 125000000 0 0 50000 Y After: usb3phy_0_cc_pipe_clk 1 1 0 125000000 0 0 50000 Y usb0_pipe_clk_src 1 1 0 125000000 0 0 50000 Y gcc_usb0_pipe_clk 1 1 0 125000000 0 0 50000 Y usb3phy_1_cc_pipe_clk 1 1 0 125000000 0 0 50000 Y usb1_pipe_clk_src 1 1 0 125000000 0 0 50000 Y gcc_usb1_pipe_clk 1 1 0 125000000 0 0 50000 Y Fixes: 5e09bc51d07b ("arm64: dts: ipq8074: enable USB support") Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230108130440.670181-2-robimarko@gmail.com
2023-01-18arm64: dts: qcom: Add device tree for Samsung Galaxy Tab A 8.0 (2015)Siddharth Manthan
Galaxy Tab A 8.0 is a tablet, very similar to Tab A 9.7 with major differences being the display and touchscreen. Add it's devicetree reusing a common dtsi from gt510. Signed-off-by: Siddharth Manthan <siddharth.manthan@gmail.com> [Squashed multiple commits] Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Nikita Travkin <nikita@trvn.ru> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107141911.47229-4-nikita@trvn.ru
2023-01-18arm64: dts: qcom: Add device tree for Samsung Galaxy Tab A 9.7 (2015)Jasper Korten
The Galaxy Tab A 9.7 (2015) is a Snapdragon 410 based tablet. This commit introduces basic support for the tablet including the following features: - SDHCI (internal and external storage) - USB Device Mode - UART - Regulators - WCNSS (WiFi/BT) - GPIO keys - Fuel gauge - Touchscreen - Accelerometer Part of the DT is split out into a common dtsi since the tablet shares majority of the design with another variant having a different screen size. Signed-off-by: Jasper Korten <jja2000@gmail.com> Co-developed-by: Siddharth Manthan <siddharth_manthan@outlook.com> Signed-off-by: Siddharth Manthan <siddharth_manthan@outlook.com> Co-developed-by: Nikita Travkin <nikita@trvn.ru> Signed-off-by: Nikita Travkin <nikita@trvn.ru> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107141911.47229-3-nikita@trvn.ru
2023-01-18arm64: dts: qcom: sc8280xp: add rng device tree nodeBrian Masney
Add the necessary device tree node for qcom,prng-ee so we can use the hardware random number generator. This functionality was tested on a SA8540p automotive development board using kcapi-rng from libkcapi. Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103182229.37169-11-bmasney@redhat.com
2023-01-18arm64: dts: qcom: sc8280xp: add aliases for i2c4 and i2c21Brian Masney
Add aliases for i2c4 and i2c21 to the crd and x13s DTS files so that what's exposed to userspace doesn't change in the future if additional i2c buses are enabled on these platforms. Signed-off-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103182229.37169-10-bmasney@redhat.com
2023-01-18arm64: dts: qcom: sa8540p-ride: add i2c nodesBrian Masney
Add the necessary nodes in order to get i2c0, i2c1, i2c12, i2c15, and i2c18 functioning on the automotive board and exposed to userspace. This work was derived from various patches that Qualcomm delivered to Red Hat in a downstream kernel. This change was validated by using i2c-tools 4.3.3 on CentOS Stream 9: [root@localhost ~]# i2cdetect -l i2c-0 i2c Geni-I2C I2C adapter i2c-1 i2c Geni-I2C I2C adapter i2c-12 i2c Geni-I2C I2C adapter i2c-15 i2c Geni-I2C I2C adapter i2c-18 i2c Geni-I2C I2C adapter [root@localhost ~]# i2cdetect -a -y 15 Warning: Can't use SMBus Quick Write command, will skip some addresses 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 10: 20: 30: -- -- -- -- -- -- -- -- 40: 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: 70: Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Shazad Hussain <quic_shazhuss@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103182229.37169-9-bmasney@redhat.com
2023-01-18arm64: dts: qcom: sc8280xp: add missing spi nodesBrian Masney
Add the missing nodes for the spi buses that's present on this SoC. This work was derived from various patches that Qualcomm delivered to Red Hat in a downstream kernel. Signed-off-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103182229.37169-8-bmasney@redhat.com
2023-01-18arm64: dts: qcom: sc8280xp: add missing i2c nodesBrian Masney
Add the missing nodes for the i2c buses that's present on this SoC. This work was derived from various patches that Qualcomm delivered to Red Hat in a downstream kernel. Signed-off-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103182229.37169-7-bmasney@redhat.com
2023-01-18arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4Brian Masney
In preparation for adding the missing SPI and I2C nodes to sc8280xp.dtsi, it was decided to rename all of the existing qupX_ uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead and rename qup0_i2c4 to i2c4. Note that some nodes are moved in the file by this patch to preserve the expected sort order in the file. Additionally, the properties within the pinctrl state node are sorted to match the expected order that's typically done in other DTs. Signed-off-by: Brian Masney <bmasney@redhat.com> Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103182229.37169-6-bmasney@redhat.com
2023-01-18arm64: dts: qcom: sc8280xp: rename qup2_i2c5 to i2c21Brian Masney
In preparation for adding the missing SPI and I2C nodes to sc8280xp.dtsi, it was decided to rename all of the existing qupX_ uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead and rename qup2_i2c5 to i2c21. Under the old name, this was the 5th index under qup2, which starts at index 16. Note that some nodes are moved in the file by this patch to preserve the expected sort order in the file. Additionally, the properties within the pinctrl state node are sorted to match the expected order that's typically done in other DTs. Signed-off-by: Brian Masney <bmasney@redhat.com> Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103182229.37169-5-bmasney@redhat.com
2023-01-18arm64: dts: qcom: sc8280xp: rename qup2_uart17 to uart17Brian Masney
In preparation for adding the missing SPI and I2C nodes to sc8280xp.dtsi, it was decided to rename all of the existing qupX_ uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead and rename qup2_uart17 to uart17. Note that some nodes are moved in the file by this patch to preserve the expected sort order in the file. Signed-off-by: Brian Masney <bmasney@redhat.com> Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103182229.37169-4-bmasney@redhat.com
2023-01-18arm64: dts: qcom: sm6115: Pad addresses to 8 hex digitsKonrad Dybcio
Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230102094642.74254-18-konrad.dybcio@linaro.org
2023-01-18arm64: dts: qcom: msm8994-kitakami: Pad addresses to 8 hex digitsKonrad Dybcio
Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230102094642.74254-17-konrad.dybcio@linaro.org
2023-01-18arm64: dts: qcom: sm8450: Pad addresses to 8 hex digitsKonrad Dybcio
Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230102094642.74254-16-konrad.dybcio@linaro.org
2023-01-18arm64: dts: qcom: msm8994-octagon: Pad addresses to 8 hex digitsKonrad Dybcio
Some addresses were 7-hex-digits long, or less. Fix that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230102094642.74254-15-konrad.dybcio@linaro.org
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