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2024-05-27arm64: dts: qcom: msm8976: Add IOMMU nodesAdam Skladowski
Add the nodes describing the apps and gpu iommu and its context banks that are found on msm8976 SoCs. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Link: https://lore.kernel.org/r/20240508163455.8757-2-a39.skl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sc7280: Add APR nodes for soundLuca Weiss
Add the different services found on APR on some devices with SC7280 SoC. Additionally add an empty sound node in the root node as is seen on other SoC dtsi files so device dt's can easily use that. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20240510-sc7280-apr-v1-1-e9eabda05f85@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sc8280xp: Set status = "reserved" on PSHOLDKonrad Dybcio
On most devices, TZ seems to be blocking access to the PSHOLD reboot register. This seems to be TZ, as even kicking the hypervisor doesn't seem to make it writable. Fixes: 865ff2e6f5da ("arm64: dts: qcom: sc8280xp: Add PS_HOLD restart") Reported-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Link: https://lore.kernel.org/r/20240510-topic-8280_off-v1-1-bcc70cda449e@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sm8150-hdk: rename Type-C HS endpointsDmitry Baryshkov
Follow other Qualcomm platforms and rename pm8150b_role_switch_in to pm8150_hs_in. Corresponding port is described as HS port rather than role switching. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-9-ad153c747a97@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: x1e80100: describe USB signals properlyDmitry Baryshkov
Follow example of other platforms. Rename HS graph nodes to contain 'dwc3_hs' and link SS lanes from DWC3 controllers to QMP PHYs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-8-ad153c747a97@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sc8280xp: describe USB signals properlyDmitry Baryshkov
Follow example of other platforms. Rename HS graph nodes to contain 'dwc3_hs' and link SS lanes from DWC3 controllers to QMP PHYs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-7-ad153c747a97@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sc8180x: describe USB signals properlyDmitry Baryshkov
Follow example of other platforms. Rename HS graph nodes to contain 'dwc3_hs' and link SS lanes from DWC3 controllers to QMP PHYs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-6-ad153c747a97@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sc8180x: switch USB+DP QMP PHYs to new bindingsDmitry Baryshkov
To follow other Qualcomm platforms, update QMP USB+DP PHYs to use newer bindings rather than old bindings which had PHYs as subdevices. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-5-ad153c747a97@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sm8250: add a link between DWC3 and QMP PHYDmitry Baryshkov
The SuperSpeed signals originate from the DWC3 host controller and then are routed through the Combo QMP PHY, where they are multiplexed with the DisplayPort signals. Add corresponding OF graph link. Reported-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-4-ad153c747a97@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sm8250: describe HS signals properlyDmitry Baryshkov
The OF graph should describe physical signals. There is no 'role switch' signal between Type-C connector and the DWC3 USB controller. Rename endpoints to mention USB HS signal instead (this follows the example lead by other plaforms, including QRB2210 RB1, QRB4210 RB2 and all PMIC GLINK platforms). Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-3-ad153c747a97@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sc8180x: correct dispcc clocksDmitry Baryshkov
Correct the clocks being used by the display clock controller on the SC8180X platform (to match the schema): - Drop the sleep clock - Add DSI clocks - Reorder eDP / DP clocks This changes the order of clocks, however it should be noted that the clock list was neither correct nor followed the schema beforehand. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-2-ad153c747a97@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: msm8998: enable adreno_smmu by defaultMarc Gonzalez
15 qcom platform DTSI files define an adreno_smmu node. msm8998 is the only one with adreno_smmu disabled by default. There's no reason why this SMMU should be disabled by default, it doesn't need any further configuration. Bring msm8998 in line with the 14 other platforms. This fixes GPU init failing with ENODEV: msm_dpu c901000.display-controller: failed to load adreno gpu msm_dpu c901000.display-controller: failed to bind 5000000.gpu (ops a3xx_ops): -19 Fixes: 87cd46d68aeac8 ("Configure Adreno GPU and related IOMMU") Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/be51d1a4-e8fc-48d1-9afb-a42b1d6ca478@freebox.fr Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sdx75: Support for I2C and SPIRohit Agarwal
Add devicetree node for I2C and SPI busses in SDX75. Signed-off-by: Rohit Agarwal <rohiagar@qti.qualcomm.com> Link: https://lore.kernel.org/r/20240517100423.2006022-3-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: Add coresight nodes for SA8775pJie Gan
Add following coresight components on SA8775p, TMC/ETF, TPDM, dynamic Funnel, TPDA and ETM. Signed-off-by: Jie Gan <quic_jiegan@quicinc.com> Link: https://lore.kernel.org/r/20240521011946.3148712-2-quic_jiegan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sdm450: add Lenovo Smart Tab M10 DTSNeil Armstrong
This add initial support for the Lenovo Smart Tab M10 (WiFi) (model tbx605f) which is a 10.1" tablet by Lenovo based on the SDM450 SoC. It has a 10.1" LCP touch panel, SDCard slot, Volume+Power buttons, USB-C port amd front-facing camera (not supported). The proper LCP Panel support will be added later, for now using the simeple-framebuffer with the bootloader-initialized video memory. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240523-topic-sdm450-upstream-tbx605f-v1-3-e52b89133226@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sdx75-idp: add SDHCI for SD CardNaina Mehta
Enable SDHCI on sdx75-idp to support SD card. Also add the required regulators. Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com> Link: https://lore.kernel.org/r/20240523120337.9530-4-quic_nainmeht@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sdx75: Add SDHCI nodeNaina Mehta
Add sdhc node for SDX75 SoC to support SD card. Also add pins required for SDHCI. Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com> Link: https://lore.kernel.org/r/20240523120337.9530-3-quic_nainmeht@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sdm670: add smem regionRichard Acayan
The shared memory region is used for information about the SoC and communication with remote processors. Add the smem region for SDM670. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20240524012023.318965-8-mailingradian@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sdm850-lenovo-yoga-c630: add WiFi calibration variantDmitry Baryshkov
Add calibration variant that is used by the board data for the laptop: bus=snoc,qmi-board-id=ff,qmi-chip-id=30214,variant=Lenovo_C630 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240527-yoga-wifi-calib-v1-1-af9dc33880e8@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27arm64: dts: qcom: sdm850-lenovo-yoga-c630: fix IPA firmware pathDmitry Baryshkov
Specify firmware path for the IPA network controller on the Lenovo Yoga C630 laptop. Without this property IPA tries to load firmware from the default location, which likely will fail. Fixes: 2e01e0c21459 ("arm64: dts: qcom: sdm850-yoga: Enable IPA") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240527-yoga-ipa-fw-v1-1-99ac1f5db283@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm8650: Enable download mode register writeMukesh Ojha
Enable download mode setting for sm8650 which can help collect ramdump for this SoC. Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Reviewed-by: Elliot Berman <quic_eberman@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1715888133-2810-1-git-send-email-quic_mojha@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: qru1000-idp: enable USB nodesKomal Bajaj
Enable both USB controllers and associated hsphy and qmp phy nodes on QRU1000 IDP. Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Link: https://lore.kernel.org/r/20240502090326.21489-4-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: qdu1000-idp: enable USB nodesKomal Bajaj
Enable both USB controllers and associated hsphy and qmp phy nodes on QDU1000 IDP. Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Link: https://lore.kernel.org/r/20240502090326.21489-3-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: qdu1000: Add USB3 and PHY supportKomal Bajaj
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and SNPS HS PHY on QDU1000/QRU1000 SoCs. Also add required pins for USB, so that the interface can work reliably. Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Link: https://lore.kernel.org/r/20240502090326.21489-2-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: msm8996-xiaomi-common: drop excton from the USB PHYDmitry Baryshkov
The USB PHYs don't use extcon connectors, drop the extcon property from the hsusb_phy1 node. Fixes: 46680fe9ba61 ("arm64: dts: qcom: msm8996: Add support for the Xiaomi MSM8996 platform") Cc: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-13-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sda660-ifc6560: document missing USB PHY suppliesDmitry Baryshkov
On the IFC6560 one of the USB PHY supplies is the L10A power supply. However this regulator also supplies VDDA_APC1_CS, VDD_PLL2 and VDD_P11 consumers. Touching the supply causes the board to be reset. Document the supply as a fixed always-on regulator. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-12-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm8450: add power-domain to UFS PHYDmitry Baryshkov
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add corresponding power-domain the the PHY node. Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-11-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm8350: add power-domain to UFS PHYDmitry Baryshkov
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add corresponding power-domain the the PHY node. Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-10-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm8250: add power-domain to UFS PHYDmitry Baryshkov
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add corresponding power-domain the the PHY node. Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-9-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm6350: add power-domain to UFS PHYDmitry Baryshkov
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add corresponding power-domain the the PHY node. Fixes: 5a814af5fc22 ("arm64: dts: qcom: sm6350: Add UFS nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-8-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm6115: add power-domain to UFS PHYDmitry Baryshkov
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add corresponding power-domain the the PHY node. Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-7-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sdm845: add power-domain to UFS PHYDmitry Baryshkov
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add corresponding power-domain the the PHY node. Fixes: cc16687fbd74 ("arm64: dts: qcom: sdm845: add UFS controller") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-6-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sc8180x: add power-domain to UFS PHYDmitry Baryshkov
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add corresponding power-domain the the PHY node. Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-5-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sc7180: drop extra UFS PHY compatDmitry Baryshkov
The DT schema doesn't have a fallback compatible for qcom,sc7180-qmp-ufs-phy. Drop it from the dtsi too. Fixes: 858536d9dc94 ("arm64: dts: qcom: sc7180: Add UFS nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-4-f1fd15c33fb3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sa8775p: Add ep pcie1 controller nodeMrinmay Sarkar
Add ep pcie dtsi node for pcie1 controller found on sa8775p platform. It supports gen4 and x4 link width. Limiting the speed to Gen3 due to stability issue with Gen4. Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> Link: https://lore.kernel.org/r/1714494089-7917-3-git-send-email-quic_msarkar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sa8775p: Add ep pcie0 controller nodeMrinmay Sarkar
Add ep pcie dtsi node for pcie0 controller found on sa8775p platform. It supports gen4 and x2 link width. Limiting the speed to Gen3 due to stability issues. Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1714492540-15419-4-git-send-email-quic_msarkar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qocm: sdx75: align smem node name with coding styleKrzysztof Kozlowski
Node names should not have vendor prefixes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240426123101.500676-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sdx75: Add modem SMP2P nodeKaushal Kumar
Add SMP2P node for the SDX75 platform to communicate with the modem. Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Link: https://lore.kernel.org/r/20240426112837.17478-1-quic_kaushalk@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sdx75: Add AOSS nodeRohit Agarwal
Add AOSS channel devicetree node for Qcom's SDX75 SoC. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/20240426055326.3141727-7-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sdx75: Add TCSR register spaceRohit Agarwal
Add TCSR register space devicetree node for accessing different status registers. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/20240426055326.3141727-6-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sdx75: Add IPCC nodeRohit Agarwal
Add IPCC devicetree node to Qcom's SDX75 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/20240426055326.3141727-5-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm8650-hdk: enable GPUNeil Armstrong
Add path of the GPU firmware for the SM8650-HDK board Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240425-topic-sm8650-upstream-hdk-gpu-v1-1-465a11af7441@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add connector for MUICRaymond Hackley
Add subnode usb_con: extcon for SM5502 / SM5504 MUIC, which will be used for RT5033 charger. Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240424144922.28189-1-raymondhackley@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: msm8916/39-samsung-a2015: Add PMIC and chargerRaymond Hackley
The phones listed below have Richtek RT5033 PMIC and charger. Add them to the device trees. - Samsung Galaxy A3/A5/A7 2015 - Samsung Galaxy E5/E7 - Samsung Galaxy Grand Max Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com> Link: https://lore.kernel.org/r/20240424143158.24358-1-raymondhackley@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm4450: Add cpufreq supportTengfei Fan
Add a description of a SM4450 cpufreq-epss controller,add references to it from CPU nodes and make EPSS a supplyer of clocks for the CPUs. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240424101503.635364-3-quic_tengfan@quicinc.com Link: https://lore.kernel.org/r/20240424101503.635364-4-quic_tengfan@quicinc.com [bjorn: Squashed the two changes, and updated commit message] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sc7280: Remove CTS/RTS configurationViken Dadhaniya
For IDP variant, GPIO 20/21 is used by camera use case and camera driver is not able acquire these GPIOs as it is acquired by UART5 driver as RTS/CTS pin. UART5 is designed for debug UART for all the board variants of the sc7280 chipset and RTS/CTS configuration is not required for debug uart usecase. Remove CTS/RTS configuration for UART5 instance and change compatible string to debug UART. Remove overwriting compatible property from individual target specific file as it is not required. Fixes: 38cd93f413fd ("arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node") Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com> Link: https://lore.kernel.org/r/20240424075853.11445-1-quic_vdadhani@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: qcm6490-rb3: Enable gpi-dma and qup nodeViken Dadhaniya
Enable gpi-dma0, gpi-dma1 and qupv3_id_1 nodes for buses usecase on RB3gen2. Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240424054602.5731-1-quic_vdadhani@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm8650: add support for the SM8650-HDK boardNeil Armstrong
The SM8650-HDK is an embedded development platforms for the Snapdragon 8 Gen 3 SoC aka SM8650, with the following features: - Qualcomm SM8650 SoC - 16GiB On-board LPDDR5 - On-board WiFi 7 + Bluetooth 5.3/BLE - On-board UFS4.0 - M.2 Key B+M Gen3x2 PCIe Slot - HDMI Output - USB-C Connector with DP Almode & Audio Accessory mode - Micro-SDCard Slot - Audio Jack with Playback and Microphone - 2 On-board Analog microphones - 2 On-board Speakers - 96Boards Compatible Low-Speed and High-Speed connectors [1] - For Camera, Sensors and external Display cards - Compatible with the Linaro Debug board [2] - SIM Slot for Modem - Debug connectors - 6x On-Board LEDs Product Page: [3] [1] https://www.96boards.org/specifications/ [2] https://git.codelinaro.org/linaro/qcomlt/debugboard [3] https://www.lantronix.com/products/snapdragon-8-gen-3-mobile-hardware-development-kit/ Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Tested-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240422-topic-sm8650-upstream-hdk-v4-2-b33993eaa2e8@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26dt-bindings: arm: qcom: Document the HDK8650 boardNeil Armstrong
Document the Qualcomm SM8650 based HDK (Hardware Development Kit) embedded development platform designed by Qualcomm and sold by Lantronix [1]. [1] https://www.lantronix.com/products/snapdragon-8-gen-3-mobile-hardware-development-kit/ Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240422-topic-sm8650-upstream-hdk-v4-1-b33993eaa2e8@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26arm64: dts: qcom: sm8650: Use "pcie" as the node name instead of "pci"Manivannan Sadhasivam
Qcom SoCs doesn't support legacy PCI, but only PCIe. So use the correct node name for the controller instances. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-21-1eb790c53e43@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit (git 2.34.1) at 2025-07-16 03:32:38 +0000