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2019-11-14octeontx2-af: Add NPC MCAM entry allocation status to debugfsSunil Goutham
Added support to display current NPC MCAM entries and counter's allocation status ín debugfs. cat /sys/kernel/debug/octeontx2/npc/mcam_info' will dump following info - MCAM Rx and Tx keysize - Total MCAM entries and counters - Current available count - Count of number of MCAM entries and counters allocated by a RVU PF/VF device. Also, one NPC MCAM counter (last one) is reserved and mapped to NPC RX_INTF's MISS_ACTION to count dropped packets due to no MCAM entry match. This pkt drop counter can be checked via debugfs. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14octeontx2-af: Add per CGX port level NIX Rx/Tx countersLinu Cherian
A CGX port is shared by a RVU PF and it's VFs. These per CGX port level NIX Rx/Tx counters are cumilative stats of all NIXLFs sharing this port. These stats when compared to CGX Rx/Tx stats helps in identifying pkts dropped within the system, if any. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14octeontx2-af: Add CGX LMAC stats to debugfsPrakash Brahmajyosyula
This patch adds CGX LMAC physical interface or serdes Rx/Tx packet stats to debugfs. 'cat cgx<idx>/lmac<idx>/stats' dumps the current interface link status and Rx/Tx stats. Stats include pkt received/transmitted, dropped, pause frames etc etc. Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14octeontx2-af: Add NDC block stats to debugfs.Prakash Brahmajyosyula
NDC is a data cache unit which caches NPA and NIX block's aura/pool/RQ/SQ/CQ/etc contexts to reduce number of costly DRAM accesses. This patch adds support to dump cache's performance stats like cache line hit/miss counters, average cycles taken for accessing cached and non-cached data. This will help in checking if NPA/NIX context reads/writes are having NDC cache misses which inturn might effect performance. Also changed NDC enums to reflect correct NDC hardware instance. Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14octeontx2-af: Add NIX RQ, SQ and CQ contexts to debugfsPrakash Brahmajyosyula
To aid in debugging NIX block related issues, added support to dump NIX block LF's RQ, SQ and CQ hardware contexts in debugfs. User can check which contexts are enabled currently and dump it's current HW context. Four new files 'qsize', 'rq_ctx', 'sq_ctx' and 'cq_ctx' are added to the debugfs at 'sys/kernel/debug/octeontx2/nix/' 'echo <nixlf index> > qsize' will display current enabled CQ/SQ/RQs. 'echo <nixlf> [rq number/all] > rq_ctx', 'echo <nixlf> [sq number/all] > sq_ctx' & 'echo <nixlf> [cq number/all] > cq_ctx' will dump RQ/SQ/CQ's current hardware context. Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14octeontx2-af: Add NPA aura and pool contexts to debugfsChristina Jacob
To aid in debugging NPA related issues, added support to dump NPA (pool allocator) block LF's aura and pool hardware contexts in debugfs. User can check which contexts are enabled currently and dump it's current HW context. Three new files 'qsize', 'aura_ctx', 'pool_ctx' are added to the debugfs at 'sys/kernel/debug/octeontx2/npa/' 'echo <npalf index> > qsize' will display current enabled Aura/Pools. 'echo <npalf> [aura number/all] > aura_ctx' & 'echo <npalf> [aura number/all] > pool_ctx' will dump Aura/Pool context info. Signed-off-by: Christina Jacob <cjacob@marvell.com> Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14octeontx2-af: Dump current resource provisioning statusChristina Jacob
Added support to dump current resource provisioning status of all resource virtualization unit (RVU) block's (i.e NPA, NIX, SSO, SSOW, CPT, TIM) local functions attached to a PF_FUNC into a debugfs file. 'cat /sys/kernel/debug/octeontx2/rsrc_alloc' will show the current block LF's allocation status. Signed-off-by: Christina Jacob <cjacob@marvell.com> Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: mvneta: fix build skb for bm capable devicesLorenzo Bianconi
Fix build_skb for bm capable devices when they fall-back using swbm path (e.g. when bm properties are configured in device tree but CONFIG_MVNETA_BM_ENABLE is not set). In this case rx_offset_correction is overwritten so we need to use it building skb instead of MVNETA_SKB_HEADROOM directly Fixes: 8dc9a0888f4c ("net: mvneta: rely on build_skb in mvneta_rx_swbm poll routine") Fixes: 0db51da7a8e9 ("net: mvneta: add basic XDP support") Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Reported-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14Merge tag 'mlx5-updates-2019-11-12' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5-updates-2019-11-12 1) Merge mlx5-next for devlink reload and flowtable offloads dependencies 2) Devlink reload support 3) TC Flowtable offloads 4) Misc cleanup ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14r8169: use r8168d_modify_extpage in rtl8168f_config_eee_phyHeiner Kallweit
Use r8168d_modify_extpage() also in rtl8168f_config_eee_phy() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14ibmveth: Detect unsupported packets before sending to the hypervisorCris Forno
Currently, when ibmveth receive a loopback packet, it reports an ambiguous error message "tx: h_send_logical_lan failed with rc=-4" because the hypervisor rejects those types of packets. This fix detects loopback packet and assures the source packet's MAC address matches the driver's MAC address before transmitting to the hypervisor. Signed-off-by: Cris Forno <cforno12@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: phy: dp83869: Add TI dp83869 phyDan Murphy
Add support for the TI DP83869 Gigabit ethernet phy device. The DP83869 is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T, 100BASE-TX and 1000BASE-T Ethernet protocols. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14dt-bindings: net: dp83869: Add TI dp83869 phyDan Murphy
Add dt bindings for the TI dp83869 Gigabit ethernet phy device. Signed-off-by: Dan Murphy <dmurphy@ti.com> CC: Rob Herring <robh+dt@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: openvswitch: add hash info to upcallTonghao Zhang
When using the kernel datapath, the upcall don't include skb hash info relatived. That will introduce some problem, because the hash of skb is important in kernel stack. For example, VXLAN module uses it to select UDP src port. The tx queue selection may also use the hash in stack. Hash is computed in different ways. Hash is random for a TCP socket, and hash may be computed in hardware, or software stack. Recalculation hash is not easy. Hash of TCP socket is computed: tcp_v4_connect -> sk_set_txhash (is random) __tcp_transmit_skb -> skb_set_hash_from_sk There will be one upcall, without information of skb hash, to ovs-vswitchd, for the first packet of a TCP session. The rest packets will be processed in Open vSwitch modules, hash kept. If this tcp session is forward to VXLAN module, then the UDP src port of first tcp packet is different from rest packets. TCP packets may come from the host or dockers, to Open vSwitch. To fix it, we store the hash info to upcall, and restore hash when packets sent back. +---------------+ +-------------------------+ | Docker/VMs | | ovs-vswitchd | +----+----------+ +-+--------------------+--+ | ^ | | | | | | upcall v restore packet hash (not recalculate) | +-+--------------------+--+ | tap netdev | | vxlan module +---------------> +--> Open vSwitch ko +--> or internal type | | +-------------------------+ Reported-at: https://mail.openvswitch.org/pipermail/ovs-dev/2019-October/364062.html Signed-off-by: Tonghao Zhang <xiangxia.m.yue@gmail.com> Acked-by: Pravin B Shelar <pshelar@ovn.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14Merge branch 'Rework-mt762x-GDM-setup-flow'David S. Miller
MarkLee says: ==================== Rework mt762x GDM setup flow The mt762x GDM block is mainly used to setup the HW internal rx path from GMAC to RX DMA engine(PDMA) and the packet switching engine(PSE) is responsed to do the data forward following the GDM configuration. This patch set have three goals : 1. Integrate GDM/PSE setup operations into single function "mtk_gdm_config" 2. Refine the timing of GDM/PSE setup, move it from mtk_hw_init to mtk_open 3. Enable GDM GDMA_DROP_ALL mode to drop all packet during the stop operation ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: ethernet: mediatek: Enable GDM GDMA_DROP_ALL modeMarkLee
Enable GDM GDMA_DROP_ALL mode to drop all packet during the stop operation. This is recommended by the mt762x HW design to drop all packet from GMAC before stopping PDMA. Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: ethernet: mediatek: Refine the timing of GDM/PSE setupMarkLee
Refine the timing of GDM/PSE setup, move it from mtk_hw_init to mtk_open. This is recommended by the mt762x HW design to do GDM/PSE setup only after PDMA has been started. We exclude mt7628 in mtk_gdm_config function since it is a old IP and there is no GDM/PSE block on it. Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: ethernet: mediatek: Integrate GDM/PSE setup operationsMarkLee
Integrate GDM/PSE setup operations into single function "mtk_gdm_config" Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: dsa: sja1105: Simplify reset handlingVladimir Oltean
We don't really need 10k species of reset. Remove everything except cold reset which is what is actually used. Too bad the hardware designers couldn't agree to use the same bit field for rev 1 and rev 2, so the (*reset_cmd) function pointer is there to stay. However let's simplify the prototype and give it a struct dsa_switch (we want to avoid forward-declarations of structures, in this case struct sja1105_private, wherever we can). Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14Merge branch 'PTP-clock-source-for-SJA1105-tc-taprio-offload'David S. Miller
Vladimir Oltean says: ==================== PTP clock source for SJA1105 tc-taprio offload This series makes the IEEE 802.1Qbv egress scheduler of the sja1105 switch use a time reference that is synchronized to the network. This enables quite a few real Time Sensitive Networking use cases, since in this mode the switch can offer its clients a TDMA sort of access to the network, and guaranteed latency for frames that are properly scheduled based on the common PTP time. The driver needs to do a 2-part activity: - Program the gate control list into the static config and upload it over SPI to the switch (already supported) - Write the activation time of the scheduler (base-time) into the PTPSCHTM register, and set the PTPSTRTSCH bit. - Monitor the activation of the scheduler at the planned time and its health. Ok, 3 parts. The time-aware scheduler cannot be programmed to activate at a time in the past, and there is some logic to avoid that. PTPCLKCORP is one of those "black magic" registers that just need to be written to the length of the cycle. There is a 40-line long comment in the second patch which explains why. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: dsa: sja1105: Implement state machine for TAS with PTP clock sourceVladimir Oltean
Tested using the following bash script and the tc from iproute2-next: #!/bin/bash set -e -u -o pipefail NSEC_PER_SEC="1000000000" gatemask() { local tc_list="$1" local mask=0 for tc in ${tc_list}; do mask=$((${mask} | (1 << ${tc}))) done printf "%02x" ${mask} } if ! systemctl is-active --quiet ptp4l; then echo "Please start the ptp4l service" exit fi now=$(phc_ctl /dev/ptp1 get | gawk '/clock time is/ { print $5; }') # Phase-align the base time to the start of the next second. sec=$(echo "${now}" | gawk -F. '{ print $1; }') base_time="$(((${sec} + 1) * ${NSEC_PER_SEC}))" tc qdisc add dev swp5 parent root handle 100 taprio \ num_tc 8 \ map 0 1 2 3 5 6 7 \ queues 1@0 1@1 1@2 1@3 1@4 1@5 1@6 1@7 \ base-time ${base_time} \ sched-entry S $(gatemask 7) 100000 \ sched-entry S $(gatemask "0 1 2 3 4 5 6") 400000 \ clockid CLOCK_TAI flags 2 The "state machine" is a workqueue invoked after each manipulation command on the PTP clock (reset, adjust time, set time, adjust frequency) which checks over the state of the time-aware scheduler. So it is not monitored periodically, only in reaction to a PTP command typically triggered from a userspace daemon (linuxptp). Otherwise there is no reason for things to go wrong. Now that the timecounter/cyclecounter has been replaced with hardware operations on the PTP clock, the TAS Kconfig now depends upon PTP and the standalone clocksource operating mode has been removed. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: dsa: sja1105: Make the PTP command read-writeVladimir Oltean
The PTPSTRTSCH and PTPSTOPSCH bits are actually readable and indicate whether the time-aware scheduler is running or not. We will be using that for monitoring the scheduler in the next patch, so refactor the PTP command API in order to allow that. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13cxgb4: Fix an error code in cxgb4_mqprio_alloc_hw_resources()Dan Carpenter
"ret" is zero or possibly uninitialized on this error path. It should be a negative error code instead. Fixes: 2d0cb84dd973 ("cxgb4: add ETHOFLD hardware queue support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13net: atlantic: Signedness bug in aq_vec_isr_legacy()Dan Carpenter
irqreturn_t type is an enum and in this context it's unsigned, so "err" can't be irqreturn_t or it breaks the error handling. In fact the "err" variable is only used to store integers (never irqreturn_t) so it should be declared as int. I removed the initialization because it's not required. Using a bogus initializer turns off GCC's uninitialized variable warnings. Secondly, there is a GCC warning about unused assignments and we would like to enable that feature eventually so we have been trying to remove these unnecessary initializers. Fixes: 7b0c342f1f67 ("net: atlantic: code style cleanup") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13bnxt_en: Fix array overrun in bnxt_fill_l2_rewrite_fields().Venkat Duvvuru
Fix the array overrun while keeping the eth_addr and eth_addr_mask pointers as u16 to avoid unaligned u16 access. These were overlooked when modifying the code to use u16 pointer for proper alignment. Fixes: 90f906243bf6 ("bnxt_en: Add support for L2 rewrite") Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13net/mlx5: TC: Offload flow table rulesPaul Blakey
Since both tc rules and flow table rules are of the same format, we can re-use tc parsing for that, and move the flow table rules to their steering domain - In this case, the next chain after max tc chain. Signed-off-by: Paul Blakey <paulb@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Add devlink reloadMichael Guralnik
Implement devlink reload for mlx5. Usage example: devlink dev reload pci/0000:06:00.0 Signed-off-by: Michael Guralnik <michaelgur@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5e: Set netdev name space on creationMichael Guralnik
Use devlink instance name space to set the netdev net namespace. Preparation patch for devlink reload implementation. Signed-off-by: Michael Guralnik <michaelgur@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5e: Fix error flow cleanup in mlx5e_tc_tun_create_header_ipv4/6Eli Cohen
Be sure to release the neighbour in case of failures after successful route lookup. Signed-off-by: Eli Cohen <eli@mellanox.com> Reviewed-by: Roi Dayan <roid@mellanox.com> Reviewed-by: Vlad Buslov <vladbu@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Remove redundant NULL initializationsEli Cohen
Neighbour initializations to NULL are not necessary as the pointers are not used if an error is returned, and if success returned, pointers are initialized. Signed-off-by: Eli Cohen <eli@mellanox.com> Reviewed-by: Vlad Buslov <vladbu@mellanox.com> Reviewed-by: Roi Dayan <roid@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Read num_vfs before disabling SR-IOVParav Pandit
mlx5_device_disable_sriov() currently reads num_vfs from the PCI core. However when mlx5_device_disable_sriov() is executed, SR-IOV is already disabled at the PCI level. Due to this disable_hca() cleanup is not done during SR-IOV disable flow. mlx5_sriov_disable() pci_enable_sriov() mlx5_device_disable_sriov() <- num_vfs is zero here. When SR-IOV enablement fails during mlx5_sriov_enable(), HCA's are left in enabled stage because mlx5_device_disable_sriov() relies on num_vfs from PCI core. mlx5_sriov_enable() mlx5_device_enable_sriov() pci_enable_sriov() <- Fails Hence, to overcome above issues, (a) Read num_vfs before disabling SR-IOV and use it. (b) Use num_vfs given when enabling sriov in error unwinding path. Fixes: d886aba677a0 ("net/mlx5: Reduce dependency on enabled_vfs counter and num_vfs") Signed-off-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Daniel Jurgens <danielj@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: DR, Fix matcher builders select checkAlex Vesker
When selecting a matcher ste_builder_arr will always be evaluated as true, instead check if num_of_builders is set for validity. Fixes: 667f264676c7 ("net/mlx5: DR, Support IPv4 and IPv6 mixed matcher") Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13Merge branch 'mlx5-next' of ↵Saeed Mahameed
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux 1) New generic devlink param "enable_roce", for downstream devlink reload support 2) Do vport ACL configuration on per vport basis when enabling/disabling a vport. This enables to have vports enabled/disabled outside of eswitch config for future 3) Split the code for legacy vs offloads mode and make it clear 4) Tide up vport locking and workqueue usage 5) Fix metadata enablement for ECPF 6) Make explicit use of VF property to publish IB_DEVICE_VIRTUAL_FUNCTION 7) E-Switch and flow steering core low level support and refactoring for netfilter flowtables offload Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Add new chain for netfilter flow table offloadPaul Blakey
Netfilter tables (nftables) implements a software datapath that comes after tc ingress datapath. The datapath supports offloading such rules via the flow table offload API. This API is currently only used by NFT and it doesn't provide the global priority in regards to tc offload, so we assume offloading such rules must come after tc. It does provide a flow table priority parameter, so we need to provide some supported priority range. For that, split fastpath prio to two, flow table offload and tc offload, with one dedicated priority chain for flow table offload. Next patch will re-use the multi chain API to access this chain by allowing access to this chain by the fdb_sub_namespace. Signed-off-by: Paul Blakey <paulb@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Refactor creating fast path prio chainsPaul Blakey
Next patch will re-use this to add a new chain but in a different prio. Signed-off-by: Paul Blakey <paulb@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Accumulate levels for chains prio namespacesPaul Blakey
Tc chains are implemented by creating a chained prio steering type, and inside it there is a namespace for each chain (FDB_TC_MAX_CHAINS). Each of those has a list of priorities. Currently, all namespaces in a prio start at the parent prio level. But since we can jump from chain (namespace) to another chain in the same prio, we need the levels for higher chains to be higher as well. So we created unused prios to account for levels in previous namespaces. Fix that by accumulating the namespaces levels if we are inside a chained type prio, and removing the unused prios. Fixes: 328edb499f99 ('net/mlx5: Split FDB fast path prio to multiple namespaces') Signed-off-by: Paul Blakey <paulb@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Define fdb tc levels per prioPaul Blakey
Define FDB_TC_LEVELS_PER_PRIO instead of magic number 2. This is the number of levels used by each tc prio table in the fdb. Signed-off-by: Paul Blakey <paulb@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Rename FDB_* tc related defines to FDB_TC_* definesPaul Blakey
Rename it to prepare for next patch that will add a different type of offload to the FDB. Signed-off-by: Paul Blakey <paulb@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13net/mlx5: Simplify fdb chain and prio eswitch definesPaul Blakey
FDB_MAX_CHAIN and FDB_MAX_PRIO were defined differently depending on if CONFIG_MLX5_ESWITCH is enabled to save space on allocations. This is a minor space saving, and there is no real need for it. Simplify things instead, and define them the same in both cases. Signed-off-by: Paul Blakey <paulb@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-11-13mscc.c: Add support for additional VSC PHYsBryan Whitehead
Add support for the following VSC PHYs VSC8504, VSC8552, VSC8572 VSC8562, VSC8564, VSC8575, VSC8582 Updates for v2: Checked for NULL on input to container_of Changed a large if else series to a switch statement. Added a WARN_ON to make sure lowest nibble of mask is 0 Signed-off-by: Bryan Whitehead <Bryan.Whitehead@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13net: ethernet: stmmac: fix indentation issueColin Ian King
There is a return statement that is indented too deeply, remove the extraneous tab. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13nfc: pn533: pn533_phy_ops dev_[up, down] return intLars Poeschel
Change dev_up and dev_down functions of struct pn533_phy_ops to return int. This way the pn533 core can report errors in the phy layer to upper layers. The only user of this is currently uart.c and it is changed to report the error of a possibly failing call to serdev_device_open. Reported-by: coverity-bot <keescook+coverity-bot@chromium.org> Addresses-Coverity-ID: 1487395 ("Error handling issues") Fixes: c656aa4c27b1 ("nfc: pn533: add UART phy driver") Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13Merge tag 'ieee802154-for-davem-2019-11-13' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan-next Stefan Schmidt says: ==================== pull-request: ieee802154-next 2019-11-13 An update from ieee802154 for *net-next* I waited until last minute to see if there are more patches coming in. Seems not and we will only have one change for ieee802154 this time. Yue Haibing removed an unused variable in the cc2520 driver. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13net: sfp: fix spelling mistake "requies" -> "requires"Colin Ian King
There is a spelling mistake in a dev_warn message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13Merge branch 'net-macb-convert-to-phylink'David S. Miller
Antoine Tenart says: ==================== net: macb: convert to phylink This series converts the MACB Ethernet driver to the Phylink framework. The MAC configuration is moved to the Phylink ops and Phylink helpers are now used in the ethtools functions. This helps to access the flow control and pauseparam logic and this will be helpful in the future for boards using this controller with SFP cages. Since v2: - Moved the Tx and Rx buffer initialization rework to its own patch. Since v1: - Stopped using state->link in mac_config and moved macb_set_tx_clk to the link_up helper.. - Fixed the node given to phylink_of_phy_connect. - Removed netif_carrier_off from macb_open. - Fixed the macb_get_wol logic. - Rewored macb_ioctl as suggested. - Added a call to phylink_destroy in macb_remove. - Fixed the suspend/resume case by calling phylink_start/stop in the resume/suspend helpers. I had to take the rtnl lock to do this, which might be something to discuss. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13net: macb: convert to phylinkAntoine Tenart
This patch converts the MACB Ethernet driver to the Phylink framework. The MAC configuration is moved to the Phylink ops and Phylink helpers are now used in the ethtools functions. This helps to access the flow control and pauseparam logic and this will be helpful in the future for boards using this controller with SFP cages. Tested-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13net: macb: move the Tx and Rx buffer initialization into a functionAntoine Tenart
This patch moves the Tx and Rx buffer initialization into its own function. This does not modify the behaviour of the driver and will be helpful to convert the driver to phylink. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13net: axienet: In kconfig remove arch dependency for axi_emacRadhey Shyam Pandey
To enable xilinx axi_emac driver support on zynqmp ultrascale platform (ARCH64) there are two choices, mention ARCH64 as a dependency list and other is to check if this ARCH dependency list is really needed. Later approach seems more reasonable, so remove the obsolete ARCH dependency list for the axi_emac driver. Sanity test done for microblaze, zynq and zynqmp ultrascale platform. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-13Merge branch 'master' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/klassert/ipsec-next Steffen Klassert says: ==================== pull request (net-next): ipsec-next 2019-11-13 1) Remove a unnecessary net_exit function from the xfrm interface. From Xin Long. 2) Assign xfrm4_udp_encap_rcv to a UDP socket only if xfrm is configured. From Alexey Dobriyan. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-12Merge branch 'ARM-Enable-GENET-support-for-RPi-4'David S. Miller
Stefan Wahren says: ==================== ARM: Enable GENET support for RPi 4 Raspberry Pi 4 uses the broadcom genet chip in version five. This chip has a dma controller integrated. Up to now the maximal burst size was hard-coded to 0x10. But it turns out that Raspberry Pi 4 does only work with the smaller maximal burst size of 0x8. Additionally the patch series has some IRQ retrieval improvements and adds support for a missing PHY mode. This series based on Matthias Brugger's V1 series [1]. [1] - https://patchwork.kernel.org/cover/11186193/ Changes in V5: - address Doug's comment Changes in V4: - rebased on current net-next - remove RGMII_ID support - remove fixes tag from patch 1 - add Florian's suggestions to patch 5 Changes in V3: - introduce SoC-specific compatibles for GENET (incl. dt-binding) - use platform_get_irq_optional for optional IRQ - remove Fixes tag from IRQ error handling change - move most of MDIO stuff to bcm2711.dtsi Changes in V2: - add 2 fixes for IRQ retrieval - add support for missing PHY modes - declare PHY mode RGMII RXID based on the default settings - add alias to allow firmware append the MAC address ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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