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2023-05-26dt-bindings: clock: Add Qcom SM8450 GPUCCKonrad Dybcio
Add device tree bindings for the graphics clock controller on Qualcomm Technology Inc's SM8450 SoCs. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org
2023-05-26arm64: dts: qcom: sa8775p-ride: enable i2c11Shazad Hussain
This enables the i2c11 node on sa8775p-ride board for A2B controller and audio port expander. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526133122.16443-6-quic_shazhuss@quicinc.com
2023-05-26arm64: dts: qcom: sa8775p: add uart5 and uart9 nodesShazad Hussain
Add remaining uart5 and uart9 nodes for UART bus present on sa8775p SoC. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526133122.16443-5-quic_shazhuss@quicinc.com
2023-05-26arm64: dts: qcom: sa8775p: add missing spi nodesShazad Hussain
Add the missing nodes of the SPI buses present on sa8775p platform. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526133122.16443-4-quic_shazhuss@quicinc.com
2023-05-26arm64: dts: qcom: sa8775p: add missing i2c nodesShazad Hussain
Add the missing nodes for the i2c buses present on sa8775p Soc. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526133122.16443-3-quic_shazhuss@quicinc.com
2023-05-26arm64: dts: qcom: sa8775p: add the QUPv3 #0 and #3 nodeShazad Hussain
Add zeroth and third instance of the QUPv3 engine to the sa8775p.dtsi. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526133122.16443-2-quic_shazhuss@quicinc.com
2023-05-26arm64: dts: qcom: apq8096: fix fixed regulator name propertyKrzysztof Kozlowski
Correct the typo in 'regulator-name' property. apq8096-ifc6640.dtb: v1p05-regulator: 'regulator-name' is a required property apq8096-ifc6640.dtb: v1p05-regulator: Unevaluated properties are not allowed ('reglator-name' was unexpected) Fixes: 6cbdec2d3ca6 ("arm64: dts: qcom: msm8996: Introduce IFC6640") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230507174516.264936-3-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: msm8996: correct MMCC clocks orderKrzysztof Kozlowski
Re-order the clocks for MMCC clock controller node to match the bindings (Linux driver takes by name): msm8996-mtp.dtb: clock-controller@8c0000: clock-names:1: 'gpll0' was expected msm8996-mtp.dtb: clock-controller@8c0000: clock-names:2: 'gcc_mmss_noc_cfg_ahb_clk' was expected Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230507174516.264936-2-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: msm8916: correct LPASS CPU clocks orderKrzysztof Kozlowski
Re-order the clocks for LPASS CPU node to match the bindings (Linux driver takes by name): msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:1: 'mi2s-bit-clk0' was expected msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:2: 'mi2s-bit-clk1' was expected msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:3: 'mi2s-bit-clk2' was expected msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:4: 'mi2s-bit-clk3' was expected msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:5: 'pcnoc-mport-clk' was expected msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:6: 'pcnoc-sway-clk' was expected Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230507174516.264936-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sdm845: Add stream-id of qspi to iommusVijaya Krishna Nivarthi
As part of DMA mode support to qspi driver. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1682328761-17517-5-git-send-email-quic_vnivarth@quicinc.com
2023-05-26arm64: dts: qcom: sc7280: Add stream-id of qspi to iommusVijaya Krishna Nivarthi
As part of DMA mode support to qspi driver. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1682328761-17517-4-git-send-email-quic_vnivarth@quicinc.com
2023-05-26arm64: dts: qcom: sc7180: Add stream-id of qspi to iommusVijaya Krishna Nivarthi
As part of DMA mode support to qspi driver. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1682328761-17517-3-git-send-email-quic_vnivarth@quicinc.com
2023-05-26arm64: dts: qcom: msm8996: correct /soc/bus rangesKrzysztof Kozlowski
The bus@0 node should have reg or ranges to fix dtbs W=1 warnings: Warning (unit_address_vs_reg): /soc@0/bus@0: node has a unit name, but no reg or ranges property Warning (simple_bus_reg): /soc@0/bus@0: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # MSM8996 Kagura Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230420180746.860934-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sdm630-nile: correct duplicated reserved memory nodeKrzysztof Kozlowski
SoC DTSI already comes with 85800000 reserved memory node, so assume the author wanted to update its length. This fixes dtbs W=1 warning: Warning (unique_unit_address_if_enabled): /reserved-memory/qhee-code@85800000: duplicate unit-address (also used in node /reserved-memory/reserved@85800000) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230419211921.79871-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm6125-sprout: align ADC channel node names with bindingsKrzysztof Kozlowski
Bindings expect ADC channel node names to follow specific pattern: sm6125-xiaomi-laurel-sprout.dtb: adc@3100: 'adc-chan@4d', 'adc-chan@4e', 'adc-chan@52', 'adc-chan@54' do not match any of the regexes: ... Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-6-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequencyKrzysztof Kozlowski
The SM8550 DTSI defines a fixed PCIE1 PHY AUX clock and expects boards to define frequency. Use the same as in MTP8550 to fix: sm8550-qrd.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-5-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm8250: add missing qcom,smmu-500 fallbackKrzysztof Kozlowski
Since commit 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500 compatible fallback: ['qcom,sm8250-smmu-500', 'qcom,adreno-smmu', 'qcom,smmu-500', 'arm,mmu-500'] is too long 'qcom,sm8250-smmu-500' is not one of ['qcom,msm8996-smmu-v2', 'qcom,msm8998-smmu-v2', 'qcom,sdm630-smmu-v2'] 'qcom,sm8250-smmu-500' is not one of ['qcom,msm8996-smmu-v2', 'qcom,sc7180-smmu-v2', 'qcom,sdm630-smmu-v2', 'qcom,sdm845-smmu-v2' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-4-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: qdu1000: add missing qcom,smmu-500 fallbackKrzysztof Kozlowski
Since commit 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500 compatible fallback: ['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too short ['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-3-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: ipq8074: drop incorrect SPI bus spi-max-frequencyKrzysztof Kozlowski
The spi-max-frequency property belongs to SPI devices, not SPI controller: ipq8074-hk01.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-2-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: ipq6018: drop incorrect SPI bus spi-max-frequencyKrzysztof Kozlowski
The spi-max-frequency property belongs to SPI devices, not SPI controller: ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: add few more reserved memory regionVignesh Viswanathan
In IPQ SoCs, bootloader will collect the system RAM contents upon crash for the post morterm analysis. If we don't reserve the memory region used by bootloader, obviously linux will consume it and upon next boot on crash, bootloader will be loaded in the same region, which will lead to loose some of the data, sometimes we may miss out critical information. So lets reserve the region used by the bootloader. Similarly SBL copies some data into the reserved region and it will be used in the crash scenario. So reserve 1MB for SBL as well. While at it, drop the size padding in the reserved memory region, wherever applicable. Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526110653.27777-4-quic_viswanat@quicinc.com
2023-05-26arm64: dts: qcom: enable the download mode supportVignesh Viswanathan
Like any other Qualcomm SoCs, IPQ8074 and IPQ6018 also supports the download mode to collect the RAM dumps if system crashes, to perform the post mortem analysis. Add support for the same. Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526110653.27777-3-quic_viswanat@quicinc.com
2023-05-26arm64: dts: qcom: sm8450: add crypto nodesNeil Armstrong
Add crypto engine (CE) and CE BAM related nodes and definitions for the SM8450 SoC. Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> [Bhupesh: Corrected the compatible list] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-12-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8350: Add Crypto Engine supportBhupesh Sharma
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8350.dtsi'. Co-developed-by and Signed-off-by: Robert Foss <rfoss@kernel.org> [Bhupesh: Switch to '#interconnect-cells = <2>', available since commit 4f287e31ff5f] Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-11-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8250: Add Crypto Engine supportBhupesh Sharma
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8250.dtsi'. Co-developed-by and Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-10-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8150: Add Crypto Engine supportBhupesh Sharma
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8150.dtsi'. Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-9-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm6115: Add Crypto Engine supportBhupesh Sharma
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm6115.dtsi'. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-8-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sdm845: Fix the slimbam DMA engine compatible stringBhupesh Sharma
As per documentation, Qualcomm SDM845 SoC supports SLIMBAM DMA engine v1.7.4, so use the correct compatible strings. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-5-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sdm8550: Fix the BAM DMA engine compatible stringBhupesh Sharma
As per documentation, Qualcomm SM8550 SoC supports BAM DMA engine v1.7.4, so use the correct compatible strings. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-4-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: ipq9574: add QFPROM nodeKathiravan T
IPQ9574 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-5-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq6018: add QFPROM nodeKathiravan T
IPQ6018 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-4-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq5332: add QFPROM nodeKathiravan T
IPQ5332 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-3-quic_kathirav@quicinc.com
2023-05-26dt-bindings: nvmem: qfprom: add compatible for few IPQ SoCsKathiravan T
Add the QFPROM compatible for IPQ5332, IPQ6018 and IPQ9574 Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-2-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP453 variantDevi Priya
Add the initial device tree support for the Reference Design Platform (RDP) 453 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR and SMPA1 regulator node. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526153152.777-3-quic_devipriy@quicinc.com
2023-05-26dt-bindings: arm: qcom: document AL02-C8 board based on IPQ9574 familyDevi Priya
Document AL02-C8 (Reference Design Platform 453) board based on IPQ9574 family of SoCs. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526153152.777-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP449 variantDevi Priya
Add the initial device tree support for the Reference Design Platform (RDP) 449 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR and SMPA1 regulator node. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516135013.3547-3-quic_devipriy@quicinc.com
2023-05-26dt-bindings: arm: qcom: document AL02-C6 board based on IPQ9574 familyDevi Priya
Document AL02-C6 (Reference Design Platform 449) board based on IPQ9574 family of SoCs. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516135013.3547-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP418 variantDevi Priya
Add the initial device tree support for the Reference Design Platform (RDP) 418 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR, eMMC and SMPA1 regulator node. Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510104359.16678-3-quic_devipriy@quicinc.com
2023-05-26dt-bindings: arm: qcom: document AL02-C2 board based on IPQ9574 familyDevi Priya
Document AL02-C2 (Reference Design Platform 418) board based on IPQ9574 family of SoCs. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510104359.16678-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add cpufreq supportDevi Priya
Add cpu freq nodes in the device tree to bump cpu frequency above 800MHz. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-4-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add SMPA1 regulator nodeDevi Priya
Add support for SMPA1 regulator node in IPQ9574. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-3-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add RPM related nodesDevi Priya
Add RPM Glink & RPM message RAM nodes to support frequency scaling on IPQ9574. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add support for APSS clock controllerDevi Priya
Add the APCS & A73 PLL nodes to support CPU frequency scaling. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230406061314.10916-5-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: rename al02-c7 dts to rdp433Devi Priya
Rename the dts after Reference Design Platform(RDP) to adopt standard naming convention. Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230425084010.15581-7-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: pm7250b: add missing spmi-vadc includeLuca Weiss
This file is using definitions from the spmi-vadc header, so we need to include it. Fixes: 11975b9b8135 ("arm64: dts: qcom: Add pm7250b PMIC") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407-pm7250b-sid-v1-1-fc648478cc25@fairphone.com
2023-05-25arm64: dts: qcom: Add msm8939 Sony Xperia M4 AquaBryan O'Donoghue
Add a basic booting DTS for the Sony Xperia M4 Aqua aka "tulip". Tulip is paired with: - wcn3660 - smb1360 battery charger - 720p Truly NT35521 Panel Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-6-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add Square apq8039-t2 boardBryan O'Donoghue
The apq8039-t2 is an apq8039 based board paired with a wcn3680b WiFi chipset. Co-developed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Co-developed-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Co-developed-by: Benjamin Li <benl@squareup.com> Signed-off-by: Benjamin Li <benl@squareup.com> Co-developed-by: James Willcox <jwillcox@squareup.com> Signed-off-by: James Willcox <jwillcox@squareup.com> Co-developed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Co-developed-by: Joseph Gates <jgates@squareup.com> Signed-off-by: Joseph Gates <jgates@squareup.com> Co-developed-by: Max Chen <mchen@squareup.com> Signed-off-by: Max Chen <mchen@squareup.com> Co-developed-by: Zac Crosby <zac@squareup.com> Signed-off-by: Zac Crosby <zac@squareup.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-5-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add msm8939-pm8916.dtsi includeStephan Gerhold
The msm8939-pm8916.dtsi include configures the regulator supplies of MSM8939 used together with PM8916, as recommended by Qualcomm. In rare cases where boards deviate from the recommended design they can just avoid using this include. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-4-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add msm8939 SoCBryan O'Donoghue
Add msm8939 a derivative SoC of msm8916. This SoC contains a number of key differences to msm8916. - big.LITTLE Octa Core - quad 1.5GHz + quad 1.0GHz - DRAM 1x800 LPDDR3 - Camera 4+4 lane CSI - Venus @ 1080p60 HEVC - DSI x 2 - Adreno A405 - WiFi wcn3660/wcn3680b 802.11ac Co-developed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Co-developed-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Co-developed-by: Benjamin Li <benl@squareup.com> Signed-off-by: Benjamin Li <benl@squareup.com> Co-developed-by: James Willcox <jwillcox@squareup.com> Signed-off-by: James Willcox <jwillcox@squareup.com> Co-developed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Co-developed-by: Joseph Gates <jgates@squareup.com> Signed-off-by: Joseph Gates <jgates@squareup.com> Co-developed-by: Max Chen <mchen@squareup.com> Signed-off-by: Max Chen <mchen@squareup.com> Co-developed-by: Zac Crosby <zac@squareup.com> Signed-off-by: Zac Crosby <zac@squareup.com> Co-developed-by: Vincent Knecht <vincent.knecht@mailoo.org> Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> Co-developed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-3-bryan.odonoghue@linaro.org
2023-05-25dt-bindings: vendor-prefixes: Add SquareBryan O'Donoghue
Add vendor prefix for Square (https://squareup.com). Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-2-bryan.odonoghue@linaro.org
generated by cgit (git 2.34.1) at 2025-07-15 20:40:39 +0000