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2025-05-22dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yamlChaoyi Chen
Convert cdn-dp-rockchip.txt to yaml. Add new "port@1" property which represents the CDN DP output to keep the same style as the other display interfaces. This patch also changes the constraints for "phys" and "extcon". For the original binding, only one phy and the corresponding extcon can be specified. In the new binding, one or two phys can be specified. Since the RK3399 has two DP-USB PHYs, specifying one allows output via the corresponding PHY, while specifying two lets the driver choose one PHY for output. This rule also applies to extcon, which provides the cable state for the corresponding PHY. Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250520024718.142-3-kernel@airkyi.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-22regmap: irq: Add support for chips without separate IRQ statusMathieu Dubois-Briand
Some GPIO chips allow to rise an IRQ on GPIO level changes but do not provide an IRQ status for each separate line: only the current gpio level can be retrieved. Add support for these chips, emulating IRQ status by comparing GPIO levels with the levels during the previous interrupt. Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250522-mdb-max7360-support-v9-5-74fc03517e41@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22ASoC: wm_adsp: Make cirrus_dir constRichard Fitzgerald
The cirrus_dir pointer should be const data but was missing the second const needed to achieve this. I haven't marked this as a 'Fixes' because it isn't causing any bugs, it's only a code improvement. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://patch.msgid.link/20250522103816.543919-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22Merge tag 'soc_fsl-6.16-1' of https://github.com/chleroy/linux into soc/driversArnd Bergmann
FSL SOC Changes for 6.16: - Various fixes and cleanups from Ioana on fsl-mc bus driver - Other misc fixes on fsl-mc bus driver - A build fix on DPAA2 driver - Some preparation work from Kees on qbman driver - Some cleanup on FSL qe interrupt driver init * tag 'soc_fsl-6.16-1' of https://github.com/chleroy/linux: soc: fsl: qe: Consolidate chained IRQ handler install/remove bus: fsl-mc: Use strscpy() instead of strscpy_pad() soc: fsl: qbman: Remove const from portal->cgrs allocation type bus: fsl_mc: Fix driver_managed_dma check bus: fsl-mc: increase MC_CMD_COMPLETION_TIMEOUT_MS value bus: fsl-mc: drop useless cleanup bus: fsl-mc: add the dprc_get_mem() command to the whitelist bus: fsl-mc: fix GET/SET_TAILDROP command ids bus: fsl-mc: do not add a device-link for the UAPI used DPMCP device bus: fsl-mc: fix double-free on mc_dev soc: fsl: Do not enable DPAA2_CONSOLE by default during compile testing Link: https://lore.kernel.org/r/9e5b3e8e-3280-4ff9-915b-9a8b934bac22@csgroup.eu Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22Merge tag 'mt76-next-2025-05-21' of https://github.com/nbd168/wirelessJohannes Berg
Felix Fietkau says: =================== mt76 patches for 6.16 - fixes - EHT improvements - new device ids =================== Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-05-22Merge tag 'ath-next-20250521' of ↵Johannes Berg
git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath Jeff Johnson says: ================== ath.git patches for v6.16 ath12k: Add monitor mode support for WCN7850. Enhance regulatory support including 6 GHz power modes. In addition, perform the usual set of bug fixes and cleanups across all supported drivers. ================== Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-05-22Merge tag 'arm-soc/for-6.16/maintainers' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into soc/arm This pull request contains MAINTAINERS file update for Broadcom SoCs, please pull the following for 6.16: - Krzysztof updates the BCM2711/BCM283X entry to also match on the bcm2712 pattern to cover the Raspberry Pi 5 files * tag 'arm-soc/for-6.16/maintainers' of https://github.com/Broadcom/stblinux: ARM: broadcom: MAINTAINERS: Cover bcm2712 files Link: https://lore.kernel.org/r/20250513140808.2047729-1-florian.fainelli@broadcom.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22Merge tag 'davinci-updates-for-v6.16-rc1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into soc/arm TI DaVinci updates for v6.16-rc1 - remove support for the da830 SoC - increase the panel FIFO threshold in da850-evm * tag 'davinci-updates-for-v6.16-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: ARM: dts: davinci: da850-evm: Increase fifo threshold ARM: davinci: remove support for da830 Link: https://lore.kernel.org/r/20250519090232.13147-1-brgl@bgdev.pl Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22spi: loopback-test: fix up const pointer issue in rx_ranges_cmp()Greg Kroah-Hartman
When a list head is a const pointer, the list entry for that head also must remain a const pointer, otherwise we are just "throwing it away" for no good reason. Fix this up by properly marking these structures as const. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://patch.msgid.link/2025052213-semifinal-sublevel-d631@gregkh Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22spi: gpio: fix const issue in spi_to_spi_gpio()Greg Kroah-Hartman
While the struct spi_device * passed into spi_to_spi_gpio() is a const one, the struct spi_bitbang * that is retrieved from the controller field in the spi_device is NOT a const pointer, as it is coming from the spi_controller_get_devdata() call, and then passed to container_of() which would strip off the const attribute for no good reason (i.e. if a const pointer is passed to container_of() it still is const coming out). Fix this all up by properly declaring the struct spi_bitbang * as not const. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://patch.msgid.link/2025052225-scallion-ritzy-dbbd@gregkh Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22spi: use container_of_cont() for to_spi_device()Greg Kroah-Hartman
Some places in the spi core pass in a const pointer to a device and the default container_of() casts that away, which is not a good idea. Preserve the proper const attribute by using container_of_const() for to_spi_device() instead, which is what it was designed for. Note, this removes the NULL check for a device pointer in the call, but no one was ever checking for that return value, and a device pointer should never be NULL overall anyway, so this should be a safe change. Cc: Mark Brown <broonie@kernel.org> Fixes: d69d80484598 ("driver core: have match() callback in struct bus_type take a const *") Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://patch.msgid.link/2025052230-fidgeting-stooge-66f5@gregkh Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22Merge tag 'v6.16-rockchip-defconfig64-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/defconfig Enable Rockchip SAI and ES8328 modules. * tag 'v6.16-rockchip-defconfig64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: defconfig: Enable Rockchip SAI and ES8328 Link: https://lore.kernel.org/r/4060740.R56niFO833@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22ublk: remove io argument from ublk_auto_buf_reg_fallback()Caleb Sander Mateos
The argument has been unused since the function was added, so remove it. Signed-off-by: Caleb Sander Mateos <csander@purestorage.com> Reviewed-by: Ming Lei <ming.lei@redhat.com> Link: https://lore.kernel.org/r/20250521160720.1893326-1-csander@purestorage.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-05-22Merge tag 'mtk-defconfig-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/defconfig MediaTek ARM64 defconfig updates for v6.16 This enables some drivers as modules to enable fully booting some of the supported MediaTek boards; In particular, this enables the following drivers as module: - PHYs for PCIe, HDMI, DSI and DisplayPort for all boards - MediaTek UART DMA Controller, also for all boards - MDP3 driver for MT8186/88/95 (Chromebooks and Genio variants) - Auxiliary ADC for the MT6357/58/59 PMICs found on both Genio EVK and Chromebooks based on designs with MT8183/86/88/92/95 SoCs - iTE IT5205 Type-C USB Alternate Mode Passive MUX, found on both Chromebooks and Genio EVKs with MT8188/95 - Richtek RT1715 Type-C PD Controller, found on all Genio boards - Himax HX8279 DSI panel DriverIC and KD070FHFID015 panel, found on various revisions of the Genio Evaluation Kit boards. * tag 'mtk-defconfig-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: arm64: defconfig: Enable configs for MediaTek Genio EVK boards arm64: defconfig: mediatek: enable PHY drivers Link: https://lore.kernel.org/r/20250520114356.1194450-2-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22Merge tag 'qcom-arm64-defconfig-for-6.16-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig One more Qualcomm Arm64 defconfig update for v6.16 Enable global clock controller and TLMM pinctrl drivers for IPQ5424 to make this boot. * tag 'qcom-arm64-defconfig-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: Enable IPQ5424 RDP466 base configs Link: https://lore.kernel.org/r/20250520025119.40021-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22Merge tag 'riscv-config-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/defconfig RISC-V config for v6.16 PM_GENERIC_DOMAINS is enabled because T-Head SoCs need to use it and spacemit's gpio and clock controller are enabled for more obvious reasons. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-config-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: defconfig: spacemit: enable clock controller driver for SpacemiT K1 riscv: defconfig: spacemit: enable gpio support for K1 SoC riscv: Enable PM_GENERIC_DOMAINS for T-Head SoCs Link: https://lore.kernel.org/r/20250516-joystick-mortified-385820b1ad0b@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22wifi: mt76: mt7925: add rfkill_poll for hardware rfkillAllan Wang
Add mac80211 rfkill_poll ops to monitor hardware rfkill state and state change will be updated. Signed-off-by: Allan Wang <allan.wang@mediatek.com> Link: https://patch.msgid.link/20250507053131.4173691-1-allan.wang@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: support power delta calculation for 5 TX pathsShayne Chen
One variant of MT7992 has 5 TX paths, so extend the power delta function to support it. Also, rename nss_delta to path_delta since the value is based on the number of TX paths rather tha the number of spatial streams. (path delta [0.5 dBm] = 10 * log(path number) [dBm] * 2) Co-developed-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-9-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: fix available_antennas settingShayne Chen
Check if available_antennas_tx and available_antennas_rx are already set during the per-chip initialization phase; otherwise, they could be overwritten with incorrect values. Fixes: 69d54ce7491d ("wifi: mt76: mt7996: switch to single multi-radio wiphy") Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-8-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7996: fix RX buffer size of MCU eventShayne Chen
Some management frames are first processed by the firmware and then passed to the driver through the MCU event rings. In CONNAC3, event rings do not support scatter-gather and have a size limitation of 2048 bytes. If a packet sized between 1728 and 2048 bytes arrives from an event ring, the ring will hang because the driver attempts to use scatter-gather to process it. To fix this, include the size of struct skb_shared_info in the MCU RX buffer size to prevent scatter-gather from being used for event skb in mt76_dma_rx_fill_buf(). Fixes: 98686cd21624 ("wifi: mt76: mt7996: add driver for MediaTek Wi-Fi 7 (802.11be) devices") Co-developed-by: Peter Chiu <chui-hao.chiu@mediatek.com> Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-7-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7996: change max beacon sizePeter Chiu
According to hardware capability, the maximum beacon size is 2048 bytes minus the size of TLV headers. Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-6-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7996: fix invalid NSS setting when TX path differs from NSSPeter Chiu
The maximum TX path and NSS may differ on a band. For example, one variant of the MT7992 has 5 TX paths and 4 NSS on the 5 GHz band. To address this, add orig_antenna_mask to record the maximum NSS and prevent setting an invalid NSS in mt7996_set_antenna(). Fixes: 69d54ce7491d ("wifi: mt76: mt7996: switch to single multi-radio wiphy") Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-5-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7996: drop fragments with multicast or broadcast RABenjamin Lin
IEEE 802.11 fragmentation can only be applied to unicast frames. Therefore, drop fragments with multicast or broadcast RA. This patch addresses vulnerabilities such as CVE-2020-26145. Signed-off-by: Benjamin Lin <benjamin-jw.lin@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-4-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7996: set EHT max ampdu length capabilityPeter Chiu
Set the max AMPDU length in the EHT MAC CAP. Without this patch, the peer station cannot obtain the correct capability, which prevents achieving peak throughput on the 2 GHz band. Fixes: 1816ad9381e0 ("wifi: mt76: mt7996: add max mpdu len capability") Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-3-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7996: fix beamformee SS fieldHoward Hsu
Fix the beamformee SS field for the mt7996, mt7992 and mt7990 chipsets. For the mt7992, this value shall be set to 0x4, while the others shall be set to 0x3. Fixes: 5b20557593d4 ("wifi: mt76: connac: adjust phy capabilities based on band constraints") Signed-off-by: Howard Hsu <howard-yh.hsu@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-2-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: remove capability of partial bandwidth UL MU-MIMOHoward Hsu
The firmware only supports full bandwidth UL MU-MIMO, so remove the partial bandwidth capability from HE PHY CAP. Signed-off-by: Howard Hsu <howard-yh.hsu@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Link: https://patch.msgid.link/20250515032952.1653494-1-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7925: add test mode supportMichael Lo
The test mode interface allows controlled execution of chip-level operations such as continuous transmission, reception tests, and register access, which are essential during bring-up, diagnostics, and factory testing. Co-developed-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Michael Lo <michael.lo@mediatek.com> Link: https://patch.msgid.link/20250505233618.1951021-2-sean.wang@kernel.org Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7925: extend MCU support for testmodeMichael Lo
Add MCU command and its handling needed for testmode support on MT7925. This enables low-level chip testing features such as continuous TX/RX.. Co-developed-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Michael Lo <michael.lo@mediatek.com> Link: https://patch.msgid.link/20250505233618.1951021-1-sean.wang@kernel.org Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7925: ensure all MCU commands wait for responseMichael Lo
Modify MCU command sending functions to wait for a response, ensuring consistent behavior across all commands and improves reliability by confirming that each command is processed successfully. Fixes: c948b5da6bbe ("wifi: mt76: mt7925: add Mediatek Wi-Fi7 driver for mt7925 chips") Signed-off-by: Michael Lo <michael.lo@mediatek.com> Signed-off-by: Ming Yen Hsieh <mingyen.hsieh@mediatek.com> Link: https://patch.msgid.link/20250414013954.1151774-3-mingyen.hsieh@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7925: refine the sniffer commnadMing Yen Hsieh
Remove a duplicate call to `mt76_mcu_send_msg` to fix redundant operations in the sniffer command handling. Fixes: c948b5da6bbe ("wifi: mt76: mt7925: add Mediatek Wi-Fi7 driver for mt7925 chips") Signed-off-by: Ming Yen Hsieh <mingyen.hsieh@mediatek.com> Link: https://patch.msgid.link/20250414013954.1151774-2-mingyen.hsieh@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7925: prevent multiple scan commandsMing Yen Hsieh
Add a check to ensure only one scan command is active at a time by testing the MT76_HW_SCANNING state. Fixes: c948b5da6bbe ("wifi: mt76: mt7925: add Mediatek Wi-Fi7 driver for mt7925 chips") Signed-off-by: Ming Yen Hsieh <mingyen.hsieh@mediatek.com> Link: https://patch.msgid.link/20250414013954.1151774-1-mingyen.hsieh@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7915: Fix null-ptr-deref in mt7915_mmio_wed_init()Henry Martin
devm_ioremap() returns NULL on error. Currently, mt7915_mmio_wed_init() does not check for this case, which results in a NULL pointer dereference. Prevent null pointer dereference in mt7915_mmio_wed_init(). Fixes: 4f831d18d12d ("wifi: mt76: mt7915: enable WED RX support") Signed-off-by: Henry Martin <bsdhenrymartin@gmail.com> Link: https://patch.msgid.link/20250407061900.85317-1-bsdhenrymartin@gmail.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7996: Fix null-ptr-deref in mt7996_mmio_wed_init()Henry Martin
devm_ioremap() returns NULL on error. Currently, mt7996_mmio_wed_init() does not check for this case, which results in a NULL pointer dereference. Prevent null pointer dereference in mt7996_mmio_wed_init() Fixes: 83eafc9251d6 ("wifi: mt76: mt7996: add wed tx support") Signed-off-by: Henry Martin <bsdhenrymartin@gmail.com> Link: https://patch.msgid.link/20250407032349.83360-1-bsdhenrymartin@gmail.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: mt7925: add RNR scan support for 6GHzMing Yen Hsieh
Enhance the mt7925 to include RNR scan support. It adds the necessary RNR information to the scan command. Signed-off-by: Ming Yen Hsieh <mingyen.hsieh@mediatek.com> Link: https://patch.msgid.link/20250321013829.3598-2-mingyen.hsieh@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: add mt76_connac_mcu_build_rnr_scan_param routineMing Yen Hsieh
Introduce mt76_connac_mcu_build_rnr_scan_param routine for handling RNR scan. This is a preliminary patch to enable RNR scan in mt7921 and mt7925 driver. Signed-off-by: Ming Yen Hsieh <mingyen.hsieh@mediatek.com> Link: https://patch.msgid.link/20250321013829.3598-1-mingyen.hsieh@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22wifi: mt76: scan: Fix 'mlink' dereferenced before IS_ERR_OR_NULL checkFeng Jiang
Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202504011739.HvUKtUUe-lkp@intel.com/ Fixes: 3ba20af886d1 ("wifi: mt76: scan: set vif offchannel link for scanning/roc") Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn> Link: https://patch.msgid.link/20250402062415.25434-1-jiangfeng@kylinos.cn Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-05-22Merge tag 'juno-updates-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt Armv8 Juno/FVP updates for v6.16 Few updates to the Arm FVP(Fixed Virtual Platform) device tree, enhancing support for system tracing, power management, and firmware coexistence: 1. ETE and TRBE support Adds CoreSight ETE and TRBE nodes for the FVP Rev C model. These are disabled by default as they need to be enabled explicitly via model parameters. 2. CPU idle states and system timer for idle broadcast Introduces CPU idle state definitions but disabled by default due to potential performance impact on the model. Also adds a system-level broadcast timer for use when CPUs enter deep idle states where local timers stop. 3. Firmware memory reservation Reserves 64MB at the end of the first DRAM bank to prevent conflicts with FF-A firmware or similar configurations that rely on this region. 4. Drop the unnecessary clock-frequency property in the timer nodes The boot/secure firmware must configure the timer clock frequency and the non-secure OS must be able to read the same. The clock-frequency is generally used when the firmware is broken which is not the case on most of the fast models and Juno platform. As noted above some of the changes are disabled by default where applicable to ensure backward compatibility and avoid unintended performance impact on platforms using default model parameters. * tag 'juno-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: fvp: Add ETE and TRBE nodes for Rev C model arm64: dts: arm: Drop the clock-frequency property from timer nodes arm64: dts: fvp: Reserve 64MB for the FF-A firmware in memory map arm64: dts: fvp: Add CPU idle states for Rev C model arm64: dts: fvp: Add system timer for broadcast during CPU idle Link: https://lore.kernel.org/r/20250513143827.3606686-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22Merge tag 'linux-can-fixes-for-6.15-20250521' of ↵Paolo Abeni
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can Marc Kleine-Budde says: ==================== pull-request: can 2025-05-22 this is a pull request of 4 patches for net/main. The first 3 patches are by Axel Forsman and fix a ISR race condition in the kvaser_pciefd driver. The last patch is by Carlos Sanchez and fixes the reception of short error messages in the slcan driver. * tag 'linux-can-fixes-for-6.15-20250521' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can: can: slcan: allow reception of short error messages can: kvaser_pciefd: Continue parsing DMA buf after dropped RX can: kvaser_pciefd: Fix echo_skb race can: kvaser_pciefd: Force IRQ edge in case of nested IRQ ==================== Link: https://patch.msgid.link/20250522082344.490913-1-mkl@pengutronix.de Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-05-22arm64: cputype: Add cputype definition for HIP12Yicong Yang
Add MIDR encoding for HiSilicon HIP12 which is used on HiSilicon HIP12 SoCs. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/20250425033845.57671-2-yangyicong@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
2025-05-22arm64: el2_setup.h: Make __init_el2_fgt labels consistent, againRob Herring (Arm)
Commit 5b39db6037e7 ("arm64: el2_setup.h: Rename some labels to be more diff-friendly") reworked the labels in __init_el2_fgt to say what's skipped rather than what the target location is. The exception was "set_fgt_" which is where registers are written. In reviewing the BRBE additions, Will suggested "set_debug_fgt_" where HDFGxTR_EL2 are written. Doing that would partially revert commit 5b39db6037e7 undoing the goal of minimizing additions here, but it would follow the convention for labels where registers are written. So let's do both. Branches that skip something go to a "skip" label and places that set registers have a "set" label. This results in some double labels, but it makes things entirely consistent. While we're here, the SME skip label was incorrectly named, so fix it. Reported-by: Will Deacon <will@kernel.org> Cc: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250520-arm-brbe-v19-v22-2-c1ddde38e7f8@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2025-05-22Merge branch 'octeontx2-af-apr-mapping-fixes'Paolo Abeni
Geetha sowjanya says: ==================== octeontx2-af: APR Mapping Fixes This patch series includes fixes related to APR (LMT) mapping and debugfs support. Changes include: Patch 1:Set LMT_ENA bit for APR table entries. Enables the LMT line for each PF/VF by setting the LMT_ENA bit in the APR_LMT_MAP_ENTRY_S structure. Patch-2:Fix APR entry in debugfs The APR table was previously mapped using a fixed size, which could lead to incorrect mappings when the number of PFs and VFs differed from the assumed value. This patch updates the logic to calculate the APR table size dynamically, based on values from the APR_LMT_CFG register, ensuring correct representation in debugfs. ==================== Link: https://patch.msgid.link/20250521060834.19780-1-gakula@marvell.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-05-22octeontx2-af: Fix APR entry mapping based on APR_LMT_CFGGeetha sowjanya
The current implementation maps the APR table using a fixed size, which can lead to incorrect mapping when the number of PFs and VFs varies. This patch corrects the mapping by calculating the APR table size dynamically based on the values configured in the APR_LMT_CFG register, ensuring accurate representation of APR entries in debugfs. Fixes: 0daa55d033b0 ("octeontx2-af: cn10k: debugfs for dumping LMTST map table"). Signed-off-by: Geetha sowjanya <gakula@marvell.com> Link: https://patch.msgid.link/20250521060834.19780-3-gakula@marvell.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-05-22octeontx2-af: Set LMT_ENA bit for APR table entriesSubbaraya Sundeep
This patch enables the LMT line for a PF/VF by setting the LMT_ENA bit in the APR_LMT_MAP_ENTRY_S structure. Additionally, it simplifies the logic for calculating the LMTST table index by consistently using the maximum number of hw supported VFs (i.e., 256). Fixes: 873a1e3d207a ("octeontx2-af: cn10k: Setting up lmtst map table"). Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com> Link: https://patch.msgid.link/20250521060834.19780-2-gakula@marvell.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-05-22ASoC: tegra: Tegra264 support in isomgr_bwSheetal
Tegra264 supports max 32 channels, hence calculating the max bandwidth using the channel info from soc_data. Signed-off-by: Sheetal <sheetal@nvidia.com> Link: https://patch.msgid.link/20250512051747.1026770-12-sheetal@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22ASoC: tegra: AHUB: Add Tegra264 supportSheetal
Add Tegra264 AHUB support with following changes: - Update Tegra264 IP instances: DMIC(2), DSPK(1), AMX(6), ADX(6), I2S(8). - Update register offsets for Tegra264. - Add soc_data for Tegra264 chip-specific variations. - Increase channels_max to 32 for Tegra264 DAIs. Signed-off-by: Sheetal <sheetal@nvidia.com> Link: https://patch.msgid.link/20250512051747.1026770-11-sheetal@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22ASoC: tegra: ADX: Add Tegra264 supportSheetal
Add Tegra264 ADX support with following changes: - Add soc_data for Tegra264-specific variations - Tegra264 ADX supports 32 input channels, hence update the playback DAI channels_max parameter and CIF configuration API. - Register offsets and default values are updated to align with Tegra264. - Add 128 byte map controls for Tegra264 to accommodate each byte per channel (32channels x 32bits). Signed-off-by: Sheetal <sheetal@nvidia.com> Link: https://patch.msgid.link/20250512051747.1026770-10-sheetal@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22ASoC: tegra: AMX: Add Tegra264 supportSheetal
Add Tegra264 AMX support with following changes: - Add soc_data for Tegra264-specific variations - Tegra264 AMX supports 32 output channels, hence update the capture DAI channels_max parameter and CIF configuration API. - Register offsets and default values are updated to align with Tegra264. - Add 128 byte map controls for Tegra264 to accommodate each byte per channel (32channels x 32bits). Signed-off-by: Sheetal <sheetal@nvidia.com> Link: https://patch.msgid.link/20250512051747.1026770-9-sheetal@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22ASoC: tegra: I2S: Add Tegra264 supportSheetal
Add Tegra264 I2S support with following changes: - Add soc_data for Tegra264-specific variations - Tegra264 I2S supports 32 audio channels, hence update the TDM config, CIF configuration API and DAI channel_max parameter. - Register offsets and default values are updated to align with Tegra264. Signed-off-by: Sheetal <sheetal@nvidia.com> Link: https://patch.msgid.link/20250512051747.1026770-8-sheetal@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22ASoC: tegra: Update PLL rate for Tegra264Sheetal
The PLLs should be set with a VCO frequency in the 900MHz – 1GHz range to minimize jitter and ppm error for Tegra264. Add the PLLA rate accordingly. Therefore, use 983040000 frequency is for multiple of 8K frequencies and 993484800 frequency is for multiple of 11.025K frequencies. Signed-off-by: Sheetal <sheetal@nvidia.com> Link: https://patch.msgid.link/20250512051747.1026770-7-sheetal@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22ASoC: tegra: ASRC: Update ARAM addressSheetal
The ARAM address for Tegra264 has been updated. To maintain backward compatibility given its chip-specific nature, it's now included in the soc_data. Signed-off-by: Sheetal <sheetal@nvidia.com> Link: https://patch.msgid.link/20250512051747.1026770-6-sheetal@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit (git 2.34.1) at 2025-07-15 02:43:40 +0000