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2025-05-07dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 seriesJingbao Qiu
Add RTC devicetree binding for Sophgo CV1800 series SoC. The device is called RTC, but contains control registers of other HW blocks in its address space, most notably of Power-on-Reset (PoR) module, DW8051 IP (MCU core), accompanying SRAM, hence putting it in SoC subsystem. Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Link: https://lore.kernel.org/r/20250315224921.3627852-2-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-07dt-bindings: clock: sophgo: add clock controller for SG2044Inochi Amaoto
The clock controller on the SG2044 provides common clock function for all IPs on the SoC. This device requires PLL clock to function normally. Add definition for the clock controller of the SG2044 SoC. Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250418020325.421257-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-07dt-bindings: soc: sophgo: Add SG2044 top syscon deviceInochi Amaoto
The SG2044 top syscon device provide PLL clock control and some other misc feature of the SoC. Add the compatible string for SG2044 top syscon device. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250418020325.421257-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-07dt-bindings: clock: sophgo: Use precise compatible for CV1800 series SoCInochi Amaoto
As previous binding uses a wildcard compatible for existed clock device of CV1800 series SoC, it is not suitable for existed requirement. The only exception is sophgo,sg2000-clk, it does match a real device, so keep it as is. Add new precise compatible for existed clock devices of CV1800 series SoCs and make old wildcard compatible deprecated. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250504104553.1447819-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-06dt-bindings: clock: Drop st,stm32h7-rcc.txtRob Herring (Arm)
The binding is already covered by st,stm32-rcc.yaml. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250505161933.1432791-1-robh@kernel.org Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-05-06dt-bindings: clock: convert bcm2835-aux-clock to yamlStefan Wahren
Convert the DT binding document for BCM2835 auxiliary peripheral clock from .txt to YAML. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250503080949.3945-1-wahrenst@gmx.net Acked-by: Conor Dooley <conor.dooley@microchip.com> [sboyd@kernel.org: Drop aux label] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-05-06dt-bindings: clock: Drop maxim,max77686.txtRob Herring (Arm)
The clock binding for Maxim MAX77686/MAX77802/MAX77620 is already covered by mfd/maxim,max77686.yaml. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250505161943.1433081-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-05-06dt-bindings: arm: qcom: Add Asus Zenbook A14Aleksandrs Vinarskis
Document the X1E-78-100 and X1P-42-100/X1-26-100 variants. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Link: https://lore.kernel.org/r/20250426130203.37659-3-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-06dt-bindings: interrupt-controller: Convert opencores,or1k-pic to DT schemaRob Herring (Arm)
Convert the OpenRISC PIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
2025-05-06dt-bindings: media: convert imx.txt to yaml formatFrank Li
Convert binding doc imx.txt to yaml format. Create two yaml files: fsl,imx6-mipi-csi2.yaml and fsl,imx-capture-subsystem.yaml. Additional changes: - add example for fsl,imx6-mipi-csi2 - add irq err1 and err2 description - update MAINTAINERS Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> [hverkuil: drop empty line at the end of the yaml files]
2025-05-06media: dt-bindings: sony,imx290: Update usage exampleNiklas Söderlund
Since commit 98e0500eadb7 ("media: i2c: imx290: Add configurable link frequency and pixel rate") the driver expects two specific link-frequency settings 2-lane (445500000, 297000000) and 4-lane (222750000, 148500000) operation. The driver fails to probe without these exact settings. Update the example in the bindings to match this to make it easier for users to incorporate this sensor in their device tree descriptions without having to read the driver sources when the driver fails to probe. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-06media: dt-bindings: sony,imx415: update maintainer e-mail addressMichael Riesch
I recently left WolfVision but would like to continue to maintain the Sony IMX415 image sensor driver. Update my e-mail address. Signed-off-by: Michael Riesch <michael.riesch@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-06media: dt-bindings: Add ST VD55G1 camera sensorBenjamin Mugnier
Also update MAINTAINERS file accordingly. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Benjamin Mugnier <benjamin.mugnier@foss.st.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-06media: dt-bindings: Add ST VD56G3 camera sensorSylvain Petinot
Add devicetree bindings Documentation for ST VD56G3 & ST VD66GY camera sensors. Update MAINTAINERS file. Signed-off-by: Sylvain Petinot <sylvain.petinot@foss.st.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-06media: dt-bindings: Add OmniVision OV02C10Bryan O'Donoghue
Extend the ov02e10 bindings yaml to describe the ov02c10 sensor which has the same bindings with a different compat string and different i2c address only. Other differences in sensor capabilities exist but are not expressed in devicetree. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> [hverkuil: fix typos: 0V02C10 -> OV02C10] [hverkuil: fix type: Ominivision -> OmniVision]
2025-05-06Merge drm/drm-next into drm-misc-nextThomas Zimmermann
Backmerging drm-next to get fixes from v6.15-rc5. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2025-05-06BackMerge tag 'v6.15-rc5' into drm-nextDave Airlie
Linux 6.15-rc5, requested by tzimmerman for fixes required in drm-next. Signed-off-by: Dave Airlie <airlied@redhat.com>
2025-05-05dt-bindings: net: ethernet-controller: Add informative text about RGMII delaysAndrew Lunn
Device Tree and Ethernet MAC driver writers often misunderstand RGMII delays. Rewrite the Normative section in terms of the PCB, is the PCB adding the 2ns delay. This meaning was previous implied by the definition, but often wrongly interpreted due to the ambiguous wording and looking at the definition from the wrong perspective. The new definition concentrates clearly on the hardware, and should be less ambiguous. Add an Informative section to the end of the binding describing in detail what the four RGMII delays mean. This expands on just the PCB meaning, adding in the implications for the MAC and PHY. Additionally, when the MAC or PHY needs to add a delay, which is software configuration, describe how Linux does this, in the hope of reducing errors. Make it clear other users of device tree binding may implement the software configuration in other ways while still conforming to the binding. Fixes: 9d3de3c58347 ("dt-bindings: net: Add YAML schemas for the generic Ethernet options") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250430-v6-15-rc3-net-rgmii-delays-v2-1-099ae651d5e5@lunn.ch Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-06AsoC: Phase out hybrid PCI devresMark Brown
Merge series from Philipp Stanner <phasta@kernel.org>: A year ago we spent quite some work trying to get PCI into better shape. Some pci_ functions can be sometimes managed with devres, which is obviously bad. We want to provide an obvious API, where pci_ functions are never, and pcim_ functions are always managed. Thus, everyone enabling his device with pcim_enable_device() must be ported to pcim_ functions. Porting all users will later enable us to significantly simplify parts of the PCI subsystem. See here [1] for details. This patch series does that for sound. Feel free to squash the commits as you see fit. P. [1] https://elixir.bootlin.com/linux/v6.14-rc4/source/drivers/pci/devres.c#L18
2025-05-05dt-bindings: arm: bcm2835: Add Raspberry Pi 2 (2nd rev)Stefan Wahren
Add the Raspberry Pi 2 (2nd rev) based on BCM2837 to DT schema. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250418143307.59235-2-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-05-05dt-bindings: reset: sophgo: Add SG2044 bindings.Inochi Amaoto
The SG2044 shares the same reset controller as SG2042, so it is just enough to use the compatible string of SG2042 as a basis. Add compatible string for the reset controller of SG2044. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/20250413223507.46480-6-inochiama@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-05-05dt-bindings: reset: Document RZ/V2H(P) USB2PHY resetLad Prabhakar
Add a device tree binding document for the Renesas RZ/V2H(P) USB2PHY reset controller. This block manages the reset and power-down of the USB 2.0 PHY, which is used in both host and function modes. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Link: https://lore.kernel.org/r/20250415195131.281060-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-05-05dt-bindings: arm: amlogic: add S805Y and Mi TV StickFerass El Hafidi
Add support for the Amlogic S805Y SoC and the Xiaomi Mi TV Stick (aka. xiaomi-aquaman). The S805Y is very similar to the S805X, with just a few minor differences. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org> Link: https://lore.kernel.org/r/20250502-aquaman-v6-1-f1af347d9709@postmarketos.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-05-05dt-bindings: rng: rockchip,rk3588-rng: add rk3576-rng compatibleNicolas Frattaroli
The RK3576 SoC contains another standalone TRNG implementation. While the register map and hardware is different, it has the same clocks/interrupts/resets as the RK3588's TRNG, so can go in the same binding. Add the compatible and generalise the title/description of the binding some more. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05dt-bindings: display: panel: Add BOE TD4320Barnabás Czémán
Document BOE TD4320 6.3" 2340x1080 panel found in Xiaomi Redmi Note 7 smartphone. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20250430-lavender-panel-v3-1-7625e62d62b2@mainlining.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250430-lavender-panel-v3-1-7625e62d62b2@mainlining.org
2025-05-05Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux v6.15-rc5Herbert Xu
Merge mainline to pick up bcachefs poly1305 patch 4bf4b5046de0 ("bcachefs: use library APIs for ChaCha20 and Poly1305"). This is a prerequisite for removing the poly1305 shash algorithm.
2025-05-04dt-bindings: hwinfo: Add VIA/WonderMedia SoC identificationAlexey Charkov
VIA/WonderMedia SoC's have a chip ID register inside their system configuration controller space, which can be used to identify appropriate hardware quirks at runtime. Add binding for it. Signed-off-by: Alexey Charkov <alchark@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250503-wmt-soc-driver-v3-1-2daa9056fa10@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-04dt-bindings: opp: Add v2-qcom-adreno vendor bindingsAkhil P Oommen
Add a new schema which extends opp-v2 to support a new vendor specific property required for Adreno GPUs found in Qualcomm's SoCs. The new property called "qcom,opp-acd-level" carries a u32 value recommended for each opp needs to be shared to GMU during runtime. Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml. Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Tested-by: Maya Matuszczyk <maccraft123mc@gmail.com> Tested-by: Anthony Ruhier <aruhier@mailbox.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649351/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2025-05-04dt-bindings: display: rockchip,inno-hdmi: Document GRF for RK3036 HDMIAndy Yan
HDMI on RK3036 use GRF control the HSYNC/VSYNC polarity, but this part is missing when it first landing upstream. Document that it is mandatory for RK3036 HDMI. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250422070455.432666-3-andyshrk@163.com
2025-05-04dt-bindings: display: rockchip,inno-hdmi: Fix Document of RK3036 compatibleAndy Yan
The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled first before normal DDC communication can be carried out. Therefore, both RK3036 and RK3128 HDMI require two identical clocks. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250422070455.432666-2-andyshrk@163.com
2025-05-03dt-bindings: display: ltk500hd1829: add port propertyHeiko Stuebner
The panel can be connected to via graph nodes, so allow the port property. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250430082850.244199-3-heiko@sntech.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-03dt-bindings: display: ltk050h3146w: add port propertyHeiko Stuebner
The panel can be connected to via graph nodes, so allow the port property. This fixes dtc checker warnings like: >> arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-haikou-video-demo.dtb: panel@0 (leadtek,ltk050h3148w): 'port' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/display/panel/leadtek,ltk050h3146w.yaml# arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-haikou-video-demo.dtb: /edp@fdec0000: failed to match any schema with compatible: ['rockchip,rk3588-edp'] Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202504300218.VDqQqGTT-lkp@intel.com/ Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250430082850.244199-2-heiko@sntech.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02Merge tag 'spi-fix-v6.15-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A fairly small pile of fixes, plus one new compatible string addition to the Synopsis driver for a new platform. The most notable thing is the fix for divide by zeros in spi-mem if an operation has no dummy bytes" * tag 'spi-fix-v6.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: tegra114: Don't fail set_cs_timing when delays are zero spi: spi-qpic-snand: fix NAND_READ_LOCATION_2 register handling spi: spi-mem: Add fix to avoid divide error spi: dt-bindings: snps,dw-apb-ssi: Add compatible for SOPHGO SG2042 SoC spi: dt-bindings: snps,dw-apb-ssi: Merge duplicate compatible entry spi: spi-qpic-snand: propagate errors from qcom_spi_block_erase() spi: stm32-ospi: Fix an error handling path in stm32_ospi_probe()
2025-05-03dt-bindings: sram: sunxi-sram: Add A523 compatibleYixun Lan
The Allwinner A523 family of SoCs have their "system control" registers compatible to the A64 SoC, so add the new SoC specific compatible string. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Yixun Lan <dlan@gentoo.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-1-6fc000bbccbd@gentoo.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-02dt-bindings: pwm: add support for MC33XS2410Dimitri Fedrau
Adding documentation for NXPs MC33XS2410 high side switch. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Link: https://lore.kernel.org/r/20250407-mc33xs2410-v9-1-57adcb56a6e4@liebherr.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-05-02dt-bindings: arm: ti: Add Toradex Verdin AM62PFrancesco Dolcini
Add toradex,verdin-am62p for Toradex Verdin AM62 SoM, its nonwifi and wifi variants, and the Toradex carrier board they may be mated in. Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250430102815.149162-2-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2025-05-02dt-bindings: media: renesas,isp: Add ISP core function blockNiklas Söderlund
Some R-Car ISP instances have in addition to the channel selector (CS) an ISP core (CORE) to perform operations on an image stream. The core function is mapped to a different memory region and has a separate interrupt than CS, extend the bindings to allow describing this. On the same SoC different instances of the ISP IP may have, or not have, the CORE functionality. The CS function on all instances on the SoC are the same and the documentation describes the full ISP (CS + CORE) as a single IP block. Where instances not having the CORE function simply lack the functionality to modify the image data. There are dependencies on the CS functionality while operating the CORE functionality. In order for the ISP core to function in memory-to-memory mode it needs to be feed input data from a Streaming Bridge interface. This interface is provided thru the VSP-X device. Add an optional new property "renesas,vspx" to provide a phandle to describe this relationship. While adding mandatory reg-names and interrupt-names breaks existing bindings the driver itself remains backward compatible and provides CS functionality if a single unnamed reg and interrupt property is present. Furthermore all existing users of the bindings are updated in following work to add these new mandatory properties. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250423163113.2961049-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-02dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS acceleratorVikash Garodia
Document the IRIS video decoder/encoder accelerator found in the QCS8300 platform. It belongs to same iris v3 family as that of SM8550 but is a downscaled version of SM8550. It has 2 frame processing hardware blocks while SM8550 has 4. Thereby QCS8300 have fewer capabilities than those of SM8550. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-02dt-bindings: media: qcom,sm8550-iris: document SM8650 IRIS acceleratorNeil Armstrong
Document the IRIS video decoder and encoder accelerator found in the SM8650 platform, it requires 2 more reset lines in addition to the properties required for the SM8550 platform. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x1e Dell Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-05-01dt-bindings: arm: psci: change labels to lower-case in exampleKrzysztof Kozlowski
DTS coding style expects labels to be lowercase, so adjust the example code. No functional impact. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250501150934.77317-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-01dt-bindings: net: via-rhine: Convert to YAMLAlexey Charkov
Rewrite the textual description for the VIA Rhine platform Ethernet controller as YAML schema, and switch the filename to follow the compatible string. These are used in several VIA/WonderMedia SoCs Signed-off-by: Alexey Charkov <alchark@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250430-rhine-binding-v2-1-4290156c0f57@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-02dt-bindings: display: msm: document DSI controller and phy on SA8775PAyushi Makhija
Document DSI controller and phy on SA8775P platform. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649839/ Link: https://lore.kernel.org/r/20250424062431.2040692-4-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: msm: dsi-controller-main: document the SA8775P DSI CTRLAyushi Makhija
Document the DSI CTRL on the SA8775P Platform. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649855/ Link: https://lore.kernel.org/r/20250424062431.2040692-3-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display: msm-dsi-phy-7nm: document the SA8775P DSI PHYAyushi Makhija
Document the DSI PHY on the SA8775P Platform. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649838/ Link: https://lore.kernel.org/r/20250424062431.2040692-2-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc pathKonrad Dybcio
There's a separate path that allows register access from CPUSS. Describe it. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/641464/ Link: https://lore.kernel.org/r/20250306-topic-dt_bindings_fixups-v1-2-0c84aceb0ef9@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display/msm: Add Qualcomm SAR2130PDmitry Baryshkov
Describe the Mobile Display SubSystem (MDSS) device present on the Qualcomm SAR2130P platform. It looks pretty close to SM8550 on the system level. SAR2130P features two DSI hosts and single DisplayPort controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649265/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-5-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-01dt-bindings: net: sun8i-emac: Add A523 EMAC0 compatibleYixun Lan
Allwinner A523 SoC variant (A527/T527) contains an "EMAC0" Ethernet MAC compatible to the A64 version. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-2-6fc000bbccbd@gentoo.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-02dt-bindings: display/msm: qcom,sc7280-dpu: describe SAR2130PDmitry Baryshkov
Describe DPU controller present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649254/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-4-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display/msm: dsi-phy-7nm: describe SAR2130PDmitry Baryshkov
Describe MIPI DSI PHY present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649252/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-3-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-02dt-bindings: display/msm: dsi-controller-main: describe SAR2130PDmitry Baryshkov
Describe MIPI DSI controller present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/649250/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-2-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
generated by cgit (git 2.34.1) at 2025-07-18 16:35:16 +0000