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2023-04-12dmaengine: idxd: add per wq PRS disableDave Jiang
Add sysfs knob for per wq Page Request Service disable. This knob disables PRS support for the specific wq. When this bit is set, it also overrides the wq's block on fault enabling. Tested-by: Tony Zhu <tony.zhu@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Co-developed-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Link: https://lore.kernel.org/r/20230407203143.2189681-17-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dmaengine: idxd: add pid to exported sysfs attribute for opened fileDave Jiang
Provide the pid of the application for the opened file. This allows the monitor daemon to easily correlate which app opened the file and easily kill the app by pid if that is desired action. Tested-by: Tony Zhu <tony.zhu@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Co-developed-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Link: https://lore.kernel.org/r/20230407203143.2189681-16-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dmaengine: idxd: expose fault counters to sysfsDave Jiang
Expose cr_faults and cr_fault_failures counters to the user space. This allows a user app to keep track of how many fault the application is causing with the completion record (CR) and also the number of failures of the CR writeback. Having a high number of cr_fault_failures is bad as the app is submitting descriptors with the CR addresses that are bad. User monitoring daemon may want to consider killing the application as it may be malicious and attempting to flood the device event log. Tested-by: Tony Zhu <tony.zhu@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Co-developed-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Link: https://lore.kernel.org/r/20230407203143.2189681-15-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dmaengine: idxd: add event log size sysfs attributeDave Jiang
Add support for changing of the event log size. Event log is a feature added to DSA 2.0 hardware to improve error reporting. It supersedes the SWERROR register on DSA 1.0 hardware and hope to prevent loss of reported errors. The error log size determines how many error entries supported for the device. It can be configured by the user via sysfs attribute. Tested-by: Tony Zhu <tony.zhu@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Co-developed-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Link: https://lore.kernel.org/r/20230407203143.2189681-3-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: dma: snps,dw-axi-dmac: constrain the items of resets for JH7110 dmaWalker Chen
The DMA controller needs two reset items to work properly on JH7110 SoC, so there is need to constrain the items' value to 2, other platforms have 1 reset item at most. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Walker Chen <walker.chen@starfivetech.com> Link: https://lore.kernel.org/r/20230322094820.24738-2-walker.chen@starfivetech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: dma: Drop unneeded quotesRob Herring
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230331182141.1900348-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9GSiddharth Vadapalli
The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports additional PHY modes like QSGMII. Add a compatible for it. Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230315092408.1722114-1-s-vadapalli@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: phy: mediatek: hdmi-phy: Add mt8195 compatibleGuillaume Ranquet
Add a compatible for the HDMI PHY on MT8195 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Link: https://lore.kernel.org/r/20220919-v8-1-a84c80468fe9@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: phy: ti,phy-j721e-wiz: document clock-output-namesKrzysztof Kozlowski
Document the clock-output-names property of clock children, even though the nodes are actually deprecated, to fix dtbs_check warnings like: k3-j7200-common-proc-board.dtb: wiz@5060000: refclk-dig: 'clock-output-names' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230404190115.546973-5-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: phy: ti,phy-j721e-wiz: drop assigned-clocksKrzysztof Kozlowski
The meta schema from DT schema already defines assigned-clocks, so there is no need for device schema to mention it at all. There are also no benefits of having it here and a board could actually need more of clock assignments than the schema allows. Keep however the assigned-clocks in children nodes, as apparently their proper parenting is required. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230404190115.546973-4-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: phy: ti,phy-am654-serdes: drop assigned-clocks typeKrzysztof Kozlowski
The meta schema from DT schema already defines assigned-clocks, so there is no need for device schema to mention it at all. The specific parenting of the first input and output clock is apparently important, thus keep them as required, but without defining type. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230404190115.546973-3-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: phy: cadence-torrent: drop assigned-clocksKrzysztof Kozlowski
The meta schema from DT schema already defines assigned-clocks, so there is no need for device schema to mention it at all. There are also no benefits of having it here and a board could actually need more of clock assignments than the schema allows. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230404190115.546973-2-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: phy: cadence-sierra: drop assigned-clocksKrzysztof Kozlowski
The meta schema from DT schema already defines assigned-clocks, so there is no need for device schema to mention it at all. There are also no benefits of having it here and a board could actually need more of clock assignments than the schema allows. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230404190115.546973-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: phy: qmp-ufs: describe the UFS PHY for sa8775pBartosz Golaszewski
Add a new compatible for the QMP UFS PHY found on sa8775p platforms and update the clocks property to accommodate three clocks. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230411130446.401440-3-brgl@bgdev.pl Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12dt-bindings: iommu: Convert QCOM IOMMU to YAMLKonrad Dybcio
Convert the Qualcomm IOMMU bindings to YAML. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230406-topic-qciommu-v3-1-aa0e4f018191@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-04-12Merge tag 'drm-misc-next-2023-04-12' of ↵Daniel Vetter
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v6.4-rc1: Cross-subsystem Changes: - Convert MIPI DSIM bridge dt to yaml. Core Changes: - Fix UAF race in drm scheduler. Driver Changes: - Add primary plane positioning support to VKMS. - Convert omapdrm fbdev emulation to in-kernel client. - Assorted small fixes to vkms, vc4, nouveau, vmwgfx. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b7c37d4e-8f16-85dc-0f5f-3bd98f961395@linux.intel.com
2023-04-12dt-bindings: PCI: qcom: Document msi-map and msi-map-mask propertiesManivannan Sadhasivam
The Qcom PCIe controller is capable of using either internal MSI controller or the external GIC-ITS for signaling MSIs sent by endpoint devices. Currently, the binding only documents the internal MSI implementation. Let's document the GIC-ITS imeplementation by making use of msi-map and msi-map-mask properties. Only one of the implementation should be used at a time and the drivers can choose the preferred one. Link: https://lore.kernel.org/r/20230411121442.22227-1-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org>
2023-04-12dt-bindings: PCI: qcom: Add SM8550 compatibleAbel Vesa
Add the SM8550 platform to the binding. Link: https://lore.kernel.org/r/20230320144658.1794991-1-abel.vesa@linaro.org Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
2023-04-12Merge tag 'qcom-pinctrl-6.4' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel Qualcomm pinctrl Devicetree bindings changes for v6.4 Cleanup and improvement of the bindings to use "unevaluatedProperties" instead of "additionalProperties", which allows to accept all the properties already parsed by referenced common qcom,tlmm-common.yaml schema. That common qcom,tlmm-common.yaml binding is going to remove "input-enable" property, thus using "unevaluatedProperties" allows such change to propagate to other bindings automatically.
2023-04-12ASoC: ep93xx: Add I2S descriptionAlexander Sverdlin
Add device tree bindings for Cirrus Logic EP93xx internal SoCs' I2S controller. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230411165951.2335899-1-alexander.sverdlin@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-04-12dt-bindings: mfd: dlg,da9063: document voltage monitoringBenjamin Bara
Document that the da9063 only provides under- *and* over-voltage monitoring in one, and therefore requires both to be configured with the same severity and value. Add an example for clarification. Signed-off-by: Benjamin Bara <benjamin.bara@skidata.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Adam Ward <DLG-Adam.Ward.opensource@dm.renesas.com> Link: https://lore.kernel.org/r/20230403-da9063-disable-unused-v3-3-cc4dc698864c@skidata.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-04-12dt-bindings: pinctrl: qcom,sm8550-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-40-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sm8450-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-39-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sm8350-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-38-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sm8250: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-37-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sm8150: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-36-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sm6375-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-34-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sm6350-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-33-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sm6125-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-32-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sm6115-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-31-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sdx65-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-30-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sdx55: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-29-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sdm845: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. This also fixes warnings like: sdm845-cheza-r1.dtb: pinctrl@3400000: qspi-sleep-state: 'oneOf' conditional failed, one must be fixed: 'output-disable' does not match any of the regexes: 'pinctrl-[0-9]+' Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-28-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sdm670-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-27-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sdm630: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-26-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sc8180x-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-24-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sc7280-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. This also fixes warnings like: sc7280-herobrine-evoker.dtb: pinctrl@f100000: qspi-sleep-state: 'oneOf' conditional failed, one must be fixed: 'output-disable' does not match any of the regexes: 'pinctrl-[0-9]+' Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-23-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sc7180-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. This also fixes warnings like: c7180-trogdor-coachz-r1.dtb: pinctrl@3500000: qspi-sleep-state: 'oneOf' conditional failed, one must be fixed: 'output-disable' does not match any of the regexes: 'pinctrl-[0-9]+' Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-22-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,sa8775p-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-21-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,qdu1000-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-20-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,qcs404: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-19-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8998: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-17-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8996: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-16-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8994: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-15-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8976: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-14-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8974: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-13-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8960: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-12-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8953: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-11-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8916: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-10-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12dt-bindings: pinctrl: qcom,msm8909-tlmm: simplify with unevaluatedPropertiesKrzysztof Kozlowski
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230407184546.161168-9-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
generated by cgit (git 2.34.1) at 2025-07-18 21:31:07 +0000