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2025-01-08Documentation ABI: add PPS generators documentationRodolfo Giometti
This patch adds the documentation for the ABI between the Linux kernel and userspace regarding the PPS generators. Signed-off-by: Rodolfo Giometti <giometti@enneenne.com> Link: https://lore.kernel.org/r/20241108073115.759039-5-giometti@enneenne.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-01-08Documentation pps.rst: add PPS generators documentationRodolfo Giometti
This patch adds some examples about how to register a new PPS generator in the system, and how to manage it. Signed-off-by: Rodolfo Giometti <giometti@enneenne.com> Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com> Link: https://lore.kernel.org/r/20241108073115.759039-4-giometti@enneenne.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-01-08drivers pps: add PPS generators supportRodolfo Giometti
Sometimes one needs to be able not only to catch PPS signals but to produce them also. For example, running a distributed simulation, which requires computers' clock to be synchronized very tightly. This patch adds PPS generators class in order to have a well-defined interface for these devices. Signed-off-by: Rodolfo Giometti <giometti@enneenne.com> Link: https://lore.kernel.org/r/20241108073115.759039-2-giometti@enneenne.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-01-08dt-bindings: arm: rockchip: Add Radxa E52CFUKAUMI Naoki
Add devicetree binding for the Radxa E52C. Radxa E52C is a compact network computer based on the Rockchip RK3582 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20241226024630.13702-2-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-01-08ASoC: Merge up v6.13-rc6Mark Brown
This helps several of my boards in CI.
2025-01-08dt-bindings: arm: rockchip: Add BigTreeTech CB2 and Pi2Ivan Sergeev
BigTreeTech CB2 and Pi2 are Rockchip RK3566 based boards Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Ivan Sergeev <ivan8215145640@gmail.com> Link: https://lore.kernel.org/r/20250106-bigtreetech-cb2-v7-1-565567e2c0a4@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-01-08dt-bindings: arm: rockchip: Add H96 Max V58 TV boxAlexey Charkov
Add Devicetree binding for H96 Max V58: a compact Rockchip RK3588 based device that ships with Android and is meant for use as a TV connected media box. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250108-rk3588-h96-max-v58-v2-1-522301b905d6@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-01-08Documentation: Update the behaviour of "kvm-arm.mode"Mostafa Saleh
Commit 5053c3f0519c ("KVM: arm64: Use hVHE in pKVM by default on CPUs with VHE support") modified the behaviour of "kvm-arm.mode=protected" without the updating the kernel parameters doc. Update it to match the current implementation. Also, update required architecture version for nested virtualization as suggested by Marc. Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Signed-off-by: Mostafa Saleh <smostafa@google.com> Link: https://lore.kernel.org/r/20241025093259.2216093-1-smostafa@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-01-08dt-bindings: arm: rockchip: Add rk3576 evb1 boardKever Yang
Add device tree documentation for rk3576-evb1-v10. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250107074911.550057-7-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-01-08dt-bindings: arm: rockchip: Sort for boards not in correct orderKever Yang
The board entries should be sort in correct order by the description string. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250107074911.550057-6-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-01-08dt-bindings: pwm: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20250107125831.225068-1-krzysztof.kozlowski@linaro.org Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-01-07dt-bindings: clock: move qcom,x1e80100-camcc to its own fileBryan O'Donoghue
Add an x1e80100 camcc binding. x1e80100 has two power-domain parents unlike other similar camcc controllers. Differentiate the new structure into a unique camcc definition. Other similar camcc controller setups can then be easily added to this one. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20250102-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v3-2-cb66d55d20cc@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-07dt-bindings: clock: qcom,rpmcc: Add MSM8940 compatibleDaniil Titov
Document the qcom,rpmcc-msm8940 compatible. Signed-off-by: Daniil Titov <daniilt971@gmail.com> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241231-rpmcc-v1-3-1212df9b2042@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-07dt-bindings: clock: qcom,rpmcc: Add MSM8937 compatibleDaniil Titov
Document the qcom,rpmcc-msm8937 compatible. Signed-off-by: Daniil Titov <daniilt971@gmail.com> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241231-rpmcc-v1-1-1212df9b2042@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-07dt-bindings: clock: Add Qualcomm SM6115 LPASS clock controllerKonrad Dybcio
SM6115 (and its derivatives or similar SoCs) has an LPASS clock controller block which provides audio-related resets. Add bindings for it. Cc: Konrad Dybcio <konradybcio@kernel.org> Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> [alexey.klimov slightly changed the commit message] Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org> Link: https://lore.kernel.org/r/20241212002551.2902954-2-alexey.klimov@linaro.org [bjorn: Adjusted Konrad's address] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-07dt-bindings: cache: qcom,llcc: Add IPQ5424 compatibleVaradarajan Narayanan
Document the Last Level Cache Controller on IPQ5424. The 'broadcast' register space is present only in chipsets that have multiple instances of LLCC IP. Since IPQ5424 has only one instance, both the LLCC and LLCC_BROADCAST points to the same register space. Hence, allow only '1' reg & reg-names entry for IPQ5424. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20241121051935.1055222-2-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-07i40e: add ability to reset VF for Tx and Rx MDD eventsAleksandr Loktionov
Implement "mdd-auto-reset-vf" priv-flag to handle Tx and Rx MDD events for VFs. This flag is also used in other network adapters like ICE. Usage: - "on" - The problematic VF will be automatically reset if a malformed descriptor is detected. - "off" - The problematic VF will be disabled. In cases where a VF sends malformed packets classified as malicious, it can cause the Tx queue to freeze, rendering it unusable for several minutes. When an MDD event occurs, this new implementation allows for a graceful VF reset to quickly restore operational state. Currently, VF queues are disabled if an MDD event occurs. This patch adds the ability to reset the VF if a Tx or Rx MDD event occurs. It also includes MDD event logging throttling to avoid dmesg pollution and unifies the format of Tx and Rx MDD messages. Note: Standard message rate limiting functions like dev_info_ratelimited() do not meet our requirements. Custom rate limiting is implemented, please see the code for details. Co-developed-by: Jan Sokolowski <jan.sokolowski@intel.com> Signed-off-by: Jan Sokolowski <jan.sokolowski@intel.com> Co-developed-by: Padraig J Connolly <padraig.j.connolly@intel.com> Signed-off-by: Padraig J Connolly <padraig.j.connolly@intel.com> Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Reviewed-by: Michal Schmidt <mschmidt@redhat.com> Tested-by: Rafal Romanowski <rafal.romanowski@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Link: https://patch.msgid.link/20250106221929.956999-13-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-01-07netlink: specs: rt_link: decode ip6tnl, vti and vti6 link attrsJakub Kicinski
Some of our tests load vti and ip6tnl so not being able to decode the link attrs gets in the way of using Python YNL for testing. Decode link attributes for ip6tnl, vti and vti6. ip6tnl uses IFLA_IPTUN_FLAGS as u32, while ipv4 and sit expect a u16 attribute, so we have a (first?) subset type override... Reviewed-by: Donald Hunter <donald.hunter@gmail.com> Acked-by: Stanislav Fomichev <sdf@fomichev.me> Link: https://patch.msgid.link/20250107022820.2087101-4-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-01-07Merge tag 'for-netdev' of ↵Jakub Kicinski
https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next Daniel Borkmann says: ==================== pull-request: bpf-next 2025-01-07 We've added 7 non-merge commits during the last 32 day(s) which contain a total of 11 files changed, 190 insertions(+), 103 deletions(-). The main changes are: 1) Migrate the test_xdp_meta.sh BPF selftest into test_progs framework, from Bastien Curutchet. 2) Add ability to configure head/tailroom for netkit devices, from Daniel Borkmann. 3) Fixes and improvements to the xdp_hw_metadata selftest, from Song Yoong Siang. * tag 'for-netdev' of https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next: selftests/bpf: Extend netkit tests to validate set {head,tail}room netkit: Add add netkit {head,tail}room to rt_link.yaml netkit: Allow for configuring needed_{head,tail}room selftests/bpf: Migrate test_xdp_meta.sh into xdp_context_test_run.c selftests/bpf: test_xdp_meta: Rename BPF sections selftests/bpf: Enable Tx hwtstamp in xdp_hw_metadata selftests/bpf: Actuate tx_metadata_len in xdp_hw_metadata ==================== Link: https://patch.msgid.link/20250107130908.143644-1-daniel@iogearbox.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-01-07dt-bindings: samsung,mipi-dsim: Add imx7d specific compatibleAlexander Stein
This add a imx7(d) specific compatible which is compatible to imx8mm. This silences the dtbs_check warning: arch/arm/boot/dts/nxp/imx/imx7s-mba7.dtb: dsi@30760000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx7d-mipi-dsim', 'fsl,imx8mm-mipi-dsim'] is too long Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250107094943.518474-3-alexander.stein@ew.tq-group.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: i2c: qcom-cci: Document x1e80100 compatibleBryan O'Donoghue
Add the x1e80100 CCI device string compatible. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-1-06fdd5a7d5bb@linaro.org Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07dt-bindings: i2c: exynos5: Add samsung,exynos8895-hsi2c compatibleIvaylo Ivanov
Add samsung,exynos8895-hsi2c dedicated compatible for representing I2C of Exynos8895 SoC. Since there are I2C buses that aren't implemented as a part of USIv1 blocks, they only require a single clock. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241228111509.896502-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07dt-bindings: i2c: renesas,riic: Document the R9A09G047 supportBiju Das
Document support for the I2C Bus Interface (RIIC) found in the Renesas RZ/G3E (R9A09G047) SoC. This IP is compatible with Renesas RZ/V2H (R9A09G057) RIIC IP. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20241216202436.185773-1-biju.das.jz@bp.renesas.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-01-07dt-bindings: clock: xilinx: Add reset GPIO for VCURohit Visavalia
It is marked as optional as some of the ZynqMP designs are having vcu_reset (reset pin of VCU IP) driven by proc_sys_reset, proc_sys_reset is another PL IP driven by the PS pl_reset. So, here the VCU reset is not driven by axi_gpio or PS GPIO so there will be no GPIO entry. Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com> Link: https://lore.kernel.org/r/20250107044038.100945-3-rohit.visavalia@amd.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-01-07dt-bindings: clock: xilinx: Convert VCU bindings to dtschemaRohit Visavalia
Convert AMD (Xilinx) VCU bindings to yaml format. Additional changes: - move xlnx_vcu DT binding to clock from soc following commit a2fe7baa27a4 ("clk: xilinx: move xlnx_vcu clock driver from soc") - corrected clock sequence as per xilinx device-tree generator Signed-off-by: Rohit Visavalia <rohit.visavalia@xilinx.com> Link: https://lore.kernel.org/r/20250107044038.100945-2-rohit.visavalia@amd.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-01-07Merge tag 'renesas-clk-for-v6.14-tag2' of ↵Stephen Boyd
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas Pull Renesas clk driver updates from Geert Uytterhoeven: - Add support for the RZ/G3E (R9A09G047) SoC - Add Module Stop (MSTOP) support on RZ/V2H - Add Image Signal Processor helper block (FCPVX and VSPX) clocks on R-Car V4H SoC - Add System Controller (SYS) reset and Generic Interrupt Controller (GIC) clock and reset entries on RZ/V2H * tag 'renesas-clk-for-v6.14-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: dt-bindings: clock: renesas,r9a08g045-vbattb: Fix include guard clk: renesas: r9a09g057: Add clock and reset entries for GIC clk: renesas: r9a09g057: Add reset entry for SYS clk: renesas: r8a779g0: Add VSPX clocks clk: renesas: r8a779g0: Add FCPVX clocks clk: renesas: r9a09g047: Add I2C clocks/resets clk: renesas: r9a09g047: Add CA55 core clocks clk: renesas: rzv2h: Add support for RZ/G3E SoC clk: renesas: rzv2h: Add MSTOP support dt-bindings: clock: renesas: Document RZ/G3E SoC CPG dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants
2025-01-07dt-bindings: soc: altera: convert socfpga-system.txt to yamlNiravkumar L Rabara
Convert socfpga-system.txt to altr,socfpga-sys-mgr.yaml and move to soc directory. Add platform names in description for clarity. ARM(32-bit) platforms Cyclone5, Arria5 and Arria10 is using "altr,sys-mgr" compatible, while ARM64 is using "altr,sys-mgr-s10" compatible. Removed "cpu1-start-addr" for ARM64 as it is not required. Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Link: https://lore.kernel.org/r/20250107105129.2784203-1-niravkumar.l.rabara@intel.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07ASoC: codecs: Add aw88083 amplifier driverMark Brown
Merge series from wangweidong.a@awinic.com: Add the awinic,aw88083 property to support the aw88083 chip. The driver is for amplifiers aw88083 of Awinic Technology Corporation. The AW88083 is an intelligent digital audio amplifier with low noise.
2025-01-07hwmon: (pmbus/adm1275) add adm1273 supportJohn Erasmus Mari Geronimo
Add support for adm1273 which is similar to adm1275 and other chips of the series. Signed-off-by: John Erasmus Mari Geronimo <johnerasmusmari.geronimo@analog.com> Link: https://lore.kernel.org/r/20250106131740.305988-3-johnerasmusmari.geronimo@analog.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-01-07dt-bindings: hwmon: adm1275: add adm1273John Erasmus Mari Geronimo
Add support for the adm1273 Hot-Swap Controller and Digital Power and Energy Monitor Signed-off-by: John Erasmus Mari Geronimo <johnerasmusmari.geronimo@analog.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250106131740.305988-2-johnerasmusmari.geronimo@analog.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-01-07KVM: s390: Reject KVM_SET_GSI_ROUTING on ucontrol VMsChristoph Schlameuss
Prevent null pointer dereference when processing KVM_IRQ_ROUTING_S390_ADAPTER routing entries. The ioctl cannot be processed for ucontrol VMs. Fixes: f65470661f36 ("KVM: s390/interrupt: do not pin adapter interrupt pages") Signed-off-by: Christoph Schlameuss <schlameuss@linux.ibm.com> Tested-by: Hariharan Mari <hari55@linux.ibm.com> Reviewed-by: Hariharan Mari <hari55@linux.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Link: https://lore.kernel.org/r/20241216092140.329196-4-schlameuss@linux.ibm.com Message-ID: <20241216092140.329196-4-schlameuss@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2025-01-07KVM: s390: Reject setting flic pfault attributes on ucontrol VMsChristoph Schlameuss
Prevent null pointer dereference when processing the KVM_DEV_FLIC_APF_ENABLE and KVM_DEV_FLIC_APF_DISABLE_WAIT ioctls in the interrupt controller. Fixes: 3c038e6be0e2 ("KVM: async_pf: Async page fault support on s390") Reported-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Signed-off-by: Christoph Schlameuss <schlameuss@linux.ibm.com> Reviewed-by: Hariharan Mari <hari55@linux.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Link: https://lore.kernel.org/r/20241216092140.329196-2-schlameuss@linux.ibm.com Message-ID: <20241216092140.329196-2-schlameuss@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2025-01-07dt-bindings: interrupt-controller: qcom,pdc: Document SM8750 PDCMelody Olvera
Document the PDC block on the SM8750 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Link: https://lore.kernel.org/r/20241204-sm8750_master_pdc-v1-1-3a06cb62a28f@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: memory-controller: qca,ath79-ddr-controller: Drop consumer from ↵Rob Herring (Arm)
example Normal practice is examples only show what the binding document defines and doesn't include consumers in a provider example (or vice-versa). The "qca,ddr-wb-channel-interrupts" and "qca,ddr-wb-channels" properties are also not yet documented by a schema, so avoid (not yet enabled) warnings on them by dropping the interrupt-controller node from the example. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20250103212448.2852884-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: sram: qcom,imem: Document MSM8976AngeloGioacchino Del Regno
Add compatible for MSM8976 IMEM. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221111120156.48040-5-angelogioacchino.delregno@collabora.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: thermal: qcom-tsens: Document ipq6018 temperature sensorRayyan Ansari
Document the ipq6018 temperature sensor, which is used in ipq6018.dtsi and is compatible with the ipq8074 temperature sensor. Signed-off-by: Rayyan Ansari <rayyan.ansari@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240716133803.82907-1-rayyan.ansari@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: qcom,pdc: document QCS8300 Power Domain ControllerJingyi Wang
Document Power Domain Controller for Qualcomm QCS8300. PDC is included in QCS8300 SoC. This controller acts as an interrupt controller, enabling the detection of interrupts when the GIC is non-operational. Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240911-qcs8300_binding-v2-1-de8641b3eaa1@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: qcom,pdc: document QCS615 Power Domain ControllerLijuan Gao
Add a compatible for the Power Domain Controller on QCS615 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/r/20241104-add_initial_support_for_qcs615-v5-2-9dde8d7b80b0@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07ASoC: dt-bindings: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. While touching the lines do other non-functional changes: replace raw number with proper define for GPIO flag and use generic node name. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250107125901.227995-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-01-07iommu/arm-smmu: Re-enable context caching in smmu reset operationBibek Kumar Patro
Default MMU-500 reset operation disables context caching in prefetch buffer. It is however expected for context banks using the ACTLR register to retain their prefetch value during reset and runtime suspend. Add config 'ARM_SMMU_MMU_500_CPRE_ERRATA' to gate this errata workaround in default MMU-500 reset operation which defaults to 'Y' and provide option to disable workaround for context caching in prefetch buffer as and when needed. Suggested-by: Will Deacon <will@kernel.org> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com> Link: https://lore.kernel.org/r/20241212151402.159102-2-quic_bibekkum@quicinc.com Signed-off-by: Will Deacon <will@kernel.org>
2025-01-07xfrm: Support ESN context update to hardware for TXJianbo Liu
Previously xfrm_dev_state_advance_esn() was added for RX only. But it's possible that ESN context also need to be synced to hardware for TX, so call it for outbound in this patch. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
2025-01-07dt-bindings: mediatek,mt6779-keypad: add more compatiblesVal Packett
Add compatibles for SoCs using this device (mt8183, mt8365, mt8516). Signed-off-by: Val Packett <val@packett.cool> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20241225192631.25017-2-val@packett.cool Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-01-07dt-bindings: display: mediatek: ovl: Modify rules for MT8195/MT8188Hsiao Chien Sung
Modify rules for both MT8195 and MT8188. Hardware capabilities include color formats and AFBC are changed since MT8195, stop using the settings of MT8183. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://lore.kernel.org/r/20241219181531.4282-3-jason-jh.lin@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-01-07dt-bindings: display: mediatek: ovl: Add compatible strings for MT8188 MDP3Jason-JH.Lin
Add compatible strings for the MDP3 OVL hardware components in MediaTek's MT8188 SoC and it is compatible with the existing MT8195 MDP OVL components. Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241219181531.4282-2-jason-jh.lin@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-01-07dt-bindings: arm: mediatek: Drop MT8192 Chromebook variants that never shippedChen-Yu Tsai
The Hayato rev5 sku2 and Spherion rev4 variants were designed in anticipation of shortages of the headphone codec. This never happened. As far as our records show: the variants were never produced or shipped, and no such devices were deployed to any lab. Drop them. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241224084839.2904335-1-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-01-07media: dt-bindings: trivial white-space and example cleanupKrzysztof Kozlowski
Minor cleanups without funcitonal impact: - There should not be an empty blank line after SPDX tag, - Convention is to indent DTS examples in coding style with 2- or 4-space indentation (4 is preferred), - Drop unused labels in DTS examples. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-01-06hwmon: (nct6683) Add another customer ID for MSIJohn Audia
The new customer ID was found on a MPG X870E CARBON WIFI (MS-7E49) with a NCT6687D chip. Signed-off-by: John Audia <therealgraysky@proton.me> [groeck: Resolved conflicts in Documentation/hwmon/nct6683.rst] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-01-06dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatibleRichard Acayan
The camera clocks on SDM670 and SDM845 have no significant differences that would require a change in the clock controller driver. The only difference is the clock frequency at each level of the power domains, which is not specified in the clock driver. There should still be a compatible specific to the SoC, so add the compatible for SDM670 with the SDM845 compatible as fallback. Link: https://android.googlesource.com/kernel/msm/+/d4dc50c0a9291bd99895d4844f973421c047d267/drivers/clk/qcom/camcc-sdm845.c#2048 Suggested-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Suggested-by: Konrad Dybcio <konradybcio@kernel.org> Link: https://lore.kernel.org/linux-arm-msm/7d26a62b-b898-4737-bd53-f49821e3b471@linaro.org Signed-off-by: Richard Acayan <mailingradian@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241218231729.270137-8-mailingradian@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-06dt-bindings: clock: qcom,mmcc: support LVDS PLL input for apq8064Dmitry Baryshkov
APQ8064 / MSM8960 have separate LVDS PLL driving the LVDS / LCDC clock. Add corresponding input to clock controller bindings. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241224-apq8064-fix-mmcc-v1-1-c95d2e2bf143@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-06dt-bindings: clock: st,stm32mp1-rcc: complete the reference pathDario Binacchi
All other paths referenced in the file follow a scheme starting from the Linux root. The patch adjusts the single file that deviated from this scheme, making it consistent with the others. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20241231150144.4035938-2-dario.binacchi@amarulasolutions.com Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
generated by cgit (git 2.34.1) at 2025-07-19 12:02:01 +0000