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2025-05-13dt-bindings: interrupt-controller: Convert google,goldfish-pic to DT schemaRob Herring (Arm)
Convert the Google Goldfish PIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144658.1289158-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert ezchip,nps400-ic to DT schemaRob Herring (Arm)
Convert the EZchip NPS interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144649.1288786-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert csky,mpintc to DT schemaRob Herring (Arm)
Convert the C-SKY Multi-processor interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144640.1288458-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert csky,apb-intc to DT schemaRob Herring (Arm)
Convert the C-SKY APB interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144636.1288261-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert cirrus,ep7209-intc to DT schemaRob Herring (Arm)
Convert the Cirrus EP7209 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144631.1288086-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert brcm,bcm6345-l1-intc to DT schemaRob Herring (Arm)
Convert the Broadcom BCM6345 interrupt controller binding to schema format. The old schema indicated SoC specific compatibles should be present, but there are none in use. So drop them. The most number of CPUs on any platform seems to be 2, so document that as the maximum. Link: https://lore.kernel.org/r/20250505144622.1287712-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert arm,nvic to DT schemaRob Herring (Arm)
Convert the Arm NVIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144553.1286730-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert amazon,al-fic to DT schemaRob Herring (Arm)
Convert the Amazon FIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144548.1286525-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert al,alpine-msix to DT schemaRob Herring (Arm)
Convert the Amazaon Alpine MSIX controller binding to schema format. Drop the interrupt-controller property as the MSIX controller doesn't provide interrupts. The interrupt-parent property is required in this case for custom MSI mapping properties. Link: https://lore.kernel.org/r/20250505144543.1286351-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert abilis,tb10x-ictl to DT schemaRob Herring (Arm)
Convert the Abilis TB10x interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144534.1286092-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert microchip,pic32mzda-evic to DT schemaRob Herring (Arm)
Convert the Microchip PIC32 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250505144754.1291072-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert chrp,open-pic to DT schemaRob Herring (Arm)
Convert the Open PIC interrupt controller binding to schema format. While the Linux kernel supports the "open-pic" compatible, that's not used in any upstream .dts file. It used for "device_type" though. Add "fsl,mpic" compatible which was not documented. Link: https://lore.kernel.org/r/20250505144809.1291619-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert cdns,xtensa-{mx,pic} to DT schemaRob Herring (Arm)
Convert the Xtensa interrupt controller bindings to DT schema. Both only vary by the compatible string, so combine them into 1 schema doc. Acked-by: Max Filippov <jcmvbkbc@gmail.com> Link: https://lore.kernel.org/r/20250505144626.1287879-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert ti,cp-intc to DT schemaRob Herring (Arm)
Convert the TI Common Platform interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20250505144903.1293558-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert aspeed,ast2xxx-scu-ic to DT schemaRob Herring (Arm)
Convert the Aspeed SCU interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144613.1287360-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert aspeed,ast2400-i2c-ic to DT schemaRob Herring (Arm)
Convert the Aspeed I2C interrupt controller binding to schema format. Drop the "#address-cells" and "#size-cells" as they are unused and incorrect anyways. Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/r/20250505144605.1287121-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert faraday,ftintc010 to DT schemaRob Herring (Arm)
Convert the Faraday FTINTC010 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250505144654.1288979-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert arm,versatile-fpga-irq to DT schemaRob Herring (Arm)
Convert the Arm Versatile FPGA interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250505144558.1286889-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert marvell,orion-bridge-intc to DT ↵Rob Herring (Arm)
schema Convert the Marvell Orion bridge interrupt controller binding to schema format. marvell,orion-intc is already covered by mrvl,intc.yaml schema, so it can be dropped. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250505144743.1290672-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert brcm,bcm2835-armctrl-ic to DT schemaRob Herring (Arm)
Convert the Broadcom BCM2835 ARMCTRL interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144618.1287539-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert cnxt,cx92755-ic to DT schemaRob Herring (Arm)
Convert the Conexant Digicolor interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Acked-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/20250505144644.1288617-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: Move altr,msi-controller to interrupt-controller directoryRob Herring (Arm)
While altr,msi-controller is used with PCI, it is not a PCI host bridge and is just an MSI provider. Move it with other MSI providers in the 'interrupt-controller' directory. Acked-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250507154253.1593870-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13Documentation: scheduler: Changed lowercase acronyms to uppercaseJake Rice
Everywhere else in this doc, the dispatch queue acronym (DSQ) is uppercase. There were a couple places where the acronym was written in lowercase. I changed them to uppercase to make it homogeneous. Signed-off-by: Jake Rice <jake@jakerice.dev> Signed-off-by: Tejun Heo <tj@kernel.org>
2025-05-13dt-bindings: display: msm: correct example in SM8350 MDSS schemaDmitry Baryshkov
Fix the interconnects in the example to follow the schema changes. Fixes: 60b8d3a2365a ("dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc path") Reported-by: Rob Herring <robh@kernel.org> Closes: http://lore.kernel.org/r/CAL_JsqKr8Xd8uxFzE0YJTyD+V6N++VV8SX-GB5Xt0_BKkeoGUQ@mail.gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/651775/ Link: https://lore.kernel.org/r/20250505-sm8350-fix-example-v1-1-36d5d9ccba66@oss.qualcomm.com
2025-05-13docs: bpf: Fix bullet point formatting warningKhaled Elnaggar
Fix indentation for a bullet list item in bpf_iterators.rst. According to reStructuredText rules, bullet list item bodies must be consistently indented relative to the bullet. The indentation of the first line after the bullet determines the alignment for the rest of the item body. Reported by smatch: /linux/Documentation/bpf/bpf_iterators.rst:55: WARNING: Bullet list ends without a blank line; unexpected unindent. [docutils] Fixes: 7220eabff8cb ("bpf, docs: document open-coded BPF iterators") Signed-off-by: Khaled Elnaggar <khaledelnaggarlinux@gmail.com> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20250513015901.475207-1-khaledelnaggarlinux@gmail.com
2025-05-13f2fs: fix 32-bits hexademical number in fault injection docChao Yu
FAULT_KMALLOC 0x000000001 There is one redundant '0' in 32-bits hexademical number of fault type, remove it. Signed-off-by: Chao Yu <chao@kernel.org> Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>
2025-05-13dt-bindings: cache: Convert marvell,tauros2-cache to DT schemaRob Herring (Arm)
Convert the Marvell Tauros2 Cache binding to DT schema. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-13dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schemaRob Herring (Arm)
Convert the Marvell Feroceon/Kirkwood Cache binding to DT schema format. Use "marvell,kirkwood-cache" for the filename instead as that's only compatible used in a .dts upstream. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-13Documentation/gpu: Disambiguate SPI termBagas Sanjaya
Documentation/userspace-api/media/glossary.rst:170: WARNING: duplicate term description of SPI, other instance in gpu/amdgpu/amdgpu-glossary That's because SPI of amdgpu (Shader Processor Input) shares the same global glossary term as SPI of media subsystem (which is Serial Peripheral Interface Bus). Disambiguate the former from the latter to fix the warning. Note that adding context qualifiers in the term is strictly necessary in order to make Sphinx happy. Fixes: dd3d035a7838 ("Documentation/gpu: Add new entries to amdgpu glossary") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Closes: https://lore.kernel.org/linux-next/20250509185845.60bf5e7b@canb.auug.org.au/ Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-13Merge tag 'ib-mfd-gpio-nvmem-v6.16' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into gpio/for-next Immutable branch between MFD, GPIO and NVMEM due for the v6.16 merge window
2025-05-13gpu: nova-core: define registers layout using helper macroAlexandre Courbot
Add the register!() macro, which defines a given register's layout and provide bit-field accessors with a way to convert them to a given type. This macro will allow us to make clear definitions of the registers and manipulate their fields safely. The long-term goal is to eventually move it to the kernel crate so it can be used by other drivers as well, but it was agreed to first land it into nova-core and make it mature there. To illustrate its usage, use it to define the layout for the Boot0 (renamed to NV_PMC_BOOT_0 to match OpenRM's naming scheme) and take advantage of its accessors. Suggested-by: Danilo Krummrich <dakr@kernel.org> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Link: https://lore.kernel.org/r/20250507-nova-frts-v3-5-fcb02749754d@nvidia.com [ Fix typo in commit message. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-05-13dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs8300Lijuan Gao
Correct the gpio-ranges in the QCS8300 TLMM pin controller example to include the UFS_RESET pin, which is expected to be wired to the reset pin of the primary UFS memory. This allows the UFS driver to toggle it. Fixes: 5778535972e2 ("dt-bindings: pinctrl: describe qcs8300-tlmm") Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/20250506-correct_gpio_ranges-v3-2-49a7d292befa@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-13dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs615Lijuan Gao
Correct the gpio-ranges in the QCS615 TLMM pin controller example to include the UFS_RESET pin, which is expected to be wired to the reset pin of the primary UFS memory. This allows the UFS driver to toggle it. Fixes: 55c487ea6084 ("dt-bindings: pinctrl: document the QCS615 Top Level Mode Multiplexer") Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/20250506-correct_gpio_ranges-v3-1-49a7d292befa@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-13cpufreq: intel_pstate: Document hybrid processor supportRafael J. Wysocki
Describe the support for hybrid processors in intel_pstate, including the CAS and EAS support, in the admin-guide documentation. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1935040.CQOukoFCf9@rjwysocki.net
2025-05-13PM: EM: Documentation: Fix typos in example driver codeAtul Kumar Pant
Fix the API name to free the allocated table in the example driver code that modifies the EM. Also fix the passing of correct table when updating the cost. Signed-off-by: Atul Kumar Pant <atulpant.linux@gmail.com> Link: https://patch.msgid.link/20250511071141.13237-1-atulpant.linux@gmail.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-05-13dt-bindings: arm: sunxi: Add Liontron H-A133L board nameAndre Przywara
The Liontron H-A133L is an industrial development board using the Allwinner A133 SoC. Add its compatible name to the list of valid board names. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250505164729.18175-3-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-13dt-bindings: vendor-prefixes: Add Liontron nameAndre Przywara
Liontron is a company based in Shenzen, China, making industrial development boards and embedded computers, mostly using Rockchip and Allwinner SoCs. Add their name to the list of vendors. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250505164729.18175-2-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-13net: enable driver support for netmem TXMina Almasry
Drivers need to make sure not to pass netmem dma-addrs to the dma-mapping API in order to support netmem TX. Add helpers and netmem_dma_*() helpers that enables special handling of netmem dma-addrs that drivers can use. Document in netmem.rst what drivers need to do to support netmem TX. Signed-off-by: Mina Almasry <almasrymina@google.com> Acked-by: Stanislav Fomichev <sdf@fomichev.me> Link: https://patch.msgid.link/20250508004830.4100853-7-almasrymina@google.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-05-13net: add devmem TCP TX documentationMina Almasry
Add documentation outlining the usage and details of the devmem TCP TX API. Signed-off-by: Mina Almasry <almasrymina@google.com> Acked-by: Stanislav Fomichev <sdf@fomichev.me> Link: https://patch.msgid.link/20250508004830.4100853-6-almasrymina@google.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-05-13net: devmem: TCP tx netlink apiStanislav Fomichev
Add bind-tx netlink call to attach dmabuf for TX; queue is not required, only ifindex and dmabuf fd for attachment. Signed-off-by: Stanislav Fomichev <sdf@fomichev.me> Signed-off-by: Mina Almasry <almasrymina@google.com> Link: https://patch.msgid.link/20250508004830.4100853-4-almasrymina@google.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-05-13Merge commit 'its-for-linus-20250509-merge' into x86/core, to resolve conflictsIngo Molnar
Conflicts: Documentation/admin-guide/hw-vuln/index.rst arch/x86/include/asm/cpufeatures.h arch/x86/kernel/alternative.c arch/x86/kernel/cpu/bugs.c arch/x86/kernel/cpu/common.c drivers/base/cpu.c include/linux/cpu.h Signed-off-by: Ingo Molnar <mingo@kernel.org>
2025-05-13Merge branch 'x86/platform' into x86/core, to merge dependent commitsIngo Molnar
Prepare to resolve conflicts with an upstream series of fixes that conflict with pending x86 changes: 6f5bf947bab0 Merge tag 'its-for-linus-20250509' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Signed-off-by: Ingo Molnar <mingo@kernel.org>
2025-05-13Merge branch 'x86/microcode' into x86/core, to merge dependent commitsIngo Molnar
Prepare to resolve conflicts with an upstream series of fixes that conflict with pending x86 changes: 6f5bf947bab0 Merge tag 'its-for-linus-20250509' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Signed-off-by: Ingo Molnar <mingo@kernel.org>
2025-05-13dt-bindings: soc: samsung: exynos-pmu: gs101: add google,pmu-intr-gen phandlePeter Griffin
gs101 requires access to the pmu interrupt generation register region which is exposed as a syscon. Update the exynos-pmu bindings documentation to reflect this. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-2-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-13dt-bindings: soc: google: Add gs101-pmu-intr-gen binding documentationPeter Griffin
Add bindings documentation for the Power Management Unit (PMU) interrupt generator. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-1-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-13Documentation: fix typo in root= kernel parameter descriptionPetr Vaněk
Fixes a typo in the root= parameter description, changing "this a a" to "this is a". Fixes: c0c1a7dcb6f5 ("init: move the nfs/cifs/ram special cases out of name_to_dev_t") Signed-off-by: Petr Vaněk <arkamar@atlas.cz> Link: https://lore.kernel.org/20250512110827.32530-1-arkamar@atlas.cz Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Christian Brauner <brauner@kernel.org>
2025-05-12docs/mm/damon/design: fix spelling mistakeThushara.M.S
The word accuracy was misspelled as "accruracy". Signed-off-by: Thushara.M.S <thusharms@gmail.com> Reviewed-by: SeongJae Park <sj@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-05-12Documentation: KHO: add memblock bindingsMike Rapoport (Microsoft)
We introduced KHO into Linux: A framework that allows Linux to pass metadata and memory across kexec from Linux to Linux. KHO reuses fdt as file format and shares a lot of the same properties of firmware-to- Linux boot formats: It needs a stable, documented ABI that allows for forward and backward compatibility as well as versioning. As first user of KHO, we introduced memblock which can now preserve memory ranges reserved with reserve_mem command line options contents across kexec, so you can use the post-kexec kernel to read traces from the pre-kexec kernel. This patch adds memblock schemas similar to "device" device tree ones to a new kho bindings directory. This allows us to force contributors to document the data that moves across KHO kexecs and catch breaking change during review. Link: https://lkml.kernel.org/r/20250509074635.3187114-18-changyuanl@google.com Co-developed-by: Alexander Graf <graf@amazon.com> Signed-off-by: Alexander Graf <graf@amazon.com> Signed-off-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Signed-off-by: Changyuan Lyu <changyuanl@google.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Anthony Yznaga <anthony.yznaga@oracle.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Ashish Kalra <ashish.kalra@amd.com> Cc: Ben Herrenschmidt <benh@kernel.crashing.org> Cc: Borislav Betkov <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Eric Biederman <ebiederm@xmission.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Gowans <jgowans@amazon.com> Cc: Jason Gunthorpe <jgg@nvidia.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Marc Rutland <mark.rutland@arm.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Pasha Tatashin <pasha.tatashin@soleen.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Pratyush Yadav <ptyadav@amazon.de> Cc: Rob Herring <robh@kernel.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Thomas Gleinxer <tglx@linutronix.de> Cc: Thomas Lendacky <thomas.lendacky@amd.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-05-12Documentation: add documentation for KHOAlexander Graf
With KHO in place, let's add documentation that describes what it is and how to use it. Link: https://lkml.kernel.org/r/20250509074635.3187114-17-changyuanl@google.com Signed-off-by: Alexander Graf <graf@amazon.com> Co-developed-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Signed-off-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Co-developed-by: Changyuan Lyu <changyuanl@google.com> Signed-off-by: Changyuan Lyu <changyuanl@google.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Anthony Yznaga <anthony.yznaga@oracle.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Ashish Kalra <ashish.kalra@amd.com> Cc: Ben Herrenschmidt <benh@kernel.crashing.org> Cc: Borislav Betkov <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Eric Biederman <ebiederm@xmission.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Gowans <jgowans@amazon.com> Cc: Jason Gunthorpe <jgg@nvidia.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Marc Rutland <mark.rutland@arm.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Pasha Tatashin <pasha.tatashin@soleen.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Pratyush Yadav <ptyadav@amazon.de> Cc: Rob Herring <robh@kernel.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Stanislav Kinsburskii <skinsburskii@linux.microsoft.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Thomas Gleinxer <tglx@linutronix.de> Cc: Thomas Lendacky <thomas.lendacky@amd.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-05-12mm: add max swappiness arg to lru_gen for anonymous memory onlyZhongkun He
The MGLRU already supports reclaiming only from anonymous memory via the /sys/kernel/debug/lru_gen interface. Now, memory.reclaim also supports the swappiness=max parameter to enable reclaiming solely from anonymous memory. To unify the semantics of proactive reclaiming from anonymous folios, the max parameter is introduced. [hezhongkun.hzk@bytedance.com: use strcmp instead of strncmp, if swappiness is not set, use the default value] Link: https://lkml.kernel.org/r/20250507071057.3184240-1-hezhongkun.hzk@bytedance.com [akpm@linux-foundation.org: tweak coding style] Link: https://lkml.kernel.org/r/65181f7745d657d664d833c26d8a94cae40538b9.1745225696.git.hezhongkun.hzk@bytedance.com Signed-off-by: Zhongkun He <hezhongkun.hzk@bytedance.com> Acked-by: Muchun Song <muchun.song@linux.dev> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Michal Hocko <mhocko@suse.com> Cc: Yosry Ahmed <yosry.ahmed@linux.dev> Cc: Yu Zhao <yuzhao@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
generated by cgit (git 2.34.1) at 2025-07-18 03:42:40 +0000