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2025-04-23netlink: specs: rt-link: remove duplicated group in attr listJakub Kicinski
group is listed twice for newlink. Reviewed-by: Donald Hunter <donald.hunter@gmail.com> Link: https://patch.msgid.link/20250418021706.1967583-5-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-23netlink: specs: rt-link: remove if-netnsid from attr listJakub Kicinski
if-netnsid an alias to target-netnsid: IFLA_TARGET_NETNSID = IFLA_IF_NETNSID, /* new alias */ We don't have a definition for this attr. Reviewed-by: Donald Hunter <donald.hunter@gmail.com> Link: https://patch.msgid.link/20250418021706.1967583-4-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-23netlink: specs: rt-link: remove the fixed members from attrsJakub Kicinski
The purpose of the attribute list is to list the attributes which will be included in a given message to shrink the objects for families with huge attr spaces. Fixed headers are always present in their entirety (between netlink header and the attrs) so there's no point in listing their members. Current C codegen doesn't expect them and tries to look them up in the attribute space. Reviewed-by: Donald Hunter <donald.hunter@gmail.com> Link: https://patch.msgid.link/20250418021706.1967583-3-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-23netlink: specs: allow header properties for attribute setsJakub Kicinski
rt-link has a number of disjoint headers, plus it uses attributes of other families (e.g. DPLL). Allow declaring a attribute set as "foreign" by specifying which header its definition is coming from. Reviewed-by: Donald Hunter <donald.hunter@gmail.com> Link: https://patch.msgid.link/20250418021706.1967583-2-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-23dt-bindings: interrupt-controller: via,vt8500-intc: Convert to YAMLAlexey Charkov
Rewrite the textual description for the VIA/WonderMedia interrupt controller as YAML schema. The original textual version did not contain information about the usage of 'interrupts' to describe the connection of a chained controller to its parent, add it here. A chained controller can trigger up to 8 different interrupts (IRQ0~7) on its parent. Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250418-via_intc_binding-v2-1-b649ce737f71@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-23dt-bindings: arm/cpus: allow up to 3 interconnects entriesNeil Armstrong
Allow up to 3 entries as used on the Qualcomm SM8650 CPU nodes. This fixes the following errors: cpu@0: interconnects: [[7, 3, 3, 7, 15, 3], [8, 0, 3, 8, 1, 3], [9, 0, 9, 1]] is too long Fixes: 791a3fcd2345 ("dt-bindings: arm/cpus: Add missing properties") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250418-topic-sm8x50-upstream-cpu-icc-max3-v1-1-87d9c2713d72@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-23dt-bindings: display: Add Sitronix ST7571 LCD ControllerMarcus Folkesson
Sitronix ST7571 is a dot matrix LCD controller supporting both 4bit grayscale and monochrome LCDs. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Link: https://lore.kernel.org/r/20250423-st7571-v6-1-e9519e3c4ec4@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-04-23dt-bindings: wireless: qcom,wcnss: Use wireless-controller.yamlDavid Heidelberg
Reference wireless-controller.yaml schema, so we can use properties as local-mac-address or mac-address. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-5-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: wireless: silabs,wfx: Use wireless-controller.yamlJanne Grunau
Instead listing local-mac-address and mac-address properties, reference wireless-controller.yaml schema. The schema brings in constraints for the property checked during `make dtbs_check`. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Jérôme Pouiller <jerome.pouiller@silabs.com> Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-4-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: wireless: bcm4329-fmac: Use wireless-controller.yaml schemaJanne Grunau
The wireless-controller schema specifies local-mac-address as used in the bcm4329-fmac device nodes of Apple silicon devices (arch/arm64/boot/dts/apple). Fixes `make dtbs_check` for those devices. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-3-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: net: Add generic wireless controllerDavid Heidelberg
Wireless controllers share the common properties. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-2-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: net: Add network-class schema for mac-address propertiesJanne Grunau
The ethernet-controller schema specifies "mac-address" and "local-mac-address" but other network devices such as wireless network adapters use mac addresses as well. The Devicetree Specification, Release v0.3 specifies in section 4.3.1 a generic "Network Class Binding" with "address-bits", "mac-address", "local-mac-address" and "max-frame-size". This schema specifies the "address-bits" property and moves the remaining properties over from the ethernet-controller.yaml schema. The "max-frame-size" property is used to describe the maximal payload size despite its name. Keep the description from ethernet-controller specifying this property as MTU. The contradictory description in the Devicetree Specification is ignored. Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-1-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: soc: qcom,rpmh-rsc: Limit power-domains requirementKonrad Dybcio
Certain platforms (such as Chrome SDM845 and SC7180 with a TF-A running as secure firmware) do not have a OSI-mode capable PSCI implementation. That in turn means the PSCI-associated power domain which represents the system's power state can't provide enough feedback to the RSC device. Don't require power-domains on platforms where this may be the case. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-1-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-23dt-bindings: power: rockchip: Add support for RK3562 SoCFinley Xiao
According to a description from TRM, add all the power domains. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250415032314.44997-1-kever.yang@rock-chips.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-04-23regulator: max20086: Fixes chip id and enable gpioMark Brown
Merge series from João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>: I'm working on integrating a system with a MAX20086 and noticed these small issues in the driver: the chip ID for MAX20086 is 0x30 and not 0x40. Also, in my use case, the enable pin is always enabled by hardware, so the enable GPIO isn't needed. Without these changes, the driver fails to probe.
2025-04-23Add RK3576 SAI Audio Controller SupportMark Brown
Merge series from Nicolas Frattaroli <nicolas.frattaroli@collabora.com>: This series adds support for Rockchip's Serial Audio Interface (SAI) controller, found on SoCs such as the RK3576. The SAI is a flexible controller IP that allows both transmitting and receiving digital audio in the I2S, TDM and PCM formats. Instances of this controller are used both for externally exposed audio interfaces, as well as for audio on video interfaces such as HDMI.
2025-04-23dt-bindings: pinctrl: convert fsl,imx7ulp-pinctrl.txt to yaml formatFrank Li
Convert fsl,imx7ulp-pinctrl.txt to yaml format. Additional changes: - remove label in example - fsl,pin direct use hex value instead of macro because macro define in dts local directory. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250417152158.3570936-1-Frank.Li@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-23media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G3E SoCTommaso Merciai
The CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC has five interrupts: - image_conv: image_conv irq - axi_mst_err: AXI master error level irq - vd_addr_wend: Video data AXI master addr 0 write end irq - sd_addr_wend: Statistics data AXI master addr 0 write end irq - vsd_addr_wend: Video statistics data AXI master addr 0 write end irq This IP has only one input port 'port@1' similar to the RZ/G2UL CRU. Document the CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-4-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G3E CSI-2 blockTommaso Merciai
Document the CSI-2 block which is part of CRU found in Renesas RZ/G3E SoC. The CSI-2 block on the RZ/G3E SoC is identical to one found on the RZ/V2H(P) SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-3-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoCLad Prabhakar
The MIPI CSI-2 block on the Renesas RZ/V2H(P) SoC is similar to the one found on the Renesas RZ/G2L SoC, with the following differences: - A different D-PHY - Additional registers for the MIPI CSI-2 link - Only two clocks Add a new compatible string, `renesas,r9a09g057-csi2`, for the RZ/V2H(P) SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-2-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: media: renesas,fcp: Document RZ/V2H(P) SoCLad Prabhakar
The FCPVD block on the RZ/V2H(P) SoC is identical to the one found on the RZ/G2L SoC. No driver changes are required, as `renesas,fcpv` will be used as a fallback compatible string on the RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20250408193158.80936-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: media: renesas,vsp1: Document RZ/V2H(P)Lad Prabhakar
The VSPD block on the RZ/V2H(P) SoC is identical to the one found on the RZ/G2L SoC. No driver changes are required, as `renesas,r9a07g044-vsp2` will be used as a fallback compatible string on the RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20250408193158.80936-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23dt-bindings: pinctrl: spacemit: add clock and reset propertyYixun Lan
SpacemiT K1 SoC's pinctrl controller requires two clocks in order to work properly, also has one reset line from hardware perspective. Signed-off-by: Yixun Lan <dlan@gentoo.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250416-02-k1-pinctrl-clk-v2-1-2b5fcbd4183c@gentoo.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-23dt-bindings: power: mediatek: Support Dimensity 1200 MT6893 MTCMOSAngeloGioacchino Del Regno
Add support for the Power Domains (MTCMOS) integrated into the MediaTek Dimensity 1200 (MT6893) SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <mbrugger@suse.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250410143944.475773-2-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-04-22dt-bindings: net: Document support for Renesas RZ/V2H(P) GBETHLad Prabhakar
GBETH IP on the Renesas RZ/V2H(P) SoC is integrated with Synopsys DesignWare MAC (version 5.20). Document the device tree bindings for the GBETH glue layer. Generic compatible string 'renesas,rzv2h-gbeth' is added since this module is identical on both the RZ/V2H(P) and RZ/G3E SoCs. The Rx/Tx clocks supplied for GBETH on the RZ/V2H(P) SoC is depicted below: Rx / Tx -------+------------- on / off ------- | | Rx-180 / Tx-180 +---- not ---- on / off ------- Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250417084015.74154-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-22dt-bindings: net: dwmac: Increase 'maxItems' for 'interrupts' and ↵Lad Prabhakar
'interrupt-names' Increase the `maxItems` value for the `interrupts` and `interrupt-names` properties to 11 to support additional per-channel Tx/Rx completion interrupts on the Renesas RZ/V2H(P) SoC, which features the `snps,dwmac-5.20` IP. Refactor the `interrupt-names` property by replacing repeated `enum` entries with a `oneOf` list. Add support for per-channel receive and transmit completion interrupts using regex patterns. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250417084015.74154-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-22dt-bindings: net: dp83822: add constraints for mac-termination-ohmsDimitri Fedrau
Property mac-termination-ohms is defined in ethernet-phy.yaml. Add allowed values for the property. Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250416-dp83822-mac-impedance-v3-2-028ac426cddb@liebherr.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-22dt-bindings: net: ethernet-phy: add property mac-termination-ohmsDimitri Fedrau
Add property mac-termination-ohms in the device tree bindings for selecting the resistance value of the builtin series termination resistors of the PHY. Changing the resistance to an appropriate value can reduce signal reflections and therefore improve signal quality. Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250416-dp83822-mac-impedance-v3-1-028ac426cddb@liebherr.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-22dt-bindings: display: imx: convert fsl,tcon.txt to yaml formatFrank Li
Convert fsl,tcon.txt to yaml format. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Link: https://lore.kernel.org/r/20250417151134.3569837-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: fsl: convert m4if.txt and tigerp.txt to yaml formatFrank Li
Convert m4if.txt and tigerp.txt to yaml format. These just use reg to indicate memory region. Additional changes: - Add compatible string fsl,imx51-aipstz. - Add fsl,imx53-tigerp and fail back to fsl,imx51-tigerp - Add compatible string fsl,imx7d-pcie-phy, which is not real phy and just indicate a memory region. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250417150608.3569512-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: display: imx: convert ldb.txt to yaml formatFrank Li
Convert ldb.txt to yaml format. Additional changes - fix clock-names order to match existed dts file. - remove lvds-panel and iomuxc-gpr node in examples. - fsl,imx6q-ldb fail back to fsl,imx53-ldb. - add fsl,panel property to match existed dts. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250417145742.3568572-1-Frank.Li@nxp.com [robh: Use #/properties/port schema for port] Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: powerpc: Convert fsl/pmc.txt to YAMLJ. Neuschäfer
This patch rewrites pmc.txt into YAML format. Descriptive texts are expanded or shortened in a few places to better fit today's conventions. The list of compatible strings (and combinations of them) is based on existing device trees in arch/powerpc as well as compatible strings already mentioned in the plain-text version of the binding. One thing I didn't handle are soc-clk@... nodes as seen in arch/powerpc/boot/dts/fsl/pq3-power.dtsi. They are also ignored by Linux drivers. Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/r/20250417-fslpmc-yaml-v3-1-b3eccd389176@posteo.net Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: virtio: pci-iommu: Add ref to pci-device.yamlRob Herring (Arm)
The virtio pci-iommu is a PCI device, so it should have a reference to the pci-device.yaml schema. The pci-device.yaml schema defines the 'reg' format as a schema, so the text description for 'reg' can be dropped. Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Link: https://lore.kernel.org/r/20250407165341.2934499-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: backlight: add TI LP8864/LP8866 LED-backlight driversAlexander Sverdlin
Add bindings for Texas Instruments' LP8864/LP8866 LED-backlight drivers. Note that multiple channels in these models are used for load-balancing and brightness is controlled gobally, so from a user perspective it's only one LED. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Link: https://lore.kernel.org/r/20241218210829.73191-2-alexander.sverdlin@siemens.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: display: imx: convert fsl-imx-drm.txt to yaml formatFrank Li
Convert fsl-imx-drm.txt to yaml format and create 5 yaml files for differences purpose. Additional changes: - add missed include file in examples. - add clocks, clock-names for ipu. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250415212943.3400852-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: interrupt-controller: Add missed fsl tzic controllerFrank Li
Add missed fsl tzic interrupt controller binding doc. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250415154859.3381515-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: remove RZ/N1S bindingsWolfram Sang
Except for these four quite random bindings, no further upstream activity has been observed in the last 8 years. So, remove these fragments to reduce maintenance burden. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20250411194849.11067-2-wsa+renesas@sang-engineering.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: Remove obsolete numa.txtRob Herring (Arm)
The NUMA binding is now covered by the dtschema numa-distance-map-v1.yaml and CPU and memory node schemas with all the relevant descriptions moved to them. Link: https://lore.kernel.org/r/20250410201325.962203-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: Remove obsolete cpu-topology.txtRob Herring (Arm)
The cpu topology binding is now covered by the dtschema cpu-map.yaml schema with all the relevant descriptions moved to it. Link: https://lore.kernel.org/r/20250410201325.962203-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: counter: Convert ftm-quaddec.txt to yaml formatFrank Li
Convert ftm-quaddec.txt to yaml format. Additional changes: - Remove "status" at example. - Remove label at example. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250410222509.3242241-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: cpufreq: Drop redundant Mediatek bindingRob Herring (Arm)
The Mediatek CPUFreq binding document just describes properties from the CPU node which the driver uses. This is redundant as all the properties are described in the arm/cpus.yaml schema. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-17-63d7dc9ddd0a@kernel.org
2025-04-22dt-bindings: arm/cpus: Add power-domains constraintsRob Herring (Arm)
The "power-domains" and "power-domains-names" properties are missing any constraints. Add the constraints and drop the generic descriptions. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-16-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: arm/cpus: Add missing propertiesRob Herring (Arm)
The Arm CPU schema is missing a number of properties already in use. This has gone unnoticed as extra properties have not been restricted. Add a missing reference to cpu.yaml, and add all the missing properties. As "clock-latency" and "voltage-tolerance" are related to opp-v1, add those properties to the opp-v1.yaml schema. With this, other properties can be prevented from creeping in with 'unevaluatedProperties: false'. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-15-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: Reference opp-v1 schema in CPU schemasRob Herring (Arm)
The opp-v1 binding is only used in MIPS and arm32 CPU nodes, so add a $ref to it in the CPU schemas and drop the "select". As opp-v1 has long been deprecated, mark it as such. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-14-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: arm/cpus: Re-wrap 'description' entriesRob Herring (Arm)
Some of the 'description' entries have odd line wrapping and incorrect YAML block modifiers. The 'description' entries should typically wrap at 80 chars. Reformat the entries to follow that along with using '>' modifiers as appropriate. Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-13-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: arm/cpus: Add schemas for "enable-method" dependenciesRob Herring (Arm)
Replace the prose for properties dependent on specific "enable-method" values with schemas defining the same requirements. Both "qcom,acc" and "qcom,saw" properties appear to be required for any of the Qualcomm enable-method values, so the schema is a bit simpler than what the text said. The properties are also needed on some Qualcomm platforms with other enable-method values. It's limited to Cortex A53 based platforms so use that to disable the properties. The references to arm/msm/qcom,saw2.txt and arm/msm/qcom,kpss-acc.txt are out of date, so just drop them. Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-12-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22ASoC: dt-bindings: add schema for rockchip SAI controllersNicolas Frattaroli
Rockchip introduced a new audio controller called the "Serial Audio Interface", or "SAI" for short, on some of their newer SoCs. In particular, this controller is used several times on the RK3576 SoC. Add a schema for it, with only an RK3576 compatible for now. Other SoCs may follow as mainline support for them lands. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250410-rk3576-sai-v2-5-c64608346be3@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-22dt-bindings: arm: amlogic: add S7D supportXianwei Zhao
Document the new S7D SoC/board device tree bindings. Amlogic S7D is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-3-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22dt-bindings: arm: amlogic: add S7 supportXianwei Zhao
Document the new S7 SoC/board device tree bindings. Amlogic S7 is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-2-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22dt-bindings: arm: amlogic: add S6 supportXianwei Zhao
Document the new S6 SoC/board device tree bindings. Amlogic S6 is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-1-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
generated by cgit (git 2.34.1) at 2025-07-19 04:59:31 +0000