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2023-04-05ARM: dts: imx6ull-colibri: Remove unnecessary #address-cells/#size-cellsFabio Estevam
Building with W=1 leads to the following dtc warning: arch/arm/boot/dts/imx6ull-colibri.dtsi:36.9-46.5: Warning (graph_child_address): /connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary Since a single port is used, 'ports' can be removed, as well as the unnecessary #address-cells/#size-cells. Fixes: bd5880e10982 ("ARM: dts: colibri-imx6ull: Enable dual-role switching") Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-04-05ARM: dts: imx7d-remarkable2: Remove unnecessary #address-cells/#size-cellsFabio Estevam
Building with W=1 leads to the following dtc warning: arch/arm/boot/dts/imx7d-remarkable2.dts:319.19-335.4: Warning (avoid_unnecessary_addr_size): /soc/bus@30800000/i2c@30a50000/pmic@62: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Remove unnecessary #address-cells/#size-cells to fix it. Fixes: 9076cbaa7757 ("ARM: dts: imx7d-remarkable2: Enable silergy,sy7636a") Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alistair Francis <alistair@alistair23.me> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-04-04PCI: Introduce pci_dev_for_each_resource()Mika Westerberg
Instead of open-coding it everywhere introduce a tiny helper that can be used to iterate over each resource of a PCI device, and convert the most obvious users into it. While at it drop doubled empty line before pdev_sort_resources(). No functional changes intended. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230330162434.35055-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2023-04-04ARM: oxnas: remove OXNAS supportNeil Armstrong
Due to lack of maintainance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 ARM support. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'omap-for-v6.4/omap1-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/arm Clean-up for omap1 for v6.4 merge window Two clean-up patches to fix Kconfig indentation and to simplify the return path for ams_delta_modem_init(). * tag 'omap-for-v6.4/omap1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: omap1: remove redundant variables err ARM: omap1: Kconfig: Fix indentation Link: https://lore.kernel.org/r/pull-1680180485-415954@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'omap-for-v6.4/cleanup-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/arm Clean-up for omaps for v6.4 Some clean-up changes for omaps mostly to use of_property_read_bool() and of_address_to_resource(). Also included is removal for an obsolete Kconfig option, a typo fix, a return path change for am33xx_suspend_init(), and a change to use kzalloc instead of kcalloc for a single element. * tag 'omap-for-v6.4/cleanup-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: hwmod: Use kzalloc for allocating only one element ARM: OMAP2+: Remove the unneeded result variable ARM: OMAP2+: fix repeated words in comments ARM: OMAP2+: remove obsolete config OMAP3_SDRC_AC_TIMING ARM: OMAP2+: Use of_address_to_resource() ARM: OMAP2+: Use of_property_read_bool() for boolean properties Link: https://lore.kernel.org/r/pull-1680180293-92168@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'amlogic-arm-dt-for-v6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM DT changes for v6.4: - adjust order of some compatibles - meson8: add the xtal_32k_out pin - meson8: add the SDXC_A pins - mxiii-plus: Enable Bluetooth and WiFi support * tag 'amlogic-arm-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: ARM: dts: meson8m2: mxiii-plus: Enable Bluetooth and WiFi support ARM: dts: meson8: add the SDXC_A pins ARM: dts: meson8: add the xtal_32k_out pin arm: dts: meson: adjust order of some compatibles Link: https://lore.kernel.org/r/eb1f32f8-822d-9cfc-fca6-9e044bf4a5ab@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04ARM: dts: oxnas: remove obsolete device tree filesNeil Armstrong
Due to lack of maintainance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 devices. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'at91-dt-6.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt AT91 device tree updates for 6.4: It contains: - Update to maximum frequency for QSPI on several boards thanks to the additon of the new spi-cs-setup-ns property. * tag 'at91-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency Link: https://lore.kernel.org/r/20230331142751.41522-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'omap-for-v6.4/dt-overlays-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt Devicetree overlays for omaps for v6.4 Devicetree overlays for omaps to enable the optional LCD and touchscreen modules on am57xx-evm and am57xx-idk boards. * tag 'omap-for-v6.4/dt-overlays-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am57xx-idk: Add IDK displays and touchscreens ARM: dts: ti: Add AM57xx GP EVM Rev A3 board support ARM: dts: ti: Add AM57xx GP EVM board support Link: https://lore.kernel.org/r/pull-1680180448-508978@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'omap-for-v6.4/dt-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt Devicetree changes for omaps for v6.4 Devicetree changes for omaps for gta04, Phytec am335x devices, and to drop a obsolete compatible property: - A non-urgent fix for gta04 to enable more dma channels for some audio configurations - Update the dts compatible and vendor prefixes for gta04 - A series of updates for Phytec am335x based boards to configure more devices like rtc and audio, and a few clean-up patches - A change to drop the usage of "ti,omap36xx" compatible, the driver code already checks for "ti,omap3630" that is also alread set in the dts files. This makes the yaml binding conversion a bit simpler. * tag 'omap-for-v6.4/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap: Drop ti,omap36xx compatible ARM: dts: am335x-phycore-som: Remove superseded/invalid GPMC NAND type. ARM: dts: am335x-pcm-953: Remove superseded/invalid LED trigger. ARM: dts: am335x-phycore-som: Remove underscore in node names. ARM: dts: am335x-regor: Remove underscore in node names. ARM: dts: am335x-pcm-935: Remove underscore in node names. ARM: dts: am335x-wega: Change node name of sound card, remove underscores. ARM: dts: am335x-wega: Fix audio codec by using simple-audio-card driver. ARM: dts: am335x-phycore-som: Add alias for TPS65910 RTC ARM: dts: omap3-gta04: fix compatible record for GTA04 board ARM: dts: gta04: fix excess dma channel usage Link: https://lore.kernel.org/r/pull-1680180389-756753@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'renesas-dts-for-v6.4-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.4 - Add USB3 support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit 2.0, - Add uSD card and eMMC support for the RZ/V2M Evaluation Kit 2.0, - Add CAN-FD, thermal, GMSL2 video capture, and sound support for the R-Car V4H SoC and the White-Hawk development board, - Add PMU support for the RZ/G2UL, RZ/G2L{,C}, and RZ/V2L SoCs, - Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC, - Add I2C EEPROM support for the Atmark Techno Armadillo-800-EVA, and the Renesas Condor and ULCB development boards, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (30 commits) arm64: dts: renesas: r8a779a0: Update CAN-FD to R-Car Gen4 compatible value arm64: dts: renesas: ulcb: Add I2C EEPROM for PMIC arm64: dts: renesas: condor: Add I2C EEPROM for PMIC ARM: dts: armadillo800eva: Add I2C EEPROM for MAC address arm64: dts: renesas: Remove R-Car H3 ES1.* devicetrees arm64: dts: renesas: white-hawk: Add R-Car Sound support arm64: dts: renesas: r8a779g0: R-Car Sound support arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels arm64: dts: renesas: r9a07g054: Update IRQ numbers for SSI channels arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels arm64: dts: renesas: r8a774c0: Remove bogus voltages from OPP table arm64: dts: renesas: r8a77990: Remove bogus voltages from OPP table arm64: dts: renesas: r9a07g054: Add Cortex-A55 PMU node arm64: dts: renesas: white-hawk-csi-dsi: Add and connect MAX96712 arm64: dts: renesas: r8a779g0: Add and connect all CSI-2, ISP and VIN nodes arm64: dts: renesas: r8a779f0: Use proper labels for thermal zones arm64: dts: renesas: r8a779g0: Add thermal nodes arm64: dts: renesas: rzv2mevk2: Add uart0 pins arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systems arm64: dts: renesas: r9a07g044: Add Cortex-A55 PMU node ... Link: https://lore.kernel.org/r/cover.1679907064.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04ARM: configs: remove oxnas_v6_defconfigNeil Armstrong
Due to lack of maintainance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX820 specific defconfig. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04ARM: tegra30: Use cpu* labelsMaxim Schwalm
Replace cpu paths with labels since those already exist in tree. Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04ARM: tegra30: peripherals: Add 266.5MHz nodesSvyatoslav Ryhel
LG Optimus Vu (p895) and Optimus 4X HD (p880) have 266.5MHz RAM clock and require this entry to work with it correctly. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04ARM: tegra: asus-tf101: Fix accelerometer mount matrixSvyatoslav Ryhel
Accelerometer mount matrix used in tf101 downstream is inverted. This new matrix was generated on actual device using calibration script, like on other transformers. Tested-by: Robert Eckelmann <longnoserob@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03ARM: dts: exynos: add mmc aliasesHenrik Grimler
Add aliases for eMMC, SD card and WiFi where applicable, so that assigned mmc indeces are always the same. Co-developed-by: Anton Bambura <jenneron@protonmail.com> Signed-off-by: Anton Bambura <jenneron@protonmail.com> [ Tested on exynos5800-peach-pi ] Tested-by: Valentine Iourine <iourine@iourine.msk.su> Signed-off-by: Henrik Grimler <henrik@grimler.se> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230402144724.17839-3-henrik@grimler.se Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-03ARM: dts: exynos: replace mshc0 alias with mmc-ddr-1_8v propertyHenrik Grimler
Previously, the mshc0 alias has been necessary so that MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA are set for mshc_0/mmc_0. However, these capabilities should be described in the device tree so that we do not have to rely on the alias. The property mmc-ddr-1_8v replaces MMC_CAP_1_8V_DDR, while bus_width = <8>, which is already set for all the mshc0/mmc0 nodes, replaces MMC_CAP_8_BIT_DATA. Also drop other mshc aliases as they are not needed. Signed-off-by: Henrik Grimler <henrik@grimler.se> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230402144724.17839-2-henrik@grimler.se Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-03ARM: dts: stm32: Add QSPI support on STM32MP13x SoC familyPatrice Chotard
Add QSPI support on STM32MP13x SoC family Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03ARM: dts: stm32: add FMC support on STM32MP13x SoC familyChristophe Kerello
Add FMC support on STM32MP13x SoC family. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03ARM: dts: stm32: YAML validation fails for Argon BoardsPierre-Yves MORDRET
"make dtbs_check" gives following output : stm32mp157c-emstamp-argon.dtb: gpu@59000000: 'contiguous-area' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03ARM: dts: stm32: YAML validation fails for Odyssey BoardsPierre-Yves MORDRET
"make dtbs_check" gives following output : stm32mp157c-odyssey.dt.yaml: gpu@59000000: 'contiguous-area' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03ARM: dts: stm32: YAML validation fails for STM32MP15 ST BoardsPierre-Yves MORDRET
"make dtbs_check" gives following output : stm32mp157x-xxx.dt.yaml: gpu@59000000: 'contiguous-area' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml Solve this trouble for STM32MPU Boards : - stm32mp157c-ed1 - stm32mp157x-dkx Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03Merge 6.3-rc5 into driver-core-nextGreg Kroah-Hartman
We need the fixes in here for testing, as well as the driver core changes for documentation updates to build on. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-03-30ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus
frequency sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~33%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230328101517.1595738-5-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus
frequency sama5d2_icp populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com> # on sama5d2 ICP Link: https://lore.kernel.org/r/20230328101517.1595738-4-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus
frequency sama5d27-som1 populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230328101517.1595738-3-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus
frequency sama5d27-wlsom1 populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230328101517.1595738-2-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30docs: move x86 documentation into Documentation/arch/Jonathan Corbet
Move the x86 documentation under Documentation/arch/ as a way of cleaning up the top-level directory and making the structure of our docs more closely match the structure of the source directories it describes. All in-kernel references to the old paths have been updated. Acked-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: linux-arch@vger.kernel.org Cc: x86@kernel.org Cc: Borislav Petkov <bp@alien8.de> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/lkml/20230315211523.108836-1-corbet@lwn.net/ Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2023-03-30ARM: sh-mobile: Use of_cpu_node_to_id() to read CPU node 'reg'Rob Herring
Replace open coded CPU nodes reading of "reg" and translation to logical ID with of_cpu_node_to_id(). The original code called of_parse_phandle() CONFIG_NR_CPUS times regardless of the length of 'cpus'. Optimize the loop to bail out once of_parse_phandle() fails as the end of 'cpus' property has been reached. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230327205228.573456-1-robh@kernel.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-30ARM: dts: r8a7790: Add PWM device nodesGeert Uytterhoeven
Add support for the 7 PWM channels provided by PWM Timers on R-Car H2, by adding device nodes describing the PWM Timers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/9755b3af4296060ee31c4652def639574cbbd2fb.1679330878.git.geert+renesas@glider.be
2023-03-30ARM: dts: r8a7790: Add TPU device nodeGeert Uytterhoeven
Add support for the 4 PWM channels provided by the 16-bit Timer Pulse Unit on R-Car H2, by adding a device node describing the TPU. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/75da1e63135a3fc8a3aaafbff7139bd5d7509be3.1679330727.git.geert+renesas@glider.be
2023-03-30ARM: dts: marzen: Enable I2C supportGeert Uytterhoeven
Enable the single I2C bus available on the Marzen development board. As this bus contains an AK4643 codec, it must be limited to 100 kHz. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/77b87378397fd26f39c73f68e3ea465db6d38fb1.1679330016.git.geert+renesas@glider.be
2023-03-30ARM: dts: marzen: Add slide switchesGeert Uytterhoeven
Describe the four General Purpose Switches on the Marzen development board, so they can be used for user input and/or for wake-up from s2ram. The GPIO block on R-Car H1 does not support triggering interrupts on both edges of a changing input signal, hence one cannot use gpio-keys with gpios properties. Instead, one of two alternatives needs to be used: 1. Use gpio-keys with interrupts instead of gpios properties, at the expense of receiving only key presses (release events will be auto-generated), 2. Use gpio-keys-polled with gpios properties, at the expense of making these keys unusable as wake-up sources. As the DTS for the Marzen development board serves mainly as an example, the approach taken is to use the first alternative for the first two switches, and the second alternative for the last two switches. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f834a3c397362f2424fcae6a0c0440356208b182.1679329829.git.geert+renesas@glider.be
2023-03-30ARM: dts: r8a7779: Add PWM supportGeert Uytterhoeven
Add support for the 7 PWM channels provided by PWM Timers on R-Car H1, by describing the PWM Timers and their module clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/71622584db692f571d542ef2dcf088ce549aed3f.1679329211.git.geert+renesas@glider.be
2023-03-29ARM64: dts: imx7ulp: update usb compatiblePeng Fan
Per binding doc, update the compatible Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20230322052504.2629429-11-peng.fan@oss.nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-03-28lazy tlb: introduce lazy tlb mm refcount helper functionsNicholas Piggin
Add explicit _lazy_tlb annotated functions for lazy tlb mm refcounting. This makes the lazy tlb mm references more obvious, and allows the refcounting scheme to be modified in later changes. There is no functional change with this patch. Link: https://lkml.kernel.org/r/20230203071837.1136453-3-npiggin@gmail.com Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Christophe Leroy <christophe.leroy@csgroup.eu> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Nadav Amit <nadav.amit@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@redhat.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-03-28Revert "ARM: mach-virt: Select PMUv3 driver by default"Will Deacon
This reverts commit 3b16f6268e660f15aed0bb97aefe87e893eb8882. Selecting a Kconfig option that has its own set of dependencies tends to end badly, and in this case 'randconfig' builds blew up on 32-bit ARM where ARM_PMUV3 was being selecting with HW_PERF_EVENTS=n: | drivers/perf/arm_pmuv3.c:68:5: error: use of undeclared identifier 'DTLB' | [C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1D_TLB, | ^ | fatal error: too many errors emitted, stopping now [-ferror-limit=] | 20 errors generated. | | Kconfig warnings: (for reference only) | WARNING: unmet direct dependencies detected for ARM_PMUV3 | Depends on [n]: PERF_EVENTS [=y] && HW_PERF_EVENTS [=n] && (ARM [=y] && CPU_V7 [=y] || ARM64) | Selected by [y]: | - ARCH_VIRT [=y] && ARCH_MULTI_V7 [=y] && PERF_EVENTS [=y] As suggested by Marc, just drop the 'select' clause altogether by reverting the patch which introduced it. Link: https://lore.kernel.org/r/202303281539.zzI4vpw1-lkp@intel.com Reported-by: kernel test robot <lkp@intel.com> Reported-by: Arnd Bergmann <arnd@arndb.de> Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
2023-03-28ARM: dts: stm32: add uart nodes and uart aliases on stm32mp135f-dkValentin Caron
Update device-tree stm32mp135f-dk.dts to add usart1, uart8, usart2 and uart aliases. - Usart2 is used to interface a BT device, enable it by default. - Usart1 and uart8 are available on expansion connector. They are kept disabled. So, the pins are kept in analog state to lower power consumption by default or can be used as GPIO. - Uart4 is used for console. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: add pins for usart2/1/4/8 in stm32mp13-pinctrlValentin Caron
Add pins for uart4, uart8, usart1 and usart2 in stm32mp13-pinctrl.dtsi Theses pins have three states: default, sleep and idle. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: add uart nodes on stm32mp13Valentin Caron
Update device-tree stm32mp131.dtsi to add some uart features. On uart 1, 2, 3, 5, 6, 7, 8 nodes, add compabible, exti interrupts, clock, reset properties, dma config. On uart 4 node, only add dma configuration and use exti interrupt. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: clean uart aliases on stm32mp15xx-exx boardsValentin Caron
Remove duplicates and clean uart aliases. Uart aliases and uart pins should be declared and associated to uart instance at the same time. Put also aliases node above chosen node as same as stm32mp157c-dk2.dts. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: clean uart aliases on stm32mp15xx-dkx boardsValentin Caron
Remove duplicates and clean uart aliases. Uart aliases and uart pins should be declared and associated to uart instance at the same time. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: fix slew-rate of USART2 on stm32mp15xx-dkxValentin Caron
On stm32mp15xx-dkx boards: - Fix slew-rate of USART 2 to 0 like other USARTs, because frequency of USART pins doesn't exceed 10Mhz. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: stm32: add support for STM32MP151Roan van Dijk
This patch adds initial support of STM32MP151 microprocessor (MPU) based on Arm Cortex-A7. New Cortex-A infrastructure (gic, timer,...) are selected if ARCH_MULTI_V7 is defined. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Roan van Dijk <roan@protonic.nl> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: tegra: transformers: Bind RT5631 sound nodesSvyatoslav Ryhel
TF201, TF300TG and TF700T support RT5631 codec. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-03-28ARM: tegra: transformers: Update WM8903 sound nodesSvyatoslav Ryhel
Fix headset detection and use device GPIO microphone detection on WM8903 Transformers. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-03-28ARM: dts: stm32: add pin map for CAN controller on stm32f4Dario Binacchi
Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2). Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2023-03-28ARM: dts: stm32: add CAN support on stm32f429Dario Binacchi
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary, that share some of the required logic like clock and filters. This means that the secondary CAN can't be used without the primary CAN. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2023-03-28ARM: dts: stm32: fix spi1 pin assignment on stm32mp15Alexandre Torgue
Bank A and B IOs can't be handled by the pin controller 'Z'. This patch assign spi1 pin definition to the correct controller. Fixes: 9ad65d245b7b ("ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group") Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
generated by cgit (git 2.34.1) at 2025-07-19 22:04:08 +0000