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2024-12-26ARM: dts: qcom: sdx65: Add PCIe EP interconnect pathKrishna chaitanya chundru
Add pcie-mem & cpu-pcie interconnect path ifor PCIe EP to sdx65 platform. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> Link: https://lore.kernel.org/r/1689751218-24492-3-git-send-email-quic_krichai@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-20Merge tag 'renesas-arm-defconfig-for-v6.14-tag1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/defconfig Renesas ARM defconfig updates for v6.14 - Enable Watchdog support for the RZ/V2H(P) SoC and the RZ/V2H EVK board in the ARM64 defconfig, - Refresh shmobile_defconfig for v6.13-rc1, - Enable support for the Renesas RZ/G3E (R9A09G047) SoC in the ARM64 defconfig. * tag 'renesas-arm-defconfig-for-v6.14-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: defconfig: Enable R9A09G047 SoC ARM: shmobile: defconfig: Refresh for v6.13-rc1 arm64: defconfig: Enable Renesas RZ/V2H(P) Watchdog driver Link: https://lore.kernel.org/r/cover.1734689799.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-20Merge tag 'renesas-dts-for-v6.14-tag1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.14 - Add more serial (SCIF), power monitor, ADC, and sound support for the RZ/G3S SoC and the RZ/G3S SMARC SoM and development board, - Add support for the R-Car V4H ES3.0 (R8A779G3) SoC on the White Hawk Single development board, - Add display support for the R-Car V4M SoC and the Gray Hawk Single development board, - Add video capture support for the Gray Hawk Single development board, - Add initial support for the RZ/G3E (R9A09G047) SoC and the RZ/G3E SMARC SoM and Carrier-II EVK development board, - Add support for 5-port MATEnet on the Falcon Ethernet sub-board, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.14-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (33 commits) arm64: dts: renesas: r9a09g047: Add I2C nodes arm64: dts: renesas: rzg3s-smarc: Add sound card arm64: dts: renesas: rzg3s-smarc: Enable SSI3 arm64: dts: renesas: Add da7212 audio codec node arm64: dts: renesas: rzg3s-smarc-som: Add versa3 clock generator node arm64: dts: renesas: r9a08g045: Add SSI nodes arm64: dts: renesas: rzg3s-smarc-som: Enable ADC arm64: dts: renesas: r9a08g045: Add ADC node arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK board arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM arm64: dts: renesas: r9a09g047: Add OPP table arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC arm64: dts: renesas: falcon-ethernet: Describe PHYs connected on the breakout board arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] dt-bindings: clock: renesas: Document RZ/G3E SoC CPG dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants arm64: dts: renesas: gray-hawk-single: Add video capture support arm64: dts: renesas: gray-hawk-single: Add DisplayPort support arm64: dts: renesas: r8a779h0: Add display support ... Link: https://lore.kernel.org/r/cover.1734689803.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-20Merge tag 'stm32-dt-for-v6.14-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt STM32 DT for v6.14, round 1 Highlights: ---------- - MPU: - STM32MP13: - Populate all timer counter nodes in Soc file. - Enable counter (timers) on stm32mp135f-dk. - DH core: increase CPU voltage to fit with STM32MP135F datasheet. - STMP32MP15: - Populate all timer counter nodes in Soc file. - Enable counter (timers) on stm32mp15 EV1 and DK boards. - OCTAVO: - LXA-TAC (gen1/2): disable RTC, update aliases and adjust USB gadget. - Add LXA-TAC gen3 based on OSD32MP153x SIP: STMP32MP153, RAM, PMIC. - DH: minor fixes. - STM32MP25: - Enable imx335/CSI/DCMIPP pipeline on stm32mp257f-ev1. - Add I2S, SAI, SPDIFRX supports. - Add and enable COMBOPHY on stm32mp257f-ev1. Combophy is used by PCIe and USB3. * tag 'stm32-dt-for-v6.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (23 commits) arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1 arm64: dts: st: add csi & dcmipp node in stm32mp25 ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoM ARM: dts: stm32: add counter subnodes on stm32mp157 dk boards ARM: dts: stm32: add counter subnodes on stm32mp157c-ev1 ARM: dts: stm32: add counter subnodes on stm32mp135f-dk ARM: dts: stm32: populate all timer counter nodes on stm32mp15 ARM: dts: stm32: populate all timer counter nodes on stm32mp13 ARM: dts: stm32: lxa-tac: Add support for generation 3 devices ARM: dts: stm32: lxa-tac: move adc and gpio{e,g} to gen{1,2} boards dt-bindings: arm: stm32: add compatible strings for Linux Automation LXA TAC gen 3 ARM: dts: stm32: lxa-tac: adjust USB gadget fifo sizes for multi function ARM: dts: stm32: lxa-tac: extend the alias table ARM: dts: stm32: lxa-tac: disable the real time clock ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151 ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM ARM: dts: stm32: Deduplicate serial aliases and chosen node for STM32MP15xx DHCOM SoM arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board arm64: dts: st: Add combophy node on stm32mp251 ... Link: https://lore.kernel.org/r/7ffcca65-3953-413a-bcf3-0702a6b0518b@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-20ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoMMarek Vasut
Swap USART3 and UART8 aliases on STM32MP15xx DHCOM SoM, make sure UART8 is listed first, USART3 second, because the UART8 is labeled as UART2 on the SoM pinout, while USART3 is labeled as UART3 on the SoM pinout. Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: add counter subnodes on stm32mp157 dk boardsFabrice Gasnier
Enable the counter nodes without dedicated pins. With such configuration, the counter interface can be used on internal clock to generate events. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: add counter subnodes on stm32mp157c-ev1Fabrice Gasnier
Enable the counter nodes without dedicated pins. With such configuration, the counter interface can be used on internal clock to generate events. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: add counter subnodes on stm32mp135f-dkFabrice Gasnier
Enable the counter nodes without dedicated pins. With such configuration, the counter interface can be used on internal clock to generate events. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: populate all timer counter nodes on stm32mp15Fabrice Gasnier
Counter driver originally had support limited to quadrature interface and simple counter. It has been improved[1], so add the remaining stm32 timer counter nodes. [1] https://lore.kernel.org/linux-arm-kernel/20240307133306.383045-1-fabrice.gasnier@foss.st.com/ Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: populate all timer counter nodes on stm32mp13Fabrice Gasnier
Counter driver originally had support limited to quadrature interface and simple counter. It has been improved[1], so add the remaining stm32 timer counter nodes. [1] https://lore.kernel.org/linux-arm-kernel/20240307133306.383045-1-fabrice.gasnier@foss.st.com/ Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-17ARM: dts: meraki-mr26: set mac address for gmac0Rosen Penev
Currently this needs to be done in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20241021015147.172700-1-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: broadcom: Add Genexis XG6846B DTS fileLinus Walleij
This adds a device tree for the Genexis XG6846B router. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-9-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add ARM PL081 DMA blockLinus Walleij
The ARM PL081 DMA controller can be found in the BCM6846 memory map, and it turns out to work. The block may be used as DMA engine for some of the peripherals (maybe the EMMC controller found in the same group of peripherals?) but it can always be used as a memcpy engine, which is a generic "blitter". I tested it with the dmatest module, and it copies lots of data very fast and fires hundreds of thousands of interrupts so it works just fine. Add it to the BCM6846 DTSI file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-6-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add LED controllerLinus Walleij
Add the BCMBCA LED controller to the BCM6846 DTSI. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-5-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add MDIO control blockLinus Walleij
This adds the MDIO block found in the BCM6846. Use the new "brcm,bcm6846-mdio" compatible (merged to the networking tree) for this block. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-4-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add GPIO blocksLinus Walleij
The BCM6846 has the same simplistic GPIOs as some other Broadcom SoCs: plain memory-mapped registers with up to 8 blocks of 32 GPIOs each totalling 256 GPIOs. Users of the SoC can selectively enable the GPIO blocks actually used with a certain design. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-3-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Enable watchdogLinus Walleij
The BCM6846 has a BCM7038-compatible watchdog timer, just add it to the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-2-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add iproc rngLinus Walleij
The bcm6846 has a standard iproc 200 RNG which is already fully supported by bindings, so just add it to the DTS file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-1-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17arm: dts: broadcom: Remove unused and undocumented propertiesRob Herring (Arm)
Remove properties which are both unused in the kernel and undocumented. Most likely they are leftovers from downstream. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241115193904.3624350-1-robh@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: microchip: sam9x75_curiosity: Add power monitor supportMihai Sain
Add PAC1934 support in order to monitor the board power consumption. Device is connected on flexcom7 in twi mode. [root@SAM9X75 ~]$ awk -f pac1934.awk VDD3V3 current: 10.675 mA, voltage: 3295.41 mV VDDOUT4 current: 5.7625 mA, voltage: 1196.78 mV VDDCORE current: 115.442 mA, voltage: 1243.65 mV VDDIODDR current: 29.585 mA, voltage: 1345.21 mV Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20241122080523.3941-3-mihai.sain@microchip.com [claudiu.beznea: s/VDDOUT4/DCDC4 to comply with schematics] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-12-17ARM: dts: microchip: sam9x7: Move i2c address/size to dtsiMihai Sain
Since these properties are common for all i2c subnodes, move them to SoC dtsi from board dts. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20241122080523.3941-2-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-12-16arm: dts: socfpga: use reset-name "stmmaceth-ocp" instead of "ahb"Mamta Shukla
The ahb reset is deasserted in probe before first register access, while the stmmacheth-ocp reset needs to be asserted every time before changing the phy mode in Arria10[1]. Changed in Upstream to "ahb"(331085a423b arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb" ).This change was intended for arm64 socfpga and it is not applicable to Arria10. Further with STMMAC-SELFTEST Driver enabled, ethtool test also FAILS. $ ethtool -t eth0 [ 322.946709] socfpga-dwmac ff800000.ethernet eth0: entered promiscuous mode [ 323.374558] socfpga-dwmac ff800000.ethernet eth0: left promiscuous mode The test result is FAIL The test extra info: 1. MAC Loopback 0 2. PHY Loopback -110 3. MMC Counters -110 4. EEE -95 5. Hash Filter MC 0 6. Perfect Filter UC -110 7. MC Filter -110 8. UC Filter 0 9. Flow Control -110 10. RSS -95 11. VLAN Filtering -95 12. VLAN Filtering (perf) -95 13. Double VLAN Filter -95 14. Double VLAN Filter (perf) -95 15. Flexible RX Parser -95 16. SA Insertion (desc) -95 17. SA Replacement (desc) -95 18. SA Insertion (reg) -95 19. SA Replacement (reg) -95 20. VLAN TX Insertion -95 21. SVLAN TX Insertion -95 22. L3 DA Filtering -95 23. L3 SA Filtering -95 24. L4 DA TCP Filtering -95 25. L4 SA TCP Filtering -95 26. L4 DA UDP Filtering -95 27. L4 SA UDP Filtering -95 28. ARP Offload -95 29. Jumbo Frame -110 30. Multichannel Jumbo -95 31. Split Header -95 32. TBS (ETF Scheduler) -95 [ 324.881327] socfpga-dwmac ff800000.ethernet eth0: Link is Down [ 327.995360] socfpga-dwmac ff800000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx Link:[1] https://www.intel.com/content/www/us/en/docs/programmable/683711/21-2/functional-description-of-the-emac.html Fixes: 331085a423b ("arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb") Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com> Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-12-16ARM: dts: socfpga_cyclone5_mcvevk: Drop unused #address-cells/#size-cellsUwe Kleine-König
The properties #address-cells and #size-cells are only useful if there is a ranges property or child nodes with "reg" properties. This fixes a W=1 warning: arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts:51.22-72.4: Warning (avoid_unnecessary_addr_size): /soc/i2c@ffc04000/stmpe811@41: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-12-13ARM: dts: nuvoton: Fix at24 EEPROM node namesRob Herring (Arm)
at24.yaml defines the node name for at24 EEPROMs as 'eeprom'. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20240910215905.823337-1-robh@kernel.org Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-13ARM: dts: aspeed: minerva: add second source RTCYang Chen
Add second source RTC on i2c bus 9. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20241212133226.342937-5-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add bmc ready led settingYang Chen
Add GPIO BMC_READY on LED and give it active value and transitory flag. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20241212133226.342937-4-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add i/o expanders on each FCBYang Chen
Add four I/O expanders on each i2c of fan control board (FCB), assign the GPIO line name to each GPIO in use, and specify the interrupt GPIO number for each FCB's i/o expander. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20241212133226.342937-3-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add i/o expanders on bus 0Yang Chen
Add three I/O expanders on i2c bus 0, assign the GPIO line name to each GPIO in use, and specify the interrupt GPIO that has been used on it and give the interrupt gpio number. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20241212133226.342937-2-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: remove interrupt of GPIOB4 form all IOEXPPotin Lai
We notice this interrupt pin always keep low, it cause BMC stuck at boot up until kernel disabling IRQ of this GPIO pin. Remove the interrupt of GPIOB4 pin from all IOEXP for now to avoid BMC get stuck. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20241121-catalina-dts-20241120-v1-2-e4212502624b@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: revise ltc4287 shunt-resistor valuePotin Lai
Fix wrong shunt-resistor settings of two ltc4287 nodes. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20241121-catalina-dts-20241120-v1-1-e4212502624b@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13arm: dts: aspeed: Blueridge and Rainer: Add VRM presence GPIOsEddie James
Add GPIO line names to the GPIO expander to describe DCM and VRM presence detection lines. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241115222721.1564735-1-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Blueridge and Fuji: Fix LED node namesEddie James
The addressing on PCA LED nodes should be in hexadecimal, not decimal. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241107151431.1045102-1-eajames@linux.ibm.com [aj: Capitalise ARM in subject] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13arm: dts: aspeed: Everest and Fuji: Add VRM presence gpio expanderEddie James
Add the gpio expander that provides the VRM presence detection pins. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241106193303.748824-1-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: sbp1: IBM sbp1 BMC boardPatrick Rudolph
Add a device tree for IBM sbp1 BMC board which is based on AST2600 SOC. sbp1 baseboard has: - support for up to four Sapphire Rapids sockets having 16 DIMMS each. - 240 core/480 threads at maximum - 32x CPU PCIe slots - 2x M.2 PCH PCIe slots - Dual 200Gbit/s NIC - SPI TPM Added the following: - Indication LEDs - I2C mux & GPIO controller, pin assignments, - Thermister, - Voltage regulator - EEPROM/VPD Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com> Link: https://patch.msgid.link/20241104092220.2268805-2-naresh.solanki@9elements.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Add device tree for Ampere's Mt. Jefferson BMCChanh Nguyen
The Mt. Jefferson BMC is an ASPEED AST2600-based BMC for the Mt. Jefferson hardware reference platform with AmpereOne(TM)M processor. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://patch.msgid.link/20241021083702.9734-3-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for ADC monitor on Spider BoardRicky CX Wu
Add I2C mux for ADC monitors on Spider Board. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-10-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode on Fan BoardsRicky CX Wu
Revise adc128d818 adc mode on Fan Boards according to schematic. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-9-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Change the address of Fan IC on fan boardsRicky CX Wu
Change the address of Fan IC: Max31790 on fan boards according to schematic. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-8-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise address of i2c-mux for two fan boardsRicky CX Wu
Change the address of the I2C mux for two fan boards to 0x74 according to schematic. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-7-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: correct the compatible string for max31790Ricky CX Wu
Fix the compatible string for max31790 to match the binding document. Fixes: 2b8d94f4b4a4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-6-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add required properties for IOE on fan boardsRicky CX Wu
Add the required properties for IO expander on fan boards. Fixes: 2b8d94f4b4a4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-5-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for CPLD IOE on Spider BoardRicky CX Wu
Add I2C mux for CPLD IOE on Spider Board. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-4-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for four NICsRicky CX Wu
Add i2c-mux on Spider board for four NICs and add the temperature sensor and EEPROM for the NICs. Also remove the mctp-controller property on I2C bus 15 because we need to add the property on the I2C mux to each NIC so that the MCTP driver will ensure that each port is configured properly before communicating with the NICs. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-3-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: add i2c-mux for all Server Board slotsRicky CX Wu
Add i2c mux to 8 slots of server board and add the io expanders and eeprom for the slots. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-2-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Remove IO expanders on I2C bus 13Ricky CX Wu
Remove IO expanders on I2C bus 13 according to schematic change. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241001083021.3462426-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Add GPIO line namesNinad Palsule
Add following GPIO line names so that userspace can control them - PCH related GPIOs - FPGA related GPIOs Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-4-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Enable serial gpio0Ninad Palsule
Enable serial GPIO0. Set number of GPIO lines to 128 and bus frequency to 1MHz. Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-3-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Bump up i2c busses freqNinad Palsule
Bump up i2c8 and i2c15 bus frequency so that PCIe slot and FPGA runs faster Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-2-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: correct the compatible string of adm1272Ricky CX Wu
Remove the space in the compatible string of adm1272 to match the pattern of compatible. Fixes: 2b8d94f4b4a4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Fixes: 2b8d94f4b4a4765d ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://patch.msgid.link/20240927085213.331127-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for Management BoardRicky CX Wu
Add I2C mux for Management Board to separate the I2C bus 35 for updating CPLD firmware and I2C bus 34 for the other devices. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240926033534.4174707-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
generated by cgit (git 2.34.1) at 2025-07-15 23:34:52 +0000