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2025-03-12mmc: atmel-mci: Add missing clk_disable_unprepare()Gu Bowen
The error path when atmci_configure_dma() set dma fails in atmci driver does not correctly disable the clock. Add the missing clk_disable_unprepare() to the error path for pair with clk_prepare_enable(). Fixes: 467e081d23e6 ("mmc: atmel-mci: use probe deferring if dma controller is not ready yet") Signed-off-by: Gu Bowen <gubowen5@huawei.com> Acked-by: Aubin Constans <aubin.constans@microchip.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250225022856.3452240-1-gubowen5@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-03-11mmc: dw_mmc: add exynos7870 DW MMC supportKaustabh Chakraborty
Add support for Exynos7870 DW MMC controllers, for both SMU and non-SMU variants. These controllers require a quirk to access 64-bit FIFO in 32-bit accesses (DW_MMC_QUIRK_FIFO64_32). Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250219-exynos7870-mmc-v2-3-b4255a3e39ed@disroot.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-03-11mmc: dw_mmc: add a quirk for accessing 64-bit FIFOs in two halvesKaustabh Chakraborty
In certain DW MMC implementations (such as in some Exynos7870 controllers), 64-bit read/write is not allowed from a 64-bit FIFO. Add a quirk which facilitates accessing the 64-bit FIFO registers in two 32-bit halves. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250219-exynos7870-mmc-v2-2-b4255a3e39ed@disroot.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-03-11mmc: sdhci: Disable SD card clock before changing parametersErick Shepherd
Per the SD Host Controller Simplified Specification v4.20 §3.2.3, change the SD card clock parameters only after first disabling the external card clock. Doing this fixes a spurious clock pulse on Baytrail and Apollo Lake SD controllers which otherwise breaks voltage switching with a specific Swissbit SD card. Signed-off-by: Kyle Roeschley <kyle.roeschley@ni.com> Signed-off-by: Brad Mouring <brad.mouring@ni.com> Signed-off-by: Erick Shepherd <erick.shepherd@ni.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20250211214645.469279-1-erick.shepherd@ni.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-03-11mmc: sdhci-of-dwcmshc: Change to dwcmshc_phy_init for reusing codesJaehoon Chung
dwcmshc_phy_1_8v_init and dwcmshc_phy_3_3v_init differ only by a few lines of code. This allow us to reuse code depending on voltage. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20250131025406.1753513-1-jh80.chung@samsung.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-02-18mmc: dw_mmc: Switch to use hrtimer_setup()Nam Cao
hrtimer_setup() takes the callback function pointer as argument and initializes the timer completely. Replace hrtimer_init() and the open coded initialization of hrtimer::function with the new setup mechanism. Patch was created by using Coccinelle. Signed-off-by: Nam Cao <namcao@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Zack Rusin <zack.rusin@broadcom.com> Link: https://lore.kernel.org/all/4dec579387ced5e97bb25739fad2ac852e5a689c.1738746904.git.namcao@linutronix.de
2025-02-14mmc: sdhci-msm: fix dev reference leaked through of_qcom_ice_getTudor Ambarus
The driver leaks the device reference taken with of_find_device_by_node(). Fix the leak by using devm_of_qcom_ice_get(). Fixes: c7eed31e235c ("mmc: sdhci-msm: Switch to the new ICE API") Cc: stable@vger.kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250117-qcom-ice-fix-dev-leak-v2-2-1ffa5b6884cb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-02-10blk-crypto: add basic hardware-wrapped key supportEric Biggers
To prevent keys from being compromised if an attacker acquires read access to kernel memory, some inline encryption hardware can accept keys which are wrapped by a per-boot hardware-internal key. This avoids needing to keep the raw keys in kernel memory, without limiting the number of keys that can be used. Such hardware also supports deriving a "software secret" for cryptographic tasks that can't be handled by inline encryption; this is needed for fscrypt to work properly. To support this hardware, allow struct blk_crypto_key to represent a hardware-wrapped key as an alternative to a raw key, and make drivers set flags in struct blk_crypto_profile to indicate which types of keys they support. Also add the ->derive_sw_secret() low-level operation, which drivers supporting wrapped keys must implement. For more information, see the detailed documentation which this patch adds to Documentation/block/inline-encryption.rst. Signed-off-by: Eric Biggers <ebiggers@google.com> Tested-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> # sm8650 Link: https://lore.kernel.org/r/20250204060041.409950-2-ebiggers@kernel.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-02-03mmc: mtk-sd: Fix register settings for hs400(es) modeAndy-ld Lu
For hs400(es) mode, the 'hs400-ds-delay' is typically configured in the dts. However, some projects may only define 'mediatek,hs400-ds-dly3', which can lead to initialization failures in hs400es mode. CMD13 reported response crc error in the mmc_switch_status() just after switching to hs400es mode. [ 1.914038][ T82] mmc0: mmc_select_hs400es failed, error -84 [ 1.914954][ T82] mmc0: error -84 whilst initialising MMC card Currently, the hs400_ds_dly3 value is set within the tuning function. This means that the PAD_DS_DLY3 field is not configured before tuning process, which is the reason for the above-mentioned CMD13 response crc error. Move the PAD_DS_DLY3 field configuration into msdc_prepare_hs400_tuning(), and add a value check of hs400_ds_delay to prevent overwriting by zero when the 'hs400-ds-delay' is not set in the dts. In addition, since hs400(es) only tune the PAD_DS_DLY1, the PAD_DS_DLY2_SEL bit should be cleared to bypass it. Fixes: c4ac38c6539b ("mmc: mtk-sd: Add HS400 online tuning support") Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250123092644.7359-1-andy-ld.lu@mediatek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-02-03Revert "mmc: sdhci_am654: Add sdhci_am654_start_signal_voltage_switch"Josua Mayer
This reverts commit 941a7abd4666912b84ab209396fdb54b0dae685d. This commit uses presence of device-tree properties vmmc-supply and vqmmc-supply for deciding whether to enable a quirk affecting timing of clock and data. The intention was to address issues observed with eMMC and SD on AM62 platforms. This new quirk is however also enabled for AM64 breaking microSD access on the SolidRun HimmingBoard-T which is supported in-tree since v6.11, causing a regression. During boot microSD initialization now fails with the error below: [ 2.008520] mmc1: SDHCI controller on fa00000.mmc [fa00000.mmc] using ADMA 64-bit [ 2.115348] mmc1: error -110 whilst initialising SD card The heuristics for enabling the quirk are clearly not correct as they break at least one but potentially many existing boards. Revert the change and restore original behaviour until a more appropriate method of selecting the quirk is derived. Fixes: 941a7abd4666 ("mmc: sdhci_am654: Add sdhci_am654_start_signal_voltage_switch") Closes: https://lore.kernel.org/linux-mmc/a70fc9fc-186f-4165-a652-3de50733763a@solid-run.com/ Cc: stable@vger.kernel.org Signed-off-by: Josua Mayer <josua@solid-run.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20250127-am654-mmc-regression-v2-1-9bb39fb12810@solid-run.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-01-17mmc: sdhci-msm: Correctly set the load for the regulatorYuanjie Yang
Qualcomm regulator supports two power supply modes: HPM and LPM. Currently, the sdhci-msm.c driver does not set the load to adjust the current for eMMC and SD. If the regulator dont't set correct load in LPM state, it will lead to the inability to properly initialize eMMC and SD. Set the correct regulator current for eMMC and SD to ensure that the device can work normally even when the regulator is in LPM. Signed-off-by: Yuanjie Yang <quic_yuanjiey@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250114083514.258379-1-quic_yuanjiey@quicinc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-01-13mmc: hi3798mv200: Use syscon_regmap_lookup_by_phandle_argsKrzysztof Kozlowski
Use syscon_regmap_lookup_by_phandle_args() which is a wrapper over syscon_regmap_lookup_by_phandle() combined with getting the syscon argument. Except simpler code this annotates within one line that given phandle has arguments, so grepping for code would be easier. There is also no real benefit in printing errors on missing syscon argument, because this is done just too late: runtime check on static/build-time data. Dtschema and Devicetree bindings offer the static/build-time check for this already. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/all/20250111185410.183896-1-krzysztof.kozlowski@linaro.org>/ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-01-13mmc: Use of_property_present() for non-boolean propertiesRob Herring (Arm)
The use of of_property_read_bool() for non-boolean properties is deprecated in favor of of_property_present() when testing for property presence. Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/all/20250109155255.3438450-1-robh@kernel.org/ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-19mmc: sdhci-msm: convert to use custom crypto profileEric Biggers
As is being done in ufs-qcom, make the sdhci-msm driver override the full crypto profile rather than "just" key programming and eviction. This makes it much more straightforward to add support for hardware-wrapped inline encryption keys. It also makes it easy to pass the original blk_crypto_key down to qcom_ice_program_key() once it is updated to require the key in that form. Signed-off-by: Eric Biggers <ebiggers@google.com> Message-ID: <20241213041958.202565-8-ebiggers@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-19mmc: crypto: add mmc_from_crypto_profile()Eric Biggers
Add a helper function that encapsulates a container_of expression. For now there is just one user but soon there will be more. Signed-off-by: Eric Biggers <ebiggers@google.com> Message-ID: <20241213041958.202565-7-ebiggers@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-19mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.13-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.14. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-19mmc: sdhci-msm: fix crypto key evictionEric Biggers
Commit c7eed31e235c ("mmc: sdhci-msm: Switch to the new ICE API") introduced an incorrect check of the algorithm ID into the key eviction path, and thus qcom_ice_evict_key() is no longer ever called. Fix it. Fixes: c7eed31e235c ("mmc: sdhci-msm: Switch to the new ICE API") Cc: stable@vger.kernel.org Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Eric Biggers <ebiggers@google.com> Message-ID: <20241213041958.202565-6-ebiggers@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-18mmc: mtk-sd: Limit getting top_base to SoCs that require itChen-Yu Tsai
Currently the mtk-sd driver tries to get and map the second register base, named top_base in the code, regardless of whether the SoC model actually has it or not. This produces confusing big error messages on the platforms that don't need it: mtk-msdc 11260000.mmc: error -EINVAL: invalid resource (null) Limit it to the platforms that actually require it, based on their device tree entries, and properly fail if it is missing. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241210073212.3917912-3-wenst@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-18mmc: sdhci-acpi: Use devm_platform_ioremap_resource()Andy Shevchenko
The struct resource is not used for anything else, so we can simplify the code a bit by using the helper function. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241101101441.3518612-5-andriy.shevchenko@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-18mmc: sdhci-acpi: Remove not so useful error messageAndy Shevchenko
First of all, this error message is just informative and doesn't prevent driver from going on. Second, the ioremap() on many architectures just works on page size granularity, which is higher than 256 bytes. Last, but not lease, this is an impediment for furhter cleanups, hence remove it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241101101441.3518612-4-andriy.shevchenko@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-10mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.13-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.14. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-10mmc: mtk-sd: disable wakeup in .remove() and in the error path of .probe()Joe Hattori
Current implementation leaves pdev->dev as a wakeup source. Add a device_init_wakeup(&pdev->dev, false) call in the .remove() function and in the error path of the .probe() function. Signed-off-by: Joe Hattori <joe@pf.is.s.u-tokyo.ac.jp> Fixes: 527f36f5efa4 ("mmc: mediatek: add support for SDIO eint wakup IRQ") Cc: stable@vger.kernel.org Message-ID: <20241203023442.2434018-1-joe@pf.is.s.u-tokyo.ac.jp> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-10mmc: sdhci-tegra: Remove SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC quirkPrathamesh Shete
Value 0 in ADMA length descriptor is interpreted as 65536 on new Tegra chips, remove SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC quirk to make sure max ADMA2 length is 65536. Fixes: 4346b7c7941d ("mmc: tegra: Add Tegra186 support") Cc: stable@vger.kernel.org Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241209101009.22710-1-pshete@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-10mmc: bcm2835: add suspend/resume pm supportStefan Wahren
Add a minimalistic suspend/resume PM support. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Message-ID: <20241202115140.33492-1-wahrenst@gmx.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-10mmc: mtk-sd: Add support for ignoring cmd response CRCAndy-ld Lu
The current process flow does not handle MMC requests that are indicated to ignore the command response CRC. For instance, cmd12 and cmd48 from mmc_cqe_recovery() are marked to ignore CRC, but they are not matched to the appropriate response type in msdc_cmd_find_resp(). As a result, they are defaulted to 'MMC_RSP_NONE', which means no response is expected. This commit applies the flag 'MMC_RSP_R1B_NO_CRC' to fix the response type setting in msdc_cmd_find_resp() and adds the logic to ignore CRC in msdc_cmd_done(). Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Message-ID: <20241126125041.16071-3-andy-ld.lu@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-10mmc: core: Drop the MMC_RSP_R1_NO_CRC responseUlf Hansson
The MMC_RSP_R1_NO_CRC type of response is not being used by the mmc core for any commands. Let's therefore drop it, together with the corresponding code in the host drivers. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # for TMIO Reviewed-by: Avri Altman <avri.altman@wdc.com> Message-ID: <20241125132311.23939-1-ulf.hansson@linaro.org>
2024-12-10mmc: sdhci-esdhc-imx: enable 'SDHCI_QUIRK_NO_LED' quirk for S32GCiprian Marian Costea
Enable SDHCI_QUIRK_NO_LED quirk for S32G2/S32G3 variants as the controller does not have a LED signal line. Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Message-ID: <20241125083357.1041949-1-ciprianmarian.costea@oss.nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-12-02mmc: sdhci-pci: Add DMI quirk for missing CD GPIO on Vexia Edu Atla 10 tabletHans de Goede
The Vexia Edu Atla 10 tablet distributed to schools in the Spanish Andalucía region has no ACPI fwnode associated with the SDHCI controller for its microsd-slot and thus has no ACPI GPIO resource info. This causes the following error to be logged and the slot to not work: [ 10.572113] sdhci-pci 0000:00:12.0: failed to setup card detect gpio Add a DMI quirk table for providing gpiod_lookup_tables with manually provided CD GPIO info and use this DMI table to provide the CD GPIO info on this tablet. This fixes the microsd-slot not working. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Message-ID: <20241118210049.311079-1-hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-11-12mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.12-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.13. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-11-12Revert "mmc: dw_mmc: Fix IDMAC operation with pages bigger than 4K"Aurelien Jarno
The commit 8396c793ffdf ("mmc: dw_mmc: Fix IDMAC operation with pages bigger than 4K") increased the max_req_size, even for 4K pages, causing various issues: - Panic booting the kernel/rootfs from an SD card on Rockchip RK3566 - Panic booting the kernel/rootfs from an SD card on StarFive JH7100 - "swiotlb buffer is full" and data corruption on StarFive JH7110 At this stage no fix have been found, so it's probably better to just revert the change. This reverts commit 8396c793ffdf28bb8aee7cfe0891080f8cab7890. Cc: stable@vger.kernel.org Cc: Sam Protsenko <semen.protsenko@linaro.org> Fixes: 8396c793ffdf ("mmc: dw_mmc: Fix IDMAC operation with pages bigger than 4K") Closes: https://lore.kernel.org/linux-mmc/614692b4-1dbe-31b8-a34d-cb6db1909bb7@w6rz.net/ Closes: https://lore.kernel.org/linux-mmc/CAC8uq=Ppnmv98mpa1CrWLawWoPnu5abtU69v-=G-P7ysATQ2Pw@mail.gmail.com/ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-ID: <20241110114700.622372-1-aurelien@aurel32.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-11-12mmc: mtk-sd: Fix MMC_CAP2_CRYPTO flag settingAndy-ld Lu
Currently, the MMC_CAP2_CRYPTO flag is set by default for eMMC hosts. However, this flag should not be set for hosts that do not support inline encryption. The 'crypto' clock, as described in the documentation, is used for data encryption and decryption. Therefore, only hosts that are configured with this 'crypto' clock should have the MMC_CAP2_CRYPTO flag set. Fixes: 7b438d0377fb ("mmc: mtk-sd: add Inline Crypto Engine clock control") Fixes: ed299eda8fbb ("mmc: mtk-sd: fix devm_clk_get_optional usage") Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Cc: stable@vger.kernel.org Message-ID: <20241111085039.26527-1-andy-ld.lu@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-11-12mmc: mtk-sd: Fix error handle of probe functionAndy-ld Lu
In the probe function, it goes to 'release_mem' label and returns after some procedure failure. But if the clocks (partial or all) have been enabled previously, they would not be disabled in msdc_runtime_suspend, since runtime PM is not yet enabled for this case. That cause mmc related clocks always on during system suspend and block suspend flow. Below log is from a SDCard issue of MT8196 chromebook, it returns -ETIMEOUT while polling clock stable in the msdc_ungate_clock() and probe failed, but the enabled clocks could not be disabled anyway. [ 129.059253] clk_chk_dev_pm_suspend() [ 129.350119] suspend warning: msdcpll is on [ 129.354494] [ck_msdc30_1_sel : enabled, 1, 1, 191999939, ck_msdcpll_d2] [ 129.362787] [ck_msdcpll_d2 : enabled, 1, 1, 191999939, msdcpll] [ 129.371041] [ck_msdc30_1_ck : enabled, 1, 1, 191999939, ck_msdc30_1_sel] [ 129.379295] [msdcpll : enabled, 1, 1, 383999878, clk26m] Add a new 'release_clk' label and reorder the error handle functions to make sure the clocks be disabled after probe failure. Fixes: ffaea6ebfe9c ("mmc: mtk-sd: Use readl_poll_timeout instead of open-coded polling") Fixes: 7a2fa8eed936 ("mmc: mtk-sd: use devm_mmc_alloc_host") Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: stable@vger.kernel.org Message-ID: <20241107121215.5201-1-andy-ld.lu@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-11-12mmc: sunxi-mmc: Fix A100 compatible descriptionAndre Przywara
It turns out that the Allwinner A100/A133 SoC only supports 8K DMA blocks (13 bits wide), for both the SD/SDIO and eMMC instances. And while this alone would make a trivial fix, the H616 falls back to the A100 compatible string, so we have to now match the H616 compatible string explicitly against the description advertising 64K DMA blocks. As the A100 is now compatible with the D1 description, let the A100 compatible string point to that block instead, and introduce an explicit match against the H616 string, pointing to the old description. Also remove the redundant setting of clk_delays to NULL on the way. Fixes: 3536b82e5853 ("mmc: sunxi: add support for A100 mmc controller") Cc: stable@vger.kernel.org Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Parthiban Nallathambi <parthiban@linumiz.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Message-ID: <20241107014240.24669-1-andre.przywara@arm.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-11-04mmc: sdhci-esdhc-imx: Update esdhc sysctl dtocv bitmaskJosua Mayer
NXP ESDHC supports setting data timeout using uSDHCx_SYS_CTRL register DTOCV bits (bits 16-19). Currently the driver accesses those bits by 32-bit write using SDHCI_TIMEOUT_CONTROL (0x2E) defined in drivers/mmc/host/sdhci.h. This is offset by two bytes relative to uSDHCx_SYS_CTRL (0x2C). The driver also defines ESDHC_SYS_CTRL_DTOCV_MASK as first 4 bits, which is correct relative to SDHCI_TIMEOUT_CONTROL but not relative to uSDHCx_SYS_CTRL. The definition carrying control register in its name is therefore inconsistent. Update the bitmask definition for bits 16-19 to be correct relative to control register base. Update the esdhc_set_timeout function to set timeout value at control register base, not timeout offset. This solves a purely cosmetic problem. Signed-off-by: Josua Mayer <josua@solid-run.com> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241101-imx-emmc-reset-v3-2-184965eed476@solid-run.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-11-04mmc: sdhci-esdhc-imx: Implement emmc hardware resetJosua Mayer
NXP ESDHC supports control of native emmc reset signal when pinmux is set accordingly, using uSDHCx_SYS_CTRL register IPP_RST_N bit. Documentation is available in NXP i.MX6Q Reference Manual. Implement the hw_reset function in sdhci_ops asserting reset for at least 1us and waiting at least 200us after deassertion. Lower bounds are based on: JEDEC Standard No. 84-B51, 6.15.10 H/W Reset Operation, page 159. Upper bounds are chosen allowing flexibility to the scheduler. Tested on SolidRun i.MX8DXL SoM with a scope, and confirmed that eMMC is still accessible after boot: - eMMC extcsd has RST_N_FUNCTION=0x01 - sdhc node has cap-mmc-hw-reset - pinmux set for EMMC0_RESET_B - Linux v5.15 Signed-off-by: Josua Mayer <josua@solid-run.com> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241101-imx-emmc-reset-v3-1-184965eed476@solid-run.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-11-04mmc: sdhci-uhs2: correction a warning caused by incorrect type in argumentVictor Shih
There is a type issue in the argument in the uhs2_dev_cmd() that will generate a warning when building the kernel. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202410260525.ZUuPhMJz-lkp@intel.com/ Suggested-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Message-ID: <20241101104416.4954-1-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-31mmc: sdhci-uhs2: Remove unnecessary variablesVictor Shih
There are unnecessary variables in the sdhci_uhs2_send_command() that will generate a warning when building the kernel. Let's drop them! Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202410252107.y9EgrTbA-lkp@intel.com/ Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241030112216.4057-2-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-31mmc: sdhci-uhs2: Correct incorrect type in argumentVictor Shih
There is a type issue in the argument in the __sdhci_uhs2_send_command() that will generate a warning when building the kernel. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202410260525.ZUuPhMJz-lkp@intel.com/ Suggested-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Message-ID: <20241030112216.4057-1-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-30mmc: sdhci: Make MMC_SDHCI_UHS2 config symbol invisibleGeert Uytterhoeven
There is no need to ask the user about enabling UHS-II support, as all drivers that support UHS2-capable devices already select MMC_SDHCI_UHS2. Hence make the symbol invisible, unless when compile-testing. Fixes: 2af7dd8b64f2fd6a ("mmc: sdhci: add UHS-II module and add a kernel configuration") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Message-ID: <079f2b7473d34895843ad278d79930c681385b2e.1730282633.git.geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-30mmc: sdhci-uhs2: Remove unnecessary NULL checkBen Chuang
The host->ops pointer can't be NULL in sdhci_uhs2_do_detect_init(). Let's drop the redundant check. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202410271835.tqz9s9JV-lkp@intel.com/ Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241030015326.2289070-1-benchuanggli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-28mmc: bcm2835: Introduce proper clock handlingStefan Wahren
The custom sdhost controller on BCM2835 is feed by the critical VPU clock. In preparation for PM suspend/resume support, add a proper clock handling to the driver like in the other clock consumers (e.g. I2C). Move the clock handling behind mmc_of_parse(), because it could return with -EPROBE_DEFER and we want to minimize potential clock operation during boot phase. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Message-ID: <20241025103621.4780-5-wahrenst@gmx.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-28mmc: bcm2835: Fix type of current clock speedStefan Wahren
The type of mmc_ios.clock is unsigned int, so the cached value should be of the same type. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Message-ID: <20241025103621.4780-4-wahrenst@gmx.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-28mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v6.12-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.13. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-28mmc: sdhci-pci-gli: GL9767: Fix low power mode in the SD Express processBen Chuang
When starting the SD Express process, the low power negotiation mode will be disabled, so we need to re-enable it after switching back to SD mode. Fixes: 0e92aec2efa0 ("mmc: sdhci-pci-gli: Add support SD Express card for GL9767") Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Cc: stable@vger.kernel.org Message-ID: <20241025060017.1663697-2-benchuanggli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-28mmc: sdhci-pci-gli: GL9767: Fix low power mode on the set clock functionBen Chuang
On sdhci_gl9767_set_clock(), the vendor header space(VHS) is read-only after calling gl9767_disable_ssc_pll() and gl9767_set_ssc_pll_205mhz(). So the low power negotiation mode cannot be enabled again. Introduce gl9767_set_low_power_negotiation() function to fix it. The explanation process is as below. static void sdhci_gl9767_set_clock() { ... gl9767_vhs_write(); ... value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF; pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value); <--- (a) gl9767_disable_ssc_pll(); <--- (b) sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); if (clock == 0) return; <-- (I) ... if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) { ... gl9767_set_ssc_pll_205mhz(); <--- (c) } ... value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF; pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value); <-- (II) gl9767_vhs_read(); } (a) disable low power negotiation mode. When return on (I), the low power mode is disabled. After (b) and (c), VHS is read-only, the low power mode cannot be enabled on (II). Reported-by: Georg Gottleuber <ggo@tuxedocomputers.com> Fixes: d2754355512e ("mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767") Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Tested-by: Georg Gottleuber <ggo@tuxedocomputers.com> Cc: stable@vger.kernel.org Message-ID: <20241025060017.1663697-1-benchuanggli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25mmc: mtk-sd: add support for mt7988Frank Wunderlich
Add support for mmc on MT7988 SoC. We can use mt7986 platform data in driver, but mt7988 needs different clocks so for binding we need own compatible. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241012143826.7690-3-linux@fw-web.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25mmc: mtk-sd: Add support for MT8196Andy-ld Lu
Mediatek SoC MT8196 features a new design for tx/rx path. The new tx path incorporates register settings that are closely associated with bus timing. And the difference between new rx path and older versions is the usage of distinct register bits when setting the data sampling edge as part of the tuning process. Besides, the register settings for STOP_DLY_SEL and POP_EN_CNT are different from previous SoCs. For the changes mentioned in relation to the MT8196, the new compatible string 'mediatek,mt8196-mmc' is introduced. This is to accommodate different settings and workflows specific to the MT8196. Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241011024906.8173-3-andy-ld.lu@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25mmc: mtk-sd: Add stop_dly_sel and pop_en_cnt to platform dataAndy-ld Lu
There are modified register settings for STOP_DLY_SEL and POP_EN_CNT from our next generation SoCs, due to the advanced chip manufacturing process and the resulting changes in the internal signal timing. Add two new fields to the compatibility structure to reflect the modifications. For legacy SoCs, also add the original value of 'stop_dly_sel' to the platform data, for unified code setting. Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241011024906.8173-2-andy-ld.lu@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-pci-gli: enable UHS-II mode for GL9767Victor Shih
Changes are: * Enable the internal clock when do reset on UHS-II mode. * Increase timeout value before detecting UHS-II interface. * Add vendor settings for UHS-II mode. * Use the function sdhci_gli_wait_software_reset_done() for gl9767 reset. * Remove unnecessary code from sdhci_gl9767_reset(). Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Signed-off-by: Lucas Lai <lucas.lai@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-17-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-pci-gli: enable UHS-II mode for GL9755Victor Shih
Changes are: * Disable GL9755 overcurrent interrupt when power on/off on UHS-II. * Enable the internal clock when do reset on UHS-II mode. * Increase timeout value before detecting UHS-II interface. * Add vendor settings fro UHS-II mode. * Remove sdhci_gli_enable_internal_clock functon unused clk_ctrl variable. * Make a function sdhci_gli_wait_software_reset_done() for gl9755 reset. * Remove unnecessary code from sdhci_gl9755_reset(). Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Signed-off-by: Lucas Lai <lucas.lai@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-16-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit (git 2.34.1) at 2025-07-16 15:51:01 +0000