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path: root/drivers/mtd/nand
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2022-03-18Merge tag 'spi-nor/for-5.18' into mtd/nextMiquel Raynal
SPI NOR core changes: - move vendor specific code out of the core into vendor drivers. - unify all function and object names in the vendor modules. - make setup() callback optional to improve readability. - skip erase logic when the SPI_NOR_NO_ERASE flag is set at flash declaration. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-03-14mtd: nand: ecc: mxic: Fix compile test issueMiquel Raynal
Avoid random build errors with architectures which do not select HAS_IOMEM by depending on it in Kconfig. This fixes the following warning: /home/mraynal/0day/gcc-11.2.0-nolibc/s390-linux/bin/s390-linux-ld: drivers/mtd/nand/ecc-mxic.o: in function `mxic_ecc_probe': ecc-mxic.c:(.text+0x2244): undefined reference to `devm_platform_ioremap_resource' Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220314152336.75447-1-miquel.raynal@bootlin.com
2022-03-14mtd: nand: mxic-ecc: make two read-only arrays static constColin Ian King
Don't populate the read-only arrays possible_strength and spare_size on the stack but instead make them static const. Also makes the object code a little smaller. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220307230940.169235-1-colin.i.king@gmail.com
2022-03-14mtd: rawnand: atmel: fix refcount issue in atmel_nand_controller_initXin Xiong
The reference counting issue happens in several error handling paths on a refcounted object "nc->dmac". In these paths, the function simply returns the error code, forgetting to balance the reference count of "nc->dmac", increased earlier by dma_request_channel(), which may cause refcount leaks. Fix it by decrementing the refcount of specific object in those error paths. Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver") Co-developed-by: Xiyu Yang <xiyuyang19@fudan.edu.cn> Signed-off-by: Xiyu Yang <xiyuyang19@fudan.edu.cn> Co-developed-by: Xin Tan <tanxin.ctf@gmail.com> Signed-off-by: Xin Tan <tanxin.ctf@gmail.com> Signed-off-by: Xin Xiong <xiongx18@fudan.edu.cn> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220304085330.3610-1-xiongx18@fudan.edu.cn
2022-03-14mtd: rawnand: rockchip: fix platform_get_irq.cocci warningYihao Han
Remove dev_err() messages after platform_get_irq*() failures. platform_get_irq() already prints an error. Generated by: scripts/coccinelle/api/platform_get_irq.cocci Signed-off-by: Yihao Han <hanyihao@vivo.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220303123431.3170-1-hanyihao@vivo.com
2022-03-07mtd: rawnand: omap2: Actually prevent invalid configuration and build errorRoger Quadros
The root of the problem is that we are selecting symbols that have dependencies. This can cause random configurations that can fail. The cleanest solution is to avoid using select. This driver uses interfaces from the OMAP_GPMC driver so we have to depend on it instead. Fixes: 4cd335dae3cf ("mtd: rawnand: omap2: Prevent invalid configuration and build error") Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/linux-mtd/20220219193600.24892-1-rogerq@kernel.org
2022-02-18mtd: rawnand: stm32_fmc2: Add NAND Write Protect supportChristophe Kerello
This patch adds the support of the WP# signal. WP will be disabled in probe/resume callbacks and will be enabled in remove/suspend callbacks. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220217144755.270679-3-christophe.kerello@foss.st.com
2022-02-18mtd: rawnand: pl353: Set the nand chip node as the flash nodeAmit Kumar Mahapatra
In devicetree the flash information is embedded within nand chip node, so during nand chip initialization the nand chip node should be passed to nand_set_flash_node() api, instead of nand controller node. Fixes: 08d8c62164a3 ("mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller") Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220209053427.27676-1-amit.kumar-mahapatra@xilinx.com
2022-02-18Merge tag 'mtd/spi-mem-ecc-for-5.18' into mtd/nextMiquel Raynal
Topic branch bringing-in changes related to the support of ECC engines that can be used by SPI controllers to manage SPI NANDs as well as possibly by parallel NAND controllers. In particular, it brings support for Macronix ECC engine that can be used with Macronix SPI controller. The changes touch the NAND core, the NAND ECC core, the spi-mem layer, a SPI controller driver and add a new NAND ECC driver, as well as a number of binding updates. Binding changes: * Vendor prefixes: Clarify Macronix prefix * SPI NAND: Convert spi-nand description file to yaml * Raw NAND chip: Create a NAND chip description * Raw NAND controller: - Harmonize the property types - Fix a comment in the examples - Fix the reg property description * Describe Macronix NAND ECC engine * Macronix SPI controller: - Document the nand-ecc-engine property - Convert to yaml - The interrupt property is not mandatory NAND core changes: * ECC: - Add infrastructure to support hardware engines - Add a new helper to retrieve the ECC context - Provide a helper to retrieve a pilelined engine device NAND-ECC changes: * Macronix ECC engine: - Add Macronix external ECC engine support - Support SPI pipelined mode SPI-NAND core changes: * Delay a little bit the dirmap creation * Create direct mapping descriptors for ECC operations SPI-NAND driver changes: * macronix: Use random program load SPI changes: * Macronix SPI controller: - Fix the transmit path - Create a helper to configure the controller before an operation - Create a helper to ease the start of an operation - Add support for direct mapping - Add support for pipelined ECC operations * spi-mem: - Introduce a capability structure - Check the controller extra capabilities - cadence-quadspi/mxic: Provide capability structures - Kill the spi_mem_dtr_supports_op() helper - Add an ecc parameter to the spi_mem_op structure
2022-02-10mtd: spinand: Create direct mapping descriptors for ECC operationsMiquel Raynal
In order for pipelined ECC engines to be able to enable/disable the ECC engine only when needed and avoid races when future parallel-operations will be supported, we need to provide the information about the use of the ECC engine in the direct mapping hooks. As direct mapping configurations are meant to be static, it is best to create two new mappings: one for regular 'raw' accesses and one for accesses involving correction. It is up to the driver to use or not the new ECC enable boolean contained in the spi-mem operation. As dirmaps are not free (they consume a few pages of MMIO address space) and because these extra entries are only meant to be used by pipelined engines, let's limit their use to this specific type of engine and save a bit of memory with all the other setups. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-9-miquel.raynal@bootlin.com
2022-02-10mtd: spinand: Delay a little bit the dirmap creationMiquel Raynal
As we will soon tweak the dirmap creation to act a little bit differently depending on the picked ECC engine, we need to initialize dirmaps after ECC engines. This should not have any effect as dirmaps are not yet used at this point. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-8-miquel.raynal@bootlin.com
2022-02-10mtd: nand: mxic-ecc: Support SPI pipelined modeMiquel Raynal
Introduce the support for another possible configuration: the ECC engine may work as DMA master (pipelined) and move itself the data to/from the NAND chip into the buffer, applying the necessary corrections/computations on the fly. This driver offers an ECC engine implementation that must be instatiated from a SPI controller driver. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-17-miquel.raynal@bootlin.com
2022-02-09mtd: nand: ecc: Provide a helper to retrieve a pilelined engine deviceMiquel Raynal
In a pipelined engine situation, we might either have the host which internally has support for error correction, or have it using an external hardware block for this purpose. In the former case, the host is also the ECC engine. In the latter case, it is not. In order to get the right pointers on the right devices (for example: in order to devm_* allocate variables), let's introduce this helper which can safely be called by pipelined ECC engines in order to retrieve the right device structure. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-16-miquel.raynal@bootlin.com
2022-02-09mtd: nand: mxic-ecc: Add Macronix external ECC engine supportMiquel Raynal
Some SPI-NAND chips do not support on-die ECC. For these chips, correction must apply on the SPI controller end. In order to avoid doing all the calculations by software, Macronix provides a specific engine that can offload the intensive work. Add Macronix ECC engine support, this engine can work in conjunction with a SPI controller and a raw NAND controller, it can be pipelined or external and supports linear and syndrome layouts. Right now the simplest configuration is supported: SPI controller external and linear ECC engine. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-15-miquel.raynal@bootlin.com
2022-02-09mtd: rawnand: protect access to rawnand devices while in suspendSean Nyekjaer
Prevent rawnand access while in a suspended state. Commit 013e6292aaf5 ("mtd: rawnand: Simplify the locking") allows the rawnand layer to return errors rather than waiting in a blocking wait. Tested on a iMX6ULL. Fixes: 013e6292aaf5 ("mtd: rawnand: Simplify the locking") Signed-off-by: Sean Nyekjaer <sean@geanix.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220208085213.1838273-1-sean@geanix.com
2022-02-07mtd: Replace the expert mode symbols with a single helperMiquel Raynal
Reduce the number of exported symbols by replacing: - mtd_expert_analysis_warning (the error string) - mtd_expert_analysis_mode (the boolean) with a single helper: - mtd_check_expert_analysis_mode Calling this helper will both check/return the content of the internal boolean -which is not exported anymore- and as well conditionally WARN_ONCE() the user, like it was done before. While on this function, make the error string local to the helper and set it const. Only export this helper when CONFIG_DEBUG_FS is defined to limit the growth of the Linux kernel size only for a debug feature on production kernels. Mechanically update all the consumers. Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220128113414.1121924-1-miquel.raynal@bootlin.com
2022-02-02block: remove genhd.hChristoph Hellwig
There is no good reason to keep genhd.h separate from the main blkdev.h header that includes it. So fold the contents of genhd.h into blkdev.h and remove genhd.h entirely. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com> Link: https://lore.kernel.org/r/20220124093913.742411-4-hch@lst.de Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-01-31mtd: rawnand: Fix misuses of of_match_node()Miquel Raynal
On non-OF enabled platforms (CONFIG_OF is not set), of_match_node() will expand to NULL. The of_device_id array pointed by the macro will then be left unused. Let's mark the array __maybe_unused in this case to prevent compiler warnings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/linux-mtd/20220127110802.1064963-1-miquel.raynal@bootlin.com
2022-01-31mtd: Fix misuses of of_match_ptr()Miquel Raynal
of_match_ptr() either expands to NULL if !CONFIG_OF, or is transparent otherwise. There are several drivers using this macro which keep their of_device_id array enclosed within an #ifdef CONFIG_OF check, these are considered fine. However, When misused, the of_device_id array pointed by this macro will produce a warning because it is finally unused when compiled without OF support. A number of fixes are possible: - Always depend on CONFIG_OF, but this will not always work and may break boards. - Enclose the compatible array by #ifdef's, this may save a bit of memory but will reduce build coverage. - Tell the compiler the array may be unused, if this can be avoided, let's not do this. - Just drop the macro, setting the of_device_id array for a non OF enabled platform is not an issue, it will just be unused. The latter solution seems the more appropriate, so let's use it. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/linux-mtd/20220127110631.1064705-1-miquel.raynal@bootlin.com
2022-01-31mtd: rawnand: brcmnand: Fixed incorrect sub-page ECC statusdavid regan
The brcmnand driver contains a bug in which if a page (example 2k byte) is read from the parallel/ONFI NAND and within that page a subpage (512 byte) has correctable errors which is followed by a subpage with uncorrectable errors, the page read will return the wrong status of correctable (as opposed to the actual status of uncorrectable.) The bug is in function brcmnand_read_by_pio where there is a check for uncorrectable bits which will be preempted if a previous status for correctable bits is detected. The fix is to stop checking for bad bits only if we already have a bad bits status. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: david regan <dregan@mail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/trinity-478e0c09-9134-40e8-8f8c-31c371225eda-1643237024774@3c-app-mailcom-lxa02
2022-01-26mtd: rawnand: brcmnand: Fix sparse warnings in bcma_nandFlorian Fainelli
sparse was unhappy about the way we woulc call cpu_to_be32/be32_to_cpu, apply the appropriate casting to silence the warnings. Reported-by: kernel test robot <lkp@intel.com> Link: https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org/thread/ZNHPJFYLO64EGI5QUT7HZ63J7O5J2G7N/ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220125225243.15201-1-f.fainelli@gmail.com
2022-01-26mtd: rawnand: gpmi: don't leak PM reference in error pathChristian Eggers
If gpmi_nfc_apply_timings() fails, the PM runtime usage counter must be dropped. Reported-by: Pavel Machek <pavel@denx.de> Fixes: f53d4c109a66 ("mtd: rawnand: gpmi: Add ERR007117 protection for nfc_apply_timings") Signed-off-by: Christian Eggers <ceggers@arri.de> Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220125081619.6286-1-ceggers@arri.de
2022-01-25mtd: rawnand: omap2: Prevent invalid configuration and build errorRoger Quadros
We need to select MEMORY as well otherwise OMAP_GPMC will not be built. For simplicity let's select MEMORY and OMAP_GPMC unconditionally as this driver depends on OMAP_GPMC driver and uses symbols from there. Fixes: dbcb124acebd ("mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220118123525.8020-1-rogerq@kernel.org
2022-01-25mtd: rawnand: qcom: Fix clock sequencing in qcom_nandc_probe()Bryan O'Donoghue
Interacting with a NAND chip on an IPQ6018 I found that the qcomsmem NAND partition parser was returning -EPROBE_DEFER waiting for the main smem driver to load. This caused the board to reset. Playing about with the probe() function shows that the problem lies in the core clock being switched off before the nandc_unalloc() routine has completed. If we look at how qcom_nandc_remove() tears down allocated resources we see the expected order is qcom_nandc_unalloc(nandc); clk_disable_unprepare(nandc->aon_clk); clk_disable_unprepare(nandc->core_clk); dma_unmap_resource(&pdev->dev, nandc->base_dma, resource_size(res), DMA_BIDIRECTIONAL, 0); Tweaking probe() to both bring up and tear-down in that order removes the reset if we end up deferring elsewhere. Fixes: c76b78d8ec05 ("mtd: nand: Qualcomm NAND controller driver") Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220103030316.58301-2-bryan.odonoghue@linaro.org
2022-01-25mtd: rawnand: ingenic: Fix missing put_device in ingenic_ecc_getMiaoqian Lin
If of_find_device_by_node() succeeds, ingenic_ecc_get() doesn't have a corresponding put_device(). Thus add put_device() to fix the exception handling. Fixes: 15de8c6efd0e ("mtd: rawnand: ingenic: Separate top-level and SoC specific code") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211230072751.21622-1-linmq006@gmail.com
2022-01-23mtd: rawnand: omap_elm: remove redundant variable 'errors'Colin Ian King
The variable 'errors' is being used to sum the number of errors but it is never used afterwards. This can be considered a redundant set of operations and can be removed. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211221181340.524639-1-colin.i.king@gmail.com
2022-01-23mtd: rawnand: gpmi: support fast edo timings for mx28Dario Binacchi
In the i.MX28 manual (MCIMX28RM, Rev. 1, 2010) you can find an example (15.2.4 High-Speed NAND Timing) of how to configure the GPMI controller to manage High-Speed ​​NAND devices, so it was wrong to assume that only i.MX6 can achieve EDO timings. This patch has been tested on a 2048/64 byte NAND (Micron MT29F2G08ABAEAH4). Kernel mtd tests: - mtd_nandbiterrs - mtd_nandecctest - mtd_oobtest - mtd_pagetest - mtd_readtest - mtd_speedtest - mtd_stresstest - mtd_subpagetest - mtd_torturetest [cycles_count = 10000000] run without errors. Before this patch (mode 0): --------------------------- eraseblock write speed is 2098 KiB/s eraseblock read speed is 2680 KiB/s page write speed is 1689 KiB/s page read speed is 2522 KiB/s 2 page write speed is 1899 KiB/s 2 page read speed is 2579 KiB/s erase speed is 128000 KiB/s 2x multi-block erase speed is 73142 KiB/s 4x multi-block erase speed is 204800 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s After this patch (mode 5): ------------------------- eraseblock write speed is 3390 KiB/s eraseblock read speed is 5688 KiB/s page write speed is 2680 KiB/s page read speed is 4876 KiB/s 2 page write speed is 2909 KiB/s 2 page read speed is 5224 KiB/s erase speed is 170666 KiB/s 2x multi-block erase speed is 204800 KiB/s 4x multi-block erase speed is 256000 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Tested-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220118095434.35081-5-dario.binacchi@amarulasolutions.com
2022-01-23mtd: rawnand: gpmi: validate controller clock rateDario Binacchi
What to do when the real rate of the gpmi clock is not equal to the required one? The solutions proposed in [1] did not lead to a conclusion on how to validate the clock rate, so, inspired by the document [2], I consider the rate correct only if not lower or equal to the rate of the previous edo mode. In fact, in chapter 4.16.2 (NV-DDR) of the document [2], it is written that "If the host selects timing mode n, then its clock period shall be faster than the clock period of timing mode n-1 and slower than or equal to the clock period of timing mode n.". I thought that it could therefore also be used in this case, without therefore having to define the valid rate ranges empirically. For example, suppose that gpmi_nfc_compute_timings() is called to set edo mode 5 (100MHz) but the rate returned by clk_round_rate() is 80MHz (edo mode 4). In this case gpmi_nfc_compute_timings() will return error, and will be called again to set edo mode 4, which this time will be successful. [1] https://lore.kernel.org/r/20210702065350.209646-5-ebiggers@kernel.org [2] http://www.onfi.org/-/media/client/onfi/specs/onfi_3_0_gold.pdf?la=en Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Tested-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220118095434.35081-4-dario.binacchi@amarulasolutions.com
2022-01-23mtd: rawnand: gpmi: fix controller timings settingDario Binacchi
Set the controller registers according to the real clock rate. The controller registers configuration (setup, hold, timeout, ... cycles) depends on the clock rate of the GPMI. Using the real rate instead of the ideal one, avoids that this inaccuracy (required_rate - real_rate) affects the registers setting. This patch has been tested on two custom boards with i.MX28 and i.MX6 SOCs: - i.MX28: required rate 100MHz, real rate 99.3MHz - i.MX6 required rate 100MHz, real rate 99MHz Fixes: b1206122069a ("mtd: rawnand: gpmi: use core timings instead of an empirical derivation") Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Tested-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220118095434.35081-3-dario.binacchi@amarulasolutions.com
2022-01-23mtd: rawnand: brcmnand: Add BCMA shimFlorian Fainelli
Add a BCMA shim to allow us to register the brcmnand driver using the BCMA bus which provides indirect memory mapped access to SoC registers. There are a number of registers that need to be byte swapped because they are natively big endian, coming directly from the NAND chip, and there is no bus interface unlike the iProc or STB platforms that performs the byte swapping for us. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-10-f.fainelli@gmail.com
2022-01-23mtd: rawnand: brcmnand: BCMA controller uses command shift of 0Florian Fainelli
For some odd and unexplained reason the BCMA NAND controller, albeit revision 3.4 uses a command shift of 0 instead of 24 as it should be, quirk that. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-9-f.fainelli@gmail.com
2022-01-23mtd: rawnand: brcmnand: Allow platform data instantationFlorian Fainelli
Make use of the recently refactored code in brcmnand_init_cs() and derive the chip-select from the platform data that is supplied. Update the various code paths to avoid relying on possibly non-existent resources, too. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-8-f.fainelli@gmail.com
2022-01-23mtd: rawnand: brcmnand: Allow working without interruptsFlorian Fainelli
The BCMA devices include the brcmnand controller but they do not wire up any interrupt line, allow the main interrupt to be optional and update the completion path to also check for the lack of an interrupt line. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-6-f.fainelli@gmail.com
2022-01-23mtd: rawnand: brcmnand: Move OF operations out of brcmnand_init_cs()Florian Fainelli
In order to initialize a given chip select object for use by the brcmnand driver, move all of the Device Tree specific routines outside of brcmnand_init_cs() in order to make it usable in a platform data configuration which will be necessary for supporting BCMA chips. No functional changes introduced. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-5-f.fainelli@gmail.com
2022-01-23mtd: rawnand: brcmnand: Avoid pdev in brcmnand_init_cs()Florian Fainelli
In preparation for encapsulating more of what the loop calling brcmnand_init_cs() does, avoid using platform_device when it is the device behind platform_device that we are using for printing errors. No functional changes introduced. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-4-f.fainelli@gmail.com
2022-01-23mtd: rawnand: brcmnand: Allow SoC to provide I/O operationsFlorian Fainelli
Allow a brcmnand_soc instance to provide a custom set of I/O operations which we will require when using this driver on a BCMA bus which is not directly memory mapped I/O. Update the nand_{read,write}_reg accordingly to use the SoC operations if provided. To minimize the penalty on other SoCs which do support standard MMIO accesses, we use a static key which is disabled by default and gets enabled if a soc implementation does provide I/O operations. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-3-f.fainelli@gmail.com
2022-01-23mtd: rawnand: brcmnand: Assign soc as early as possibleFlorian Fainelli
In order to key off the brcmnand_probe() code in subsequent changes depending upon ctrl->soc, assign that variable as early as possible, instead of much later when we have checked that it is non-NULL. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-2-f.fainelli@gmail.com
2022-01-23mtd: rawnand: Rework of_get_nand_bus_width()Tudor Ambarus
of_get_nand_bus_width() had a wrong behavior because: 1/ it ignored the -ENODATA and -EOVERFLOW return values of of_property_read_u32(). "nand-bus-width" without value was tolerated while it shouldn't have been according to the devicetree bindings. 2/ returned -EIO when the nand-bus-width was neither 8 nor 16, when it should have returned -EINVAL instead. 3/ returned the 8 or 16 bus-width integer, but it was never used it its caller. A simply return 0 on success is enough. Rework of_get_nand_bus_width() and address all the above. The execution is now stopped in case of errors. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220106131610.225661-2-tudor.ambarus@microchip.com
2022-01-23mtd: rawnand: Remove of_get_nand_on_flash_bbt() wrapperTudor Ambarus
Remove the wrapper as it hides for no reason what we really want: find an of_property. Removing the wrapper makes the code easier to read. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220106131610.225661-1-tudor.ambarus@microchip.com
2022-01-23mtd: onenand: Check for error irqJiasheng Jiang
For the possible failure of the platform_get_irq(), the returned irq could be error number and will finally cause the failure of the request_irq(). Consider that platform_get_irq() can now in certain cases return -EPROBE_DEFER, and the consequences of letting request_irq() effectively convert that into -EINVAL, even at probe time rather than later on. So it might be better to check just now. Fixes: 2c22120fbd01 ("MTD: OneNAND: interrupt based wait support") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220104162658.1988142-1-jiasheng@iscas.ac.cn
2022-01-23mtd: rawnand: nandsim: Add NS_PAGE_BYTE_SHIFT macro to replace the repeat ↵RinHizakura
pattern The (ns->regs.column + ns->regs.off) pattern repeats a lot which represents the byte shift in next page to access. We can replace it with a macro to improve the readability. Signed-off-by: RinHizakura <s921975628@gmail.com> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211225100713.119089-1-s921975628@gmail.com
2022-01-23mtd: rawnand: nandsim: Merge repeat codes in ns_switch_stateRinHizakura
The moving block of codes is shared between both 'if' and 'else' condition, we can move it out to reduce the duplication. Signed-off-by: RinHizakura <s921975628@gmail.com> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211225100648.119011-1-s921975628@gmail.com
2022-01-23mtd: rawnand: nandsim: Replace overflow check with kzalloc to single kcallocRinHizakura
Instead of self-checking overflow and allocating an array of specific size by counting the total required space handy, we already have existed kernel API which responses for all these works. Signed-off-by: RinHizakura <s921975628@gmail.com> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211225100607.118932-1-s921975628@gmail.com
2022-01-23mtd: nand: ecc: Add infrastructure to support hardware enginesMiquel Raynal
Add the necessary helpers to register/unregister hardware ECC engines that will be called from ECC engine drivers. Also add helpers to get the right engine from the user perspective. Keep a reference of the in use ECC engine in order to prevent modules to be unloaded. Put the reference when the engine gets retired. A static list of hardware (only) ECC engines is setup to keep track of the registered engines. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-13-miquel.raynal@bootlin.com
2022-01-23mtd: spinand: macronix: Use random program loadMason Yang
Macronix SPI-NAND chips might benefit from an external ECC engine. Such an engine might need to access random columns, thus needing to use random commands (0x84 instead of 0x02). Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-12-miquel.raynal@bootlin.com
2022-01-14Merge tag 'mips_5.17' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - add support for more BCM47XX based devices - add MIPS support for brcmstb PCIe controller - add Loongson 2K1000 reset driver - remove board support for rbtx4938/rbtx4939 - remove support for TX4939 SoCs - fixes and cleanups * tag 'mips_5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (59 commits) MIPS: ath79: drop _machine_restart again PCI: brcmstb: Augment driver for MIPs SOCs MIPS: bmips: Remove obsolete DMA mapping support MIPS: bmips: Add support PCIe controller device nodes dt-bindings: PCI: Add compatible string for Brcmstb 74[23]5 MIPs SOCs MIPS: compressed: Fix build with ZSTD compression MIPS: BCM47XX: Add support for Netgear WN2500RP v1 & v2 MIPS: BCM47XX: Add support for Netgear R6300 v1 MIPS: BCM47XX: Add LEDs and buttons for Asus RTN-10U MIPS: BCM47XX: Add board entry for Linksys WRT320N v1 MIPS: BCM47XX: Define Linksys WRT310N V2 buttons MIPS: Remove duplicated include in local.h MIPS: retire "asm/llsc.h" MIPS: rework local_t operation on MIPS64 MIPS: fix local_{add,sub}_return on MIPS64 mips/pci: remove redundant ret variable MIPS: Loongson64: Add missing of_node_put() in ls2k_reset_init() MIPS: new Kconfig option ZBOOT_LOAD_ADDRESS MIPS: enable both vmlinux.gz.itb and vmlinuz for generic MIPS: signal: Return immediately if call fails ...
2022-01-14Merge tag 'sound-5.17-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "It's a relatively calm development cycle, but still lots of updates in the driver side like Intel SOF. Below are some highlights: ALSA / ASoC core: - A new kselftest for ALSA control API - PCM NO_REWINDS support - Potential race fixes around control removals - Unify x86 SG-buffer memory allocation code - Cleanups and race fixes for ASoC DPCM locking ASoC: - Refinements and cleanups around the delay() APIs - Wider use of dev_err_probe(). - Continuing cleanups and improvements to the SOF code - Support for pin switches in simple-card derived cards - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20 S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments TLV320ADC3xxx HD-audio / USB-audio: - Fix deadlock at HD-audio codec unbinding - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device Misc: - Fix virmidi drain behavior Note that the merge of CS35L41 codec support is still half-baked, and at least one ACPI change is missing. Although this won't hinder the kernel build itself, we're going to catch up before RC1" * tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits) ALSA: hda: intel-dsp-config: reorder the config table ALSA: hda: intel-dsp-config: add JasperLake support ALSA: hda: cs35l41: fix double free on error in probe() ALSA: hda: Fix dependencies of CS35L41 on SPI/I2C buses ALSA: hda: Fix dependency on ASoC cs35l41 codec ASoC: cs35l41: Add support for hibernate memory retention mode ASoC: cs35l41: Update handling of test key registers ALSA: intel_hdmi: Check for error num after setting mask ASoC: wcd9335: Keep a RX port value for each SLIM RX mux ASoC: amd: acp: acp-mach: Change default RT1019 amp dev id ALSA: virmidi: Remove duplicated code ALSA: seq: virmidi: Add a drain operation ASoC: topology: Fix typo ASoC: fsl_asrc: refine the check of available clock divider ASoC: Intel: bytcr_rt5640: Add support for external GPIO jack-detect ASoC: Intel: bytcr_rt5640: Support retrieving the codec IRQ from the AMCR0F28 ACPI dev ASoC: rt5640: Add support for boards with an external jack-detect GPIO ASoC: rt5640: Allow snd_soc_component_set_jack() to override the codec IRQ ASoC: rt5640: Change jack_work to a delayed_work ASoC: rt5640: Fix possible NULL pointer deref on resume ...
2022-01-11Merge tag 'mtd/for-5.17' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "MTD core changes: - mtdchar: Prevent unbounded allocation in MEMWRITE ioctl - gen_probe: Use bitmap_zalloc() when applicable - Introduce an expert mode for forensics and debugging purposes - Clear out unregistered devices a bit more - Provide unique name for nvmem device - Remove unused header file <linux/mtd/latch-addr-flash.h> - Fixed breaking list in __mtd_del_partition. MTD device changes: - Warn about failure to unregister mtd device in sst25l, mchp48l640, mchp23k256, and dataflash drivers. Raw NAND core changes: - Export nand_read_page_hwecc_oob_first() GPMC memory controller for OMAP2 NAND controller changes: - Add support for AM64 SoC and allow build on K3 platforms - Use a compatible match table when checking for NAND controller - Use platform_get_irq() to get the interrupt Raw NAND controller changes: - OMAP2 NAND controller: - Document the missing 'rb-gpios' DT property - Drop unused variable - Fix force_8bit flag behaviour for DMA mode - Move to exec_op interface - Use platform_get_irq() to get the interrupt - Renesas: - Add new NAND controller driver with its bindings and MAINTAINERS entry - Onenand: - Remove redundant variable ooblen - MPC5121: - Remove unused variable in ads5121_select_chip() - GPMI: - Add ERR007117 protection for nfc_apply_timings - Remove explicit default gpmi clock setting for i.MX6 - Use platform_get_irq_byname() to get the interrupt - Remove unneeded variable - Ingenic: - JZ4740 needs 'oob_first' read page function - Davinci: - Rewrite function description - Avoid duplicated page read - Don't calculate ECC when reading page SPI NOR core changes: - Add Pratyush as SPI NOR co-maintainer. - Flash parameters initialization was done in a spaghetti way. Clean flash parameters initialization. - Rework the flash_info flags and clarify where one should be used. - Initialize all flash parameters based on JESD216 SFDP where possible. Flash parameters and settings that are SFDP discoverable should not be duplicated via flash_info flags at flash declaration. - Remove debugfs entries that duplicate sysfs entries. SPI NOR manufacturer driver changes: - Use late_init() hook in various drivers to make it clear that those flash parameters are either not declared in the JESD216 SFDP standard, or the SFDP tables which define those flash parameters are not defined by the flash. - Fix mtd size for s3an flashes. - Write 2 bytes when disabling Octal DTR mode: 1 byte long transactions are not allowed in 8D-8D-8D mode. Hyperbus changes: - Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on module remove and for missing check for error value in probe" * tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (71 commits) mtd: spi-nor: Remove debugfs entries that duplicate sysfs entries mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR mode mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode mtd: spi-nor: core: use 2 data bytes for template ops mtd: spi-nor: Constify part specific fixup hooks mtd: spi-nor: core: Remove reference to spi-nor.c mtd: rawnand: gpmi: Use platform_get_irq_byname() to get the interrupt mtd: rawnand: omap_elm: Use platform_get_irq() to get the interrupt mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3 memory: omap-gpmc: Use a compatible match table when checking for NAND controller memory: omap-gpmc: Add support for GPMC on AM64 SoC dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64 memory: omap-gpmc: Use platform_get_irq() to get the interrupt MAINTAINERS: Add an entry for Renesas NAND controller mtd: rawnand: renesas: Add new NAND controller driver dt-bindings: mtd: renesas: Describe Renesas R-Car Gen3 & RZ/N1 NAND controller mtd: rawnand: gpmi: remove unneeded variable mtd: rawnand: omap2: drop unused variable mtd: rawnand: omap2: fix force_8bit flag behaviour for DMA mode mtd: rawnand: omap2: Add compatible for AM64 SoC ...
2022-01-10Merge tag 'drivers-5.17' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are cleanups and minor bugfixes across several SoC specific drivers, for Qualcomm, Samsung, NXP i.MX, AT91, Tegra, Keystone, Renesas, ZynqMP Noteworthy new features are: - The op-tee firmware driver gains support for asynchronous notifications from secure-world firmware. - Qualcomm platforms gain support for new SoC types in various drivers: power domain, cache controller, RPM sleep, soc-info - Samsung SoC drivers gain support for new SoCs in ChipID and PMU, as well as a new USIv2 driver that handles various types of serial communiction (uart, i2c, spi) - Renesas adds support for R-Car S4-8 (R8A779F0) in multiple drivers, as well as memory controller support for RZ/G2L (R9A07G044). - Apple M1 gains support for the PMGR power management driver" * tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits) soc: qcom: rpmh-rsc: Fix typo in a comment soc: qcom: socinfo: Add SM6350 and SM7225 dt-bindings: arm: msm: Don't mark LLCC interrupt as required dt-bindings: firmware: scm: Add SM6350 compatible dt-bindings: arm: msm: Add LLCC for SM6350 soc: qcom: rpmhpd: Sort power-domain definitions and lists soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280 soc: qcom: rpmhpd: Rename rpmhpd struct names soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao soc: qcom: socinfo: add SM8450 ID soc: qcom: rpmhpd: Add SM8450 power domains dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding soc: qcom: smem: Update max processor count dt-bindings: arm: qcom: Document SM8450 SoC and boards dt-bindings: firmware: scm: Add SM8450 compatible dt-bindings: arm: cpus: Add kryo780 compatible soc: qcom: rpmpd: Add support for sm6125 dt-bindings: qcom-rpmpd: Add sm6125 power domains soc: qcom: aoss: constify static struct thermal_cooling_device_ops PM: AVS: qcom-cpr: Use div64_ul instead of do_div ...
2022-01-02MIPS: TXX9: Remove TX4939 SoC supportThomas Bogendoerfer
After removal of RBTX4939 board support remove code for the TX4939 SoC. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
generated by cgit (git 2.34.1) at 2025-07-19 16:09:58 +0000