From 98d28ac2f511a29d608326e50e3b1061ec18e9f3 Mon Sep 17 00:00:00 2001 From: Nirmoy Das Date: Mon, 15 Feb 2021 15:26:45 -0500 Subject: drm/amdgpu: do not use drm middle layer for debugfs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use debugfs API directly instead of drm middle layer. This also includes following debugfs file output changes: 1 amdgpu_evict_vram/amdgpu_evict_gtt output will not contain any braces. e.g. (0) --> 0 2 amdgpu_gpu_recover output will print return value of amdgpu_device_gpu_recover() instead of not so important "gpu recover" message. v2: * checkpatch.pl: use '0444' instead of S_IRUGO. * remove S_IFREG from mode. * remove mode variable. Signed-off-by: Nirmoy Das Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 3c37cf1ae8b7..cf81ade31703 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -27,7 +27,6 @@ */ #include "amdgpu.h" -#include #include #include "amdgpu_uvd.h" #include "amdgpu_vce.h" @@ -1264,11 +1263,9 @@ void amdgpu_disable_vblank_kms(struct drm_crtc *crtc) */ #if defined(CONFIG_DEBUG_FS) -static int amdgpu_debugfs_firmware_info(struct seq_file *m, void *data) +static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused) { - struct drm_info_node *node = (struct drm_info_node *) m->private; - struct drm_device *dev = node->minor->dev; - struct amdgpu_device *adev = drm_to_adev(dev); + struct amdgpu_device *adev = (struct amdgpu_device *)m->private; struct drm_amdgpu_info_firmware fw_info; struct drm_amdgpu_query_fw query_fw; struct atom_context *ctx = adev->mode_info.atom_context; @@ -1474,17 +1471,18 @@ static int amdgpu_debugfs_firmware_info(struct seq_file *m, void *data) return 0; } -static const struct drm_info_list amdgpu_firmware_info_list[] = { - {"amdgpu_firmware_info", amdgpu_debugfs_firmware_info, 0, NULL}, -}; +DEFINE_SHOW_ATTRIBUTE(amdgpu_debugfs_firmware_info); + #endif -int amdgpu_debugfs_firmware_init(struct amdgpu_device *adev) +void amdgpu_debugfs_firmware_init(struct amdgpu_device *adev) { #if defined(CONFIG_DEBUG_FS) - return amdgpu_debugfs_add_files(adev, amdgpu_firmware_info_list, - ARRAY_SIZE(amdgpu_firmware_info_list)); -#else - return 0; + struct drm_minor *minor = adev_to_drm(adev)->primary; + struct dentry *root = minor->debugfs_root; + + debugfs_create_file("amdgpu_firmware_info", 0444, root, + adev, &amdgpu_debugfs_firmware_info_fops); + #endif } -- cgit From f35e9bdb06fbfa8a6fe9d25390fbee2ee5e7a329 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 7 Jan 2021 16:48:01 -0500 Subject: drm/amdgpu: add INFO ioctl support for querying video caps (v4) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We currently hardcode these in mesa, but querying them from the kernel makes more sense since there may be board specific limitations that the kernel driver is better suited to determining. Userpace patches that use this interface: https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps v2: reorder the codecs to better align with mesa v3: add max_pixels_per_frame to handle the portrait case, squash in memory leak fix v4: drop extra break Reviewed-by: Christian König Reviewed-by: Leo Liu (v2) Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 57 +++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index cf81ade31703..9f35e8a6c421 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -982,6 +982,63 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) min_t(u64, size, sizeof(ras_mask))) ? -EFAULT : 0; } + case AMDGPU_INFO_VIDEO_CAPS: { + const struct amdgpu_video_codecs *codecs; + struct drm_amdgpu_info_video_caps *caps; + int r; + + switch (info->video_cap.type) { + case AMDGPU_INFO_VIDEO_CAPS_DECODE: + r = amdgpu_asic_query_video_codecs(adev, false, &codecs); + if (r) + return -EINVAL; + break; + case AMDGPU_INFO_VIDEO_CAPS_ENCODE: + r = amdgpu_asic_query_video_codecs(adev, true, &codecs); + if (r) + return -EINVAL; + break; + default: + DRM_DEBUG_KMS("Invalid request %d\n", + info->video_cap.type); + return -EINVAL; + } + + caps = kzalloc(sizeof(*caps), GFP_KERNEL); + if (!caps) + return -ENOMEM; + + for (i = 0; i < codecs->codec_count; i++) { + int idx = codecs->codec_array[i].codec_type; + + switch (idx) { + case AMDGPU_VIDEO_CODEC_TYPE_MPEG2: + case AMDGPU_VIDEO_CODEC_TYPE_MPEG4: + case AMDGPU_VIDEO_CODEC_TYPE_MPEG4_AVC: + case AMDGPU_VIDEO_CODEC_TYPE_VC1: + case AMDGPU_VIDEO_CODEC_TYPE_HEVC: + case AMDGPU_VIDEO_CODEC_TYPE_JPEG: + case AMDGPU_VIDEO_CODEC_TYPE_VP9: + case AMDGPU_VIDEO_CODEC_TYPE_AV1: + caps->codec_info[idx].valid = 1; + caps->codec_info[idx].max_width = + codecs->codec_array[i].max_width; + caps->codec_info[idx].max_height = + codecs->codec_array[i].max_height; + caps->codec_info[idx].max_pixels_per_frame = + codecs->codec_array[i].max_pixels_per_frame; + caps->codec_info[idx].max_level = + codecs->codec_array[i].max_level; + break; + default: + break; + } + } + r = copy_to_user(out, caps, + min((size_t)size, sizeof(*caps))) ? -EFAULT : 0; + kfree(caps); + return r; + } default: DRM_DEBUG_KMS("Invalid request %d\n", info->query); return -EINVAL; -- cgit From 6f786950b1ff051c6dd913b1bb3aaa9b57befcbf Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 2 Feb 2021 11:11:45 -0500 Subject: drm/amdgpu/codec: drop the internal codec index MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit And just use the ioctl index. They are the same. Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 9f35e8a6c421..a5ed84bc83f7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -1012,14 +1012,14 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) int idx = codecs->codec_array[i].codec_type; switch (idx) { - case AMDGPU_VIDEO_CODEC_TYPE_MPEG2: - case AMDGPU_VIDEO_CODEC_TYPE_MPEG4: - case AMDGPU_VIDEO_CODEC_TYPE_MPEG4_AVC: - case AMDGPU_VIDEO_CODEC_TYPE_VC1: - case AMDGPU_VIDEO_CODEC_TYPE_HEVC: - case AMDGPU_VIDEO_CODEC_TYPE_JPEG: - case AMDGPU_VIDEO_CODEC_TYPE_VP9: - case AMDGPU_VIDEO_CODEC_TYPE_AV1: + case AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2: + case AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4: + case AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1: + case AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC: + case AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC: + case AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG: + case AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9: + case AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1: caps->codec_info[idx].valid = 1; caps->codec_info[idx].max_width = codecs->codec_array[i].max_width; -- cgit From 4890d4e94da09e5b16d598af4d0d9179ec5a7700 Mon Sep 17 00:00:00 2001 From: Kevin Wang Date: Fri, 26 Feb 2021 12:01:16 +0800 Subject: drm/amdgpu: add RAP TA version print in amdgpu_firmware_info add RAP TA version print in amdgpu_firmware_info. Signed-off-by: Kevin Wang Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index a5ed84bc83f7..09e4d24a573e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -304,6 +304,10 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info, fw_info->ver = adev->psp.ta_fw_version; fw_info->feature = adev->psp.ta_dtm_ucode_version; break; + case 4: + fw_info->ver = adev->psp.ta_fw_version; + fw_info->feature = adev->psp.ta_rap_ucode_version; + break; default: return -EINVAL; } @@ -1467,6 +1471,10 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused) seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n", "DTM", fw_info.feature, fw_info.ver); break; + case 4: + seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n", + "RAP", fw_info.feature, fw_info.ver); + break; default: return -EINVAL; } -- cgit From 3e9e62c780b19a59b9608f8920e6c6b3f5e2a17d Mon Sep 17 00:00:00 2001 From: Kevin Wang Date: Mon, 1 Mar 2021 10:45:11 +0800 Subject: drm/amdgpu: correct TA RAP firmware information print error miss RAP TA in loop. (when i == 4) Fix: drm/amdgpu: add RAP TA version print in amdgpu_firmware_info Signed-off-by: Kevin Wang Reported-by: Candice Li Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 09e4d24a573e..c6256d755ddd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -1449,7 +1449,7 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused) fw_info.feature, fw_info.ver); query_fw.fw_type = AMDGPU_INFO_FW_TA; - for (i = 0; i < 4; i++) { + for (i = 0; i < 5; i++) { query_fw.index = i; ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); if (ret) -- cgit From 03e0dbcd10c4b3f5bb99804b19bb4b9a2d1af394 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 1 Mar 2021 10:42:50 -0500 Subject: drm/amdgpu: enable BACO runpm by default on sienna cichlid and navy flounder It works fine and was only disabled because primary GPUs don't enter runpm if there is a console bound to the fbdev due to the kmap. This will at least allow runpm on secondary cards. Reviewed-by: Evan Quan Reviewed-by: Rajneesh Bhardwaj Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index c6256d755ddd..f4880178476f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -172,8 +172,6 @@ int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags) switch (adev->asic_type) { case CHIP_VEGA20: case CHIP_ARCTURUS: - case CHIP_SIENNA_CICHLID: - case CHIP_NAVY_FLOUNDER: /* enable runpm if runpm=1 */ if (amdgpu_runtime_pm > 0) adev->runpm = true; -- cgit From 4d5ae731c4b73bd47c57dccdff776cdc59d483f0 Mon Sep 17 00:00:00 2001 From: Kevin Wang Date: Mon, 1 Mar 2021 16:51:16 +0800 Subject: drm/amdgpu: refine PSP TA firmware info print in debugfs refine PSP TA firmware info print in amdgpu_firmware_info(). Signed-off-by: Kevin Wang Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 49 +++++++++++++-------------------- 1 file changed, 19 insertions(+), 30 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index f4880178476f..00f5774dad19 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -286,23 +286,23 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info, break; case AMDGPU_INFO_FW_TA: switch (query_fw->index) { - case 0: + case TA_FW_TYPE_PSP_XGMI: fw_info->ver = adev->psp.ta_fw_version; fw_info->feature = adev->psp.ta_xgmi_ucode_version; break; - case 1: + case TA_FW_TYPE_PSP_RAS: fw_info->ver = adev->psp.ta_fw_version; fw_info->feature = adev->psp.ta_ras_ucode_version; break; - case 2: + case TA_FW_TYPE_PSP_HDCP: fw_info->ver = adev->psp.ta_fw_version; fw_info->feature = adev->psp.ta_hdcp_ucode_version; break; - case 3: + case TA_FW_TYPE_PSP_DTM: fw_info->ver = adev->psp.ta_fw_version; fw_info->feature = adev->psp.ta_dtm_ucode_version; break; - case 4: + case TA_FW_TYPE_PSP_RAP: fw_info->ver = adev->psp.ta_fw_version; fw_info->feature = adev->psp.ta_rap_ucode_version; break; @@ -1330,6 +1330,16 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused) struct atom_context *ctx = adev->mode_info.atom_context; int ret, i; + static const char *ta_fw_name[TA_FW_TYPE_MAX_INDEX] = { +#define TA_FW_NAME(type) [TA_FW_TYPE_PSP_##type] = #type + TA_FW_NAME(XGMI), + TA_FW_NAME(RAS), + TA_FW_NAME(HDCP), + TA_FW_NAME(DTM), + TA_FW_NAME(RAP), +#undef TA_FW_NAME + }; + /* VCE */ query_fw.fw_type = AMDGPU_INFO_FW_VCE; ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); @@ -1447,35 +1457,14 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused) fw_info.feature, fw_info.ver); query_fw.fw_type = AMDGPU_INFO_FW_TA; - for (i = 0; i < 5; i++) { + for (i = TA_FW_TYPE_PSP_XGMI; i < TA_FW_TYPE_MAX_INDEX; i++) { query_fw.index = i; ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); if (ret) continue; - switch (query_fw.index) { - case 0: - seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n", - "RAS", fw_info.feature, fw_info.ver); - break; - case 1: - seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n", - "XGMI", fw_info.feature, fw_info.ver); - break; - case 2: - seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n", - "HDCP", fw_info.feature, fw_info.ver); - break; - case 3: - seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n", - "DTM", fw_info.feature, fw_info.ver); - break; - case 4: - seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n", - "RAP", fw_info.feature, fw_info.ver); - break; - default: - return -EINVAL; - } + + seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n", + ta_fw_name[i], fw_info.feature, fw_info.ver); } /* SMC */ -- cgit From e7bdf00e0040e6092305397831ea58fc2107c5d6 Mon Sep 17 00:00:00 2001 From: Kevin Wang Date: Mon, 1 Mar 2021 16:53:41 +0800 Subject: drm/amdgpu: add SECURE DISPLAY TA firmware info in debugfs add SECUREDISPLAY TA firmware info in amdgpu_fimrware_info() Signed-off-by: Kevin Wang Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 00f5774dad19..ada807de978b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -306,6 +306,10 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info, fw_info->ver = adev->psp.ta_fw_version; fw_info->feature = adev->psp.ta_rap_ucode_version; break; + case TA_FW_TYPE_PSP_SECUREDISPLAY: + fw_info->ver = adev->psp.ta_fw_version; + fw_info->feature = adev->psp.ta_securedisplay_ucode_version; + break; default: return -EINVAL; } @@ -1337,6 +1341,7 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused) TA_FW_NAME(HDCP), TA_FW_NAME(DTM), TA_FW_NAME(RAP), + TA_FW_NAME(SECUREDISPLAY), #undef TA_FW_NAME }; -- cgit From b2aba43af90415e0538b0201fe93f0c72b5741d9 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 22 Jan 2021 17:45:29 -0500 Subject: drm/amdgpu: enable DPM_FLAG_MAY_SKIP_RESUME and DPM_FLAG_SMART_SUSPEND flags (v2) Once the device has runtime suspended, we don't need to power it back up again for system suspend. Likewise for resume, we don't to power up the device again on resume only to power it back off again via runtime pm because it's still idle. v2: add DPM_FLAG_SMART_PREPARE as well Reviewed-by: Evan Quan Acked-by: Rajneesh Bhardwaj (v1) Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index ada807de978b..23c8f4cb0ac9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -203,6 +203,13 @@ int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags) if (amdgpu_device_supports_atpx(dev) && !amdgpu_is_atpx_hybrid()) dev_pm_set_driver_flags(dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); + /* we want direct complete for BOCO */ + if ((amdgpu_device_supports_atpx(dev) && + amdgpu_is_atpx_hybrid()) || + amdgpu_device_supports_boco(dev)) + dev_pm_set_driver_flags(dev->dev, DPM_FLAG_SMART_PREPARE | + DPM_FLAG_SMART_SUSPEND | + DPM_FLAG_MAY_SKIP_RESUME); pm_runtime_use_autosuspend(dev->dev); pm_runtime_set_autosuspend_delay(dev->dev, 5000); pm_runtime_allow(dev->dev); -- cgit From b98c6299ef992660f5ca4392287a11ea2439c664 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 10 Mar 2021 00:43:35 -0500 Subject: drm/amdgpu: disentangle HG systems from vgaswitcheroo There's no need to keep vgaswitcheroo around for HG systems. They don't use muxes and their power control is handled via ACPI. Reviewed-by: Evan Quan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 23c8f4cb0ac9..8844f650b17f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -159,7 +159,7 @@ int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags) goto out; } - if (amdgpu_device_supports_atpx(dev) && + if (amdgpu_device_supports_px(dev) && (amdgpu_runtime_pm != 0)) { /* enable runpm by default for atpx */ adev->runpm = true; dev_info(adev->dev, "Using ATPX for runtime pm\n"); @@ -200,13 +200,10 @@ int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags) if (adev->runpm) { /* only need to skip on ATPX */ - if (amdgpu_device_supports_atpx(dev) && - !amdgpu_is_atpx_hybrid()) + if (amdgpu_device_supports_px(dev)) dev_pm_set_driver_flags(dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); /* we want direct complete for BOCO */ - if ((amdgpu_device_supports_atpx(dev) && - amdgpu_is_atpx_hybrid()) || - amdgpu_device_supports_boco(dev)) + if (amdgpu_device_supports_boco(dev)) dev_pm_set_driver_flags(dev->dev, DPM_FLAG_SMART_PREPARE | DPM_FLAG_SMART_SUSPEND | DPM_FLAG_MAY_SKIP_RESUME); -- cgit From f4d3da72a76a9ce5f57bba64788931686a9dc333 Mon Sep 17 00:00:00 2001 From: Huacai Chen Date: Tue, 30 Mar 2021 23:33:33 +0800 Subject: drm/amdgpu: Set a suitable dev_info.gart_page_size MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In Mesa, dev_info.gart_page_size is used for alignment and it was set to AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU driver requires an alignment on CPU pages. So, for non-4KB page system, gart_page_size should be max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE). Signed-off-by: Rui Wang Signed-off-by: Huacai Chen Link: https://github.com/loongson-community/linux-stable/commit/caa9c0a1 [Xi: rebased for drm-next, use max_t for checkpatch, and reworded commit message.] Signed-off-by: Xi Ruoyao BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1549 Tested-by: Dan Horák Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 8844f650b17f..39ee88d29cca 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -789,9 +789,9 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) dev_info->high_va_offset = AMDGPU_GMC_HOLE_END; dev_info->high_va_max = AMDGPU_GMC_HOLE_END | vm_size; } - dev_info->virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); + dev_info->virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; - dev_info->gart_page_size = AMDGPU_GPU_PAGE_SIZE; + dev_info->gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); dev_info->cu_active_number = adev->gfx.cu_info.number; dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; dev_info->ce_ram_size = adev->gfx.ce_ram_size; -- cgit