From f38129bb081758176dd78304faaee95007fb8838 Mon Sep 17 00:00:00 2001 From: Aurabindo Pillai Date: Tue, 21 Mar 2023 10:25:04 -0400 Subject: Revert "drm/amd/display: disable SubVP + DRR to prevent underflow" This reverts commit 80c6d6804f31451848a3956a70c2bcb1f07cfcb0. The orignal commit was intended as a workaround to prevent underflow and flickering when using one normal monitor and the other high refresh rate monitor (> 120Hz). This patch is being reverted in favour of a software solution to enable SubVP+DRR Signed-off-by: Aurabindo Pillai Reviewed-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/include/amd_shared.h | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/gpu/drm/amd/include/amd_shared.h') diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index e4a22c68517d..f175e65b853a 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h @@ -240,7 +240,6 @@ enum DC_FEATURE_MASK { DC_DISABLE_LTTPR_DP2_0 = (1 << 6), //0x40, disabled by default DC_PSR_ALLOW_SMU_OPT = (1 << 7), //0x80, disabled by default DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8), //0x100, disabled by default - DC_ENABLE_SUBVP_DRR = (1 << 9), // 0x200, disabled by default }; enum DC_DEBUG_MASK { -- cgit From 5d6cd20075c823565e7550f8de70d7615ec3c8b7 Mon Sep 17 00:00:00 2001 From: Shiwu Zhang Date: Mon, 22 May 2023 15:58:10 +0800 Subject: drm/amdgpu: add the accelerator pcie class v2: add the base class id for accelerator (lijo) v3: add the new pci class in amdgpu tree (hawking) Signed-off-by: Shiwu Zhang Acked-by: Lijo Lazar Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/include/amd_shared.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/amd/include/amd_shared.h') diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index f175e65b853a..57d95e2cc54b 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h @@ -27,6 +27,7 @@ #define AMD_MAX_USEC_TIMEOUT 1000000 /* 1000 ms */ +#define AMD_ACCELERATOR_PROCESSING 0x1200 /* hardcoded pci class */ /* * Chip flags -- cgit From 9d65b1b4bcf3918164e17365eec169875eef8ee3 Mon Sep 17 00:00:00 2001 From: Shiwu Zhang Date: Tue, 23 May 2023 12:02:32 +0800 Subject: drm/amdgpu: add the accelerator PCIe class Add the accelerator PCIe class and match the class in amdgpu for 0x1002 devices of that class. From PCI spec: "PCI Code and ID Assignment, r1.9, sec 1, 1.19" Signed-off-by: Shiwu Zhang Acked-by: Lijo Lazar Acked-by: Bjorn Helgaas # pci_ids.h Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/include/amd_shared.h | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/gpu/drm/amd/include/amd_shared.h') diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index 57d95e2cc54b..f175e65b853a 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h @@ -27,7 +27,6 @@ #define AMD_MAX_USEC_TIMEOUT 1000000 /* 1000 ms */ -#define AMD_ACCELERATOR_PROCESSING 0x1200 /* hardcoded pci class */ /* * Chip flags -- cgit