From 3afbd89c9639c344300dcdd7d4e5e18dda559fd4 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 25 Jan 2012 09:05:04 +0100 Subject: serial/efm32: add new driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Greg Kroah-Hartman --- include/linux/platform_data/efm32-uart.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 include/linux/platform_data/efm32-uart.h (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/efm32-uart.h b/include/linux/platform_data/efm32-uart.h new file mode 100644 index 000000000000..ed0e975b3c54 --- /dev/null +++ b/include/linux/platform_data/efm32-uart.h @@ -0,0 +1,18 @@ +/* + * + * + */ +#ifndef __LINUX_PLATFORM_DATA_EFM32_UART_H__ +#define __LINUX_PLATFORM_DATA_EFM32_UART_H__ + +#include + +/** + * struct efm32_uart_pdata + * @location: pinmux location for the I/O pins (to be written to the ROUTE + * register) + */ +struct efm32_uart_pdata { + u8 location; +}; +#endif /* ifndef __LINUX_PLATFORM_DATA_EFM32_UART_H__ */ -- cgit From d28a9689c93195d39f91f35a9519876688605b65 Mon Sep 17 00:00:00 2001 From: Anton Tikhomirov Date: Wed, 15 Feb 2012 17:04:56 +0900 Subject: usb: dwc3: Add Exynos Specific Glue layer Adds Exynos Specific Glue layer to support USB peripherals on Samsung Exynos5 chips. [ balbi@ti.com : prevent compilation of Exynos glue layer on platforms which don't provide clk API implementation ] Signed-off-by: Anton Tikhomirov Signed-off-by: Felipe Balbi --- include/linux/platform_data/dwc3-exynos.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 include/linux/platform_data/dwc3-exynos.h (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/dwc3-exynos.h b/include/linux/platform_data/dwc3-exynos.h new file mode 100644 index 000000000000..5eb7da9b3772 --- /dev/null +++ b/include/linux/platform_data/dwc3-exynos.h @@ -0,0 +1,24 @@ +/** + * dwc3-exynos.h - Samsung EXYNOS DWC3 Specific Glue layer, header. + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Author: Anton Tikhomirov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef _DWC3_EXYNOS_H_ +#define _DWC3_EXYNOS_H_ + +struct dwc3_exynos_data { + int phy_type; + int (*phy_init)(struct platform_device *pdev, int type); + int (*phy_exit)(struct platform_device *pdev, int type); +}; + +#endif /* _DWC3_EXYNOS_H_ */ -- cgit From df828598a755732e717b0adca82f884e44d37576 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Sun, 18 Mar 2012 20:17:54 +0000 Subject: netdev: driver: ethernet: Add TI CPSW driver This patch adds support for TI's CPSW driver. The three port switch gigabit ethernet subsystem provides ethernet packet communication and can be configured as an ethernet switch. Supports 10/100/1000 Mbps. Signed-off-by: Cyril Chemparathy Signed-off-by: Sriramakrishnan A G Signed-off-by: Mugunthan V N Signed-off-by: David S. Miller --- include/linux/platform_data/cpsw.h | 55 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 include/linux/platform_data/cpsw.h (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/cpsw.h b/include/linux/platform_data/cpsw.h new file mode 100644 index 000000000000..c4e23d029498 --- /dev/null +++ b/include/linux/platform_data/cpsw.h @@ -0,0 +1,55 @@ +/* + * Texas Instruments Ethernet Switch Driver + * + * Copyright (C) 2012 Texas Instruments + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __CPSW_H__ +#define __CPSW_H__ + +#include + +struct cpsw_slave_data { + u32 slave_reg_ofs; + u32 sliver_reg_ofs; + const char *phy_id; + int phy_if; + u8 mac_addr[ETH_ALEN]; +}; + +struct cpsw_platform_data { + u32 ss_reg_ofs; /* Subsystem control register offset */ + u32 channels; /* number of cpdma channels (symmetric) */ + u32 cpdma_reg_ofs; /* cpdma register offset */ + u32 cpdma_sram_ofs; /* cpdma sram offset */ + + u32 slaves; /* number of slave cpgmac ports */ + struct cpsw_slave_data *slave_data; + + u32 ale_reg_ofs; /* address lookup engine reg offset */ + u32 ale_entries; /* ale table size */ + + u32 host_port_reg_ofs; /* cpsw cpdma host port registers */ + u32 host_port_num; /* The port number for the host port */ + + u32 hw_stats_reg_ofs; /* cpsw hardware statistics counters */ + + u32 bd_ram_ofs; /* embedded buffer descriptor RAM offset*/ + u32 bd_ram_size; /*buffer descriptor ram size */ + u32 hw_ram_addr; /*if the HW address for BD RAM is different */ + bool no_bd_ram; /* no embedded BD ram*/ + + u32 rx_descs; /* Number of Rx Descriptios */ + + u32 mac_control; /* Mac control register */ +}; + +#endif /* __CPSW_H__ */ -- cgit