diff options
| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-11-04 09:35:59 +0200 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-12-02 08:54:32 +0200 |
| commit | 18135eadac6f0fd1bf61b7af24f14e7174155e6d (patch) | |
| tree | 4528658dddb29bf4138e4b46d169f2f021da4b5e | |
| parent | be729178f0e0f31ab14b42b3fe5d6b4463fbeb3a (diff) | |
OMAPDSS: APPLY: skip isr register and config for manual update displays
The mechanism to cache manager and overlay settings and configure them
into the HW registers in VSYNC is meant only for auto-update displays,
as it doesn't make sense (and doesn't work) for manual-update displays.
This patchs adds a check so that we skip the above for manual update
displays.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| -rw-r--r-- | drivers/video/omap2/dss/apply.c | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/omap2/dss/apply.c index 46fdb63a4dbc..0da8081fc7c4 100644 --- a/drivers/video/omap2/dss/apply.c +++ b/drivers/video/omap2/dss/apply.c @@ -629,23 +629,26 @@ int omap_dss_mgr_apply(struct omap_overlay_manager *mgr) } r = 0; - if (!dss_cache.irq_enabled) { - u32 mask; + if (!mgr_manual_update(mgr)) { + if (!dss_cache.irq_enabled) { + u32 mask; - mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_ODD | - DISPC_IRQ_EVSYNC_EVEN; - if (dss_has_feature(FEAT_MGR_LCD2)) - mask |= DISPC_IRQ_VSYNC2; + mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_ODD | + DISPC_IRQ_EVSYNC_EVEN; + if (dss_has_feature(FEAT_MGR_LCD2)) + mask |= DISPC_IRQ_VSYNC2; - r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask); + r = omap_dispc_register_isr(dss_apply_irq_handler, + NULL, mask); - if (r) - DSSERR("failed to register apply isr\n"); + if (r) + DSSERR("failed to register apply isr\n"); - dss_cache.irq_enabled = true; - } + dss_cache.irq_enabled = true; + } - configure_dispc(); + configure_dispc(); + } spin_unlock_irqrestore(&dss_cache.lock, flags); |