diff options
| author | Thierry Bultel <thierry.bultel.yh@bp.renesas.com> | 2025-06-17 17:28:09 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-08-11 11:58:02 +0200 |
| commit | d17b34744f5e4299109801c0a151e5dd31d76936 (patch) | |
| tree | b75ca8dbbd562ab0c596995131a0b5e6f198e155 /rust/helpers/workqueue.c | |
| parent | 8f5ae30d69d7543eee0d70083daf4de8fe15d585 (diff) | |
arm64: dts: renesas: Add initial support for the Renesas RZ/T2H SoC
Add the initial dtsi for the RZ/T2H SoC:
- GIC
- ARMv8-timer
- CPG clock
- SCI0 UART
also add arch/arm64/boot/dts/renesas/r9a09g077m44.dtsi, that keeps all 4
CPUs enabled, for consistency with later support of -m24 and -m04 SoC
revisions, that only have 2 and 1 Cortex-A55, respectively, and that
will use /delete-node/ to disable the missing CPUs.
Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250617162810.154332-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'rust/helpers/workqueue.c')
0 files changed, 0 insertions, 0 deletions
