diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2025-11-10 16:22:25 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2025-11-12 18:47:16 -0600 |
| commit | 4495bffd86ba0fdabfaef0c41d12f68ec2a1e05b (patch) | |
| tree | 3784f246ab60cabd1a5a690cab2233f49116c5ad /scripts/livepatch | |
| parent | 3a8660878839faadb4f1a6dd72c3179c1df56787 (diff) | |
PCI/ASPM: Cache L0s/L1 Supported so advertised link states can be overridden
Defective devices sometimes advertise support for ASPM L0s or L1 states
even if they don't work correctly.
Cache the L0s Supported and L1 Supported bits early in enumeration so
HEADER quirks can override the ASPM states advertised in Link Capabilities
before pcie_aspm_cap_init() enables ASPM.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Lukas Wunner <lukas@wunner.de>
Link: https://patch.msgid.link/20251110222929.2140564-2-helgaas@kernel.org
Diffstat (limited to 'scripts/livepatch')
0 files changed, 0 insertions, 0 deletions