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authorDev Jain <dev.jain@arm.com>2025-10-17 21:32:51 +0530
committerCatalin Marinas <catalin.marinas@arm.com>2025-11-13 17:50:25 +0000
commitc320dbb7c80d93a762c01b4a652d9292629869e7 (patch)
tree2ac9bc64571a923dc922e70f254901bdf8d1a99b /tools/docs/parse-headers.py
parent1b214452b6a725a1451b244bd2baf537954863c5 (diff)
arm64/mm: Elide TLB flush in certain pte protection transitions
Currently arm64 does an unconditional TLB flush in mprotect(). This is not required for some cases, for example, when changing from PROT_NONE to PROT_READ | PROT_WRITE (a real usecase - glibc malloc does this to emulate growing into the non-main heaps), and unsetting uffd-wp in a range. Therefore, implement pte_needs_flush() for arm64, which is already implemented by some other arches as well. Running a userspace program changing permissions back and forth between PROT_NONE and PROT_READ | PROT_WRITE, and measuring the average time taken for the none->rw transition, I get a reduction from 3.2 microseconds to 2.85 microseconds, giving a 12.3% improvement. Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Dev Jain <dev.jain@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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