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authorSuravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>2016-04-01 09:05:57 -0400
committerJoerg Roedel <jroedel@suse.de>2016-04-07 13:29:40 +0200
commit7d7d38afb3e8fdfebfd867cc0ff4b5c45c14053c (patch)
tree215acef518b3b70a3e1e79db103ed9e094ec8321 /tools/perf/scripts/python/call-graph-from-postgresql.py
parent9735a22799b9214d17d3c231fe377fc852f042e9 (diff)
iommu/amd: Adding Extended Feature Register check for PC support
The IVHD header type 11h and 40h introduce the PCSup bit in the EFR Register Image bit fileds. This should be used to determine the IOMMU performance support instead of relying on the PNCounters and PNBanks. Note also that the PNCouters and PNBanks bits in the IOMMU attributes field of IVHD headers type 11h are incorrectly programmed on some systems. So, we should not rely on it to determine the performance counter/banks size. Instead, these values should be read from the MMIO Offset 0030h IOMMU Extended Feature Register. Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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