arm64: dts: qcom: sc7180: Describe on-SoC USB-adjacent data paths

USB connector bindings describe a ports subnode, which describes how
its High-/SuperSpeed data lines (as well as the SBU pins for Type-C)
are connected.

On Linux, skipping the graph results in the 'connect_type' sysfs
attribute returning 'unknown', instead of 'hotplug' or similar. This in
turn is parsed by some operating systems (such as CrOS), to e.g. make
security policy decisions.

Define ports {} for the DWC controller & the QMPPHY and connect them
together for the SS lanes.

Leave the DP endpoint unconnected for now, as both Aspire 1 and the
Chromebooks (unmerged, see [1]) seem to have a non-trivial topology.
Take the creative liberty to add a newline before its ports' subnodes
though.

[1] https://lore.kernel.org/linux-arm-msm/20240210070934.2549994-23-swboyd@chromium.org/

Suggested-by: Rob Herring (Arm) <robh@kernel.org>
Closes: https://lore.kernel.org/linux-arm-msm/175462129176.394940.16810637795278334342.robh@kernel.org/
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250812-topic-7180_qmpphy_ports-v2-1-7dc87e9a1f73@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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